1
/*
2
* QEMU VGA Emulator .
ths
authored
18 years ago
3
*
4
* Copyright ( c ) 2003 Fabrice Bellard
ths
authored
18 years ago
5
*
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
* Permission is hereby granted , free of charge , to any person obtaining a copy
* of this software and associated documentation files ( the "Software" ), to deal
* in the Software without restriction , including without limitation the rights
* to use , copy , modify , merge , publish , distribute , sublicense , and / or sell
* copies of the Software , and to permit persons to whom the Software is
* furnished to do so , subject to the following conditions :
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software .
*
* THE SOFTWARE IS PROVIDED "AS IS" , WITHOUT WARRANTY OF ANY KIND , EXPRESS OR
* IMPLIED , INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY ,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT . IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM , DAMAGES OR OTHER
* LIABILITY , WHETHER IN AN ACTION OF CONTRACT , TORT OR OTHERWISE , ARISING FROM ,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE .
*/
24
25
26
27
# include "hw.h"
# include "console.h"
# include "pc.h"
# include "pci.h"
28
# include "vga_int.h"
29
# include "pixel_ops.h"
malc
authored
16 years ago
30
# include "qemu-timer.h"
31
# include "kvm.h"
32
33
// # define DEBUG_VGA
34
// # define DEBUG_VGA_MEM
35
36
// # define DEBUG_VGA_REG
37
38
// # define DEBUG_BOCHS_VBE
39
/* force some bits to zero */
40
const uint8_t sr_mask [ 8 ] = {
41
42
43
44
45
46
47
48
0x03 ,
0x3d ,
0x0f ,
0x3f ,
0x0e ,
0x00 ,
0x00 ,
0xff ,
49
50
};
51
const uint8_t gr_mask [ 16 ] = {
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
0x0f , /* 0x00 */
0x0f , /* 0x01 */
0x0f , /* 0x02 */
0x1f , /* 0x03 */
0x03 , /* 0x04 */
0x7b , /* 0x05 */
0x0f , /* 0x06 */
0x0f , /* 0x07 */
0xff , /* 0x08 */
0x00 , /* 0x09 */
0x00 , /* 0x0a */
0x00 , /* 0x0b */
0x00 , /* 0x0c */
0x00 , /* 0x0d */
0x00 , /* 0x0e */
0x00 , /* 0x0f */
68
69
70
71
72
73
74
75
76
};
# define cbswap_32 ( __x ) \
(( uint32_t )( \
((( uint32_t )( __x ) & ( uint32_t ) 0x000000ffUL ) << 24 ) | \
((( uint32_t )( __x ) & ( uint32_t ) 0x0000ff00UL ) << 8 ) | \
((( uint32_t )( __x ) & ( uint32_t ) 0x00ff0000UL ) >> 8 ) | \
((( uint32_t )( __x ) & ( uint32_t ) 0xff000000UL ) >> 24 ) ))
77
# ifdef HOST_WORDS_BIGENDIAN
78
79
80
81
82
# define PAT ( x ) cbswap_32 ( x )
# else
# define PAT ( x ) ( x )
# endif
83
# ifdef HOST_WORDS_BIGENDIAN
84
85
86
87
88
# define BIG 1
# else
# define BIG 0
# endif
89
# ifdef HOST_WORDS_BIGENDIAN
90
91
92
93
94
# define GET_PLANE ( data , p ) ((( data ) >> ( 24 - ( p ) * 8 )) & 0xff )
# else
# define GET_PLANE ( data , p ) ((( data ) >> (( p ) * 8 )) & 0xff )
# endif
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
static const uint32_t mask16 [ 16 ] = {
PAT ( 0x00000000 ),
PAT ( 0x000000ff ),
PAT ( 0x0000ff00 ),
PAT ( 0x0000ffff ),
PAT ( 0x00ff0000 ),
PAT ( 0x00ff00ff ),
PAT ( 0x00ffff00 ),
PAT ( 0x00ffffff ),
PAT ( 0xff000000 ),
PAT ( 0xff0000ff ),
PAT ( 0xff00ff00 ),
PAT ( 0xff00ffff ),
PAT ( 0xffff0000 ),
PAT ( 0xffff00ff ),
PAT ( 0xffffff00 ),
PAT ( 0xffffffff ),
};
# undef PAT
116
# ifdef HOST_WORDS_BIGENDIAN
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
# define PAT ( x ) ( x )
# else
# define PAT ( x ) cbswap_32 ( x )
# endif
static const uint32_t dmask16 [ 16 ] = {
PAT ( 0x00000000 ),
PAT ( 0x000000ff ),
PAT ( 0x0000ff00 ),
PAT ( 0x0000ffff ),
PAT ( 0x00ff0000 ),
PAT ( 0x00ff00ff ),
PAT ( 0x00ffff00 ),
PAT ( 0x00ffffff ),
PAT ( 0xff000000 ),
PAT ( 0xff0000ff ),
PAT ( 0xff00ff00 ),
PAT ( 0xff00ffff ),
PAT ( 0xffff0000 ),
PAT ( 0xffff00ff ),
PAT ( 0xffffff00 ),
PAT ( 0xffffffff ),
};
static const uint32_t dmask4 [ 4 ] = {
PAT ( 0x00000000 ),
PAT ( 0x0000ffff ),
PAT ( 0xffff0000 ),
PAT ( 0xffffffff ),
};
static uint32_t expand4 [ 256 ];
static uint16_t expand2 [ 256 ];
150
static uint8_t expand4to8 [ 16 ];
151
152
153
static void vga_screen_dump ( void * opaque , const char * filename );
malc
authored
16 years ago
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
static void vga_dumb_update_retrace_info ( VGAState * s )
{
( void ) s ;
}
static void vga_precise_update_retrace_info ( VGAState * s )
{
int htotal_chars ;
int hretr_start_char ;
int hretr_skew_chars ;
int hretr_end_char ;
int vtotal_lines ;
int vretr_start_line ;
int vretr_end_line ;
int div2 , sldiv2 , dots ;
int clocking_mode ;
int clock_sel ;
173
const int clk_hz [] = { 25175000 , 28322000 , 25175000 , 25175000 };
malc
authored
16 years ago
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
int64_t chars_per_sec ;
struct vga_precise_retrace * r = & s -> retrace_info . precise ;
htotal_chars = s -> cr [ 0x00 ] + 5 ;
hretr_start_char = s -> cr [ 0x04 ];
hretr_skew_chars = ( s -> cr [ 0x05 ] >> 5 ) & 3 ;
hretr_end_char = s -> cr [ 0x05 ] & 0x1f ;
vtotal_lines = ( s -> cr [ 0x06 ]
| ((( s -> cr [ 0x07 ] & 1 ) | (( s -> cr [ 0x07 ] >> 4 ) & 2 )) << 8 )) + 2
;
vretr_start_line = s -> cr [ 0x10 ]
| (((( s -> cr [ 0x07 ] >> 2 ) & 1 ) | (( s -> cr [ 0x07 ] >> 6 ) & 2 )) << 8 )
;
vretr_end_line = s -> cr [ 0x11 ] & 0xf ;
div2 = ( s -> cr [ 0x17 ] >> 2 ) & 1 ;
sldiv2 = ( s -> cr [ 0x17 ] >> 3 ) & 1 ;
clocking_mode = ( s -> sr [ 0x01 ] >> 3 ) & 1 ;
clock_sel = ( s -> msr >> 2 ) & 3 ;
malc
authored
16 years ago
196
dots = ( s -> msr & 1 ) ? 8 : 9 ;
malc
authored
16 years ago
197
198
chars_per_sec = clk_hz [ clock_sel ] / dots ;
malc
authored
16 years ago
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
htotal_chars <<= clocking_mode ;
r -> total_chars = vtotal_lines * htotal_chars ;
if ( r -> freq ) {
r -> ticks_per_char = ticks_per_sec / ( r -> total_chars * r -> freq );
} else {
r -> ticks_per_char = ticks_per_sec / chars_per_sec ;
}
r -> vstart = vretr_start_line ;
r -> vend = r -> vstart + vretr_end_line + 1 ;
r -> hstart = hretr_start_char + hretr_skew_chars ;
r -> hend = r -> hstart + hretr_end_char + 1 ;
r -> htotal = htotal_chars ;
malc
authored
16 years ago
216
# if 0
malc
authored
16 years ago
217
printf (
malc
authored
16 years ago
218
"hz=%f \n "
malc
authored
16 years ago
219
220
221
222
223
224
225
226
227
228
229
230
231
"htotal = %d \n "
"hretr_start = %d \n "
"hretr_skew = %d \n "
"hretr_end = %d \n "
"vtotal = %d \n "
"vretr_start = %d \n "
"vretr_end = %d \n "
"div2 = %d sldiv2 = %d \n "
"clocking_mode = %d \n "
"clock_sel = %d %d \n "
"dots = %d \n "
"ticks/char = %lld \n "
" \n " ,
malc
authored
16 years ago
232
( double ) ticks_per_sec / ( r -> ticks_per_char * r -> total_chars ),
malc
authored
16 years ago
233
234
235
236
237
238
239
240
241
242
htotal_chars ,
hretr_start_char ,
hretr_skew_chars ,
hretr_end_char ,
vtotal_lines ,
vretr_start_line ,
vretr_end_line ,
div2 , sldiv2 ,
clocking_mode ,
clock_sel ,
243
clk_hz [ clock_sel ],
malc
authored
16 years ago
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
dots ,
r -> ticks_per_char
);
# endif
}
static uint8_t vga_precise_retrace ( VGAState * s )
{
struct vga_precise_retrace * r = & s -> retrace_info . precise ;
uint8_t val = s -> st01 & ~ ( ST01_V_RETRACE | ST01_DISP_ENABLE );
if ( r -> total_chars ) {
int cur_line , cur_line_char , cur_char ;
int64_t cur_tick ;
cur_tick = qemu_get_clock ( vm_clock );
cur_char = ( cur_tick / r -> ticks_per_char ) % r -> total_chars ;
cur_line = cur_char / r -> htotal ;
if ( cur_line >= r -> vstart && cur_line <= r -> vend ) {
val |= ST01_V_RETRACE | ST01_DISP_ENABLE ;
malc
authored
16 years ago
266
267
268
269
270
} else {
cur_line_char = cur_char % r -> htotal ;
if ( cur_line_char >= r -> hstart && cur_line_char <= r -> hend ) {
val |= ST01_DISP_ENABLE ;
}
malc
authored
16 years ago
271
272
273
274
275
276
277
278
279
280
281
282
283
}
return val ;
} else {
return s -> st01 ^ ( ST01_V_RETRACE | ST01_DISP_ENABLE );
}
}
static uint8_t vga_dumb_retrace ( VGAState * s )
{
return s -> st01 ^ ( ST01_V_RETRACE | ST01_DISP_ENABLE );
}
284
static uint32_t vga_ioport_read ( void * opaque , uint32_t addr )
285
{
286
VGAState * s = opaque ;
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
int val , index ;
/* check port range access depending on color/monochrome mode */
if (( addr >= 0x3b0 && addr <= 0x3bf && ( s -> msr & MSR_COLOR_EMULATION )) ||
( addr >= 0x3d0 && addr <= 0x3df && ! ( s -> msr & MSR_COLOR_EMULATION ))) {
val = 0xff ;
} else {
switch ( addr ) {
case 0x3c0 :
if ( s -> ar_flip_flop == 0 ) {
val = s -> ar_index ;
} else {
val = 0 ;
}
break ;
case 0x3c1 :
index = s -> ar_index & 0x1f ;
ths
authored
18 years ago
304
if ( index < 21 )
305
306
307
308
309
310
311
312
313
314
315
316
val = s -> ar [ index ];
else
val = 0 ;
break ;
case 0x3c2 :
val = s -> st00 ;
break ;
case 0x3c4 :
val = s -> sr_index ;
break ;
case 0x3c5 :
val = s -> sr [ s -> sr_index ];
317
318
319
# ifdef DEBUG_VGA_REG
printf ( "vga: read SR%x = 0x%02x \n " , s -> sr_index , val );
# endif
320
321
322
323
break ;
case 0x3c7 :
val = s -> dac_state ;
break ;
324
325
326
case 0x3c8 :
val = s -> dac_write_index ;
break ;
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
case 0x3c9 :
val = s -> palette [ s -> dac_read_index * 3 + s -> dac_sub_index ];
if ( ++ s -> dac_sub_index == 3 ) {
s -> dac_sub_index = 0 ;
s -> dac_read_index ++ ;
}
break ;
case 0x3ca :
val = s -> fcr ;
break ;
case 0x3cc :
val = s -> msr ;
break ;
case 0x3ce :
val = s -> gr_index ;
break ;
case 0x3cf :
val = s -> gr [ s -> gr_index ];
345
346
347
# ifdef DEBUG_VGA_REG
printf ( "vga: read GR%x = 0x%02x \n " , s -> gr_index , val );
# endif
348
349
350
351
352
353
354
355
break ;
case 0x3b4 :
case 0x3d4 :
val = s -> cr_index ;
break ;
case 0x3b5 :
case 0x3d5 :
val = s -> cr [ s -> cr_index ];
356
357
358
# ifdef DEBUG_VGA_REG
printf ( "vga: read CR%x = 0x%02x \n " , s -> cr_index , val );
# endif
359
360
361
362
break ;
case 0x3ba :
case 0x3da :
/* just toggle to fool polling */
malc
authored
16 years ago
363
val = s -> st01 = s -> retrace ( s );
364
365
366
367
368
369
370
s -> ar_flip_flop = 0 ;
break ;
default :
val = 0x00 ;
break ;
}
}
371
# if defined ( DEBUG_VGA )
372
373
374
375
376
printf ( "VGA: read addr=0x%04x data=0x%02x \n " , addr , val );
# endif
return val ;
}
377
static void vga_ioport_write ( void * opaque , uint32_t addr , uint32_t val )
378
{
379
VGAState * s = opaque ;
380
int index ;
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
/* check port range access depending on color/monochrome mode */
if (( addr >= 0x3b0 && addr <= 0x3bf && ( s -> msr & MSR_COLOR_EMULATION )) ||
( addr >= 0x3d0 && addr <= 0x3df && ! ( s -> msr & MSR_COLOR_EMULATION )))
return ;
# ifdef DEBUG_VGA
printf ( "VGA: write addr=0x%04x data=0x%02x \n " , addr , val );
# endif
switch ( addr ) {
case 0x3c0 :
if ( s -> ar_flip_flop == 0 ) {
val &= 0x3f ;
s -> ar_index = val ;
} else {
index = s -> ar_index & 0x1f ;
switch ( index ) {
case 0x00 ... 0x0f :
s -> ar [ index ] = val & 0x3f ;
break ;
case 0x10 :
s -> ar [ index ] = val & ~ 0x10 ;
break ;
case 0x11 :
s -> ar [ index ] = val ;
break ;
case 0x12 :
s -> ar [ index ] = val & ~ 0xc0 ;
break ;
case 0x13 :
s -> ar [ index ] = val & ~ 0xf0 ;
break ;
case 0x14 :
s -> ar [ index ] = val & ~ 0xf0 ;
break ;
default :
break ;
}
}
s -> ar_flip_flop ^= 1 ;
break ;
case 0x3c2 :
s -> msr = val & ~ 0x10 ;
malc
authored
16 years ago
425
s -> update_retrace_info ( s );
426
427
428
429
430
break ;
case 0x3c4 :
s -> sr_index = val & 7 ;
break ;
case 0x3c5 :
431
432
433
# ifdef DEBUG_VGA_REG
printf ( "vga: write SR%x = 0x%02x \n " , s -> sr_index , val );
# endif
434
s -> sr [ s -> sr_index ] = val & sr_mask [ s -> sr_index ];
malc
authored
16 years ago
435
if ( s -> sr_index == 1 ) s -> update_retrace_info ( s );
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
break ;
case 0x3c7 :
s -> dac_read_index = val ;
s -> dac_sub_index = 0 ;
s -> dac_state = 3 ;
break ;
case 0x3c8 :
s -> dac_write_index = val ;
s -> dac_sub_index = 0 ;
s -> dac_state = 0 ;
break ;
case 0x3c9 :
s -> dac_cache [ s -> dac_sub_index ] = val ;
if ( ++ s -> dac_sub_index == 3 ) {
memcpy ( & s -> palette [ s -> dac_write_index * 3 ], s -> dac_cache , 3 );
s -> dac_sub_index = 0 ;
s -> dac_write_index ++ ;
}
break ;
case 0x3ce :
s -> gr_index = val & 0x0f ;
break ;
case 0x3cf :
459
460
461
# ifdef DEBUG_VGA_REG
printf ( "vga: write GR%x = 0x%02x \n " , s -> gr_index , val );
# endif
462
463
464
465
466
467
468
469
s -> gr [ s -> gr_index ] = val & gr_mask [ s -> gr_index ];
break ;
case 0x3b4 :
case 0x3d4 :
s -> cr_index = val ;
break ;
case 0x3b5 :
case 0x3d5 :
470
471
472
# ifdef DEBUG_VGA_REG
printf ( "vga: write CR%x = 0x%02x \n " , s -> cr_index , val );
# endif
473
/* handle CR0-7 protection */
474
if (( s -> cr [ 0x11 ] & 0x80 ) && s -> cr_index <= 7 ) {
475
476
477
478
479
480
481
482
483
484
485
/* can always write bit 4 of CR7 */
if ( s -> cr_index == 7 )
s -> cr [ 7 ] = ( s -> cr [ 7 ] & ~ 0x10 ) | ( val & 0x10 );
return ;
}
switch ( s -> cr_index ) {
case 0x01 : /* horizontal display end */
case 0x07 :
case 0x09 :
case 0x0c :
case 0x0d :
ths
authored
18 years ago
486
case 0x12 : /* vertical display end */
487
488
489
490
491
492
s -> cr [ s -> cr_index ] = val ;
break ;
default :
s -> cr [ s -> cr_index ] = val ;
break ;
}
malc
authored
16 years ago
493
494
495
496
497
498
499
500
501
502
503
504
switch ( s -> cr_index ) {
case 0x00 :
case 0x04 :
case 0x05 :
case 0x06 :
case 0x07 :
case 0x11 :
case 0x17 :
s -> update_retrace_info ( s );
break ;
}
505
506
507
508
509
510
511
512
break ;
case 0x3ba :
case 0x3da :
s -> fcr = val & 0x10 ;
break ;
}
}
513
# ifdef CONFIG_BOCHS_VBE
514
static uint32_t vbe_ioport_read_index ( void * opaque , uint32_t addr )
515
{
516
VGAState * s = opaque ;
517
uint32_t val ;
518
519
520
val = s -> vbe_index ;
return val ;
}
521
522
523
524
525
526
static uint32_t vbe_ioport_read_data ( void * opaque , uint32_t addr )
{
VGAState * s = opaque ;
uint32_t val ;
527
528
529
530
531
532
533
534
535
536
537
538
539
540
if ( s -> vbe_index <= VBE_DISPI_INDEX_NB ) {
if ( s -> vbe_regs [ VBE_DISPI_INDEX_ENABLE ] & VBE_DISPI_GETCAPS ) {
switch ( s -> vbe_index ) {
/* XXX: do not hardcode ? */
case VBE_DISPI_INDEX_XRES :
val = VBE_DISPI_MAX_XRES ;
break ;
case VBE_DISPI_INDEX_YRES :
val = VBE_DISPI_MAX_YRES ;
break ;
case VBE_DISPI_INDEX_BPP :
val = VBE_DISPI_MAX_BPP ;
break ;
default :
ths
authored
18 years ago
541
val = s -> vbe_regs [ s -> vbe_index ];
542
543
544
break ;
}
} else {
ths
authored
18 years ago
545
val = s -> vbe_regs [ s -> vbe_index ];
546
547
}
} else {
548
val = 0 ;
549
}
550
# ifdef DEBUG_BOCHS_VBE
551
printf ( "VBE: read index=0x%x val=0x%x \n " , s -> vbe_index , val );
552
553
554
555
# endif
return val ;
}
556
557
558
559
560
561
562
static void vbe_ioport_write_index ( void * opaque , uint32_t addr , uint32_t val )
{
VGAState * s = opaque ;
s -> vbe_index = val ;
}
static void vbe_ioport_write_data ( void * opaque , uint32_t addr , uint32_t val )
563
{
564
VGAState * s = opaque ;
565
566
if ( s -> vbe_index <= VBE_DISPI_INDEX_NB ) {
567
568
569
570
571
# ifdef DEBUG_BOCHS_VBE
printf ( "VBE: write index=0x%x val=0x%x \n " , s -> vbe_index , val );
# endif
switch ( s -> vbe_index ) {
case VBE_DISPI_INDEX_ID :
572
573
if ( val == VBE_DISPI_ID0 ||
val == VBE_DISPI_ID1 ||
574
575
576
val == VBE_DISPI_ID2 ||
val == VBE_DISPI_ID3 ||
val == VBE_DISPI_ID4 ) {
577
578
s -> vbe_regs [ s -> vbe_index ] = val ;
}
579
580
break ;
case VBE_DISPI_INDEX_XRES :
581
582
583
if (( val <= VBE_DISPI_MAX_XRES ) && (( val & 7 ) == 0 )) {
s -> vbe_regs [ s -> vbe_index ] = val ;
}
584
585
break ;
case VBE_DISPI_INDEX_YRES :
586
587
588
if ( val <= VBE_DISPI_MAX_YRES ) {
s -> vbe_regs [ s -> vbe_index ] = val ;
}
589
590
591
592
break ;
case VBE_DISPI_INDEX_BPP :
if ( val == 0 )
val = 8 ;
ths
authored
18 years ago
593
if ( val == 4 || val == 8 || val == 15 ||
594
595
596
val == 16 || val == 24 || val == 32 ) {
s -> vbe_regs [ s -> vbe_index ] = val ;
}
597
598
break ;
case VBE_DISPI_INDEX_BANK :
599
600
601
602
603
if ( s -> vbe_regs [ VBE_DISPI_INDEX_BPP ] == 4 ) {
val &= ( s -> vbe_bank_mask >> 2 );
} else {
val &= s -> vbe_bank_mask ;
}
604
s -> vbe_regs [ s -> vbe_index ] = val ;
605
s -> bank_offset = ( val << 16 );
606
607
break ;
case VBE_DISPI_INDEX_ENABLE :
608
609
if (( val & VBE_DISPI_ENABLED ) &&
! ( s -> vbe_regs [ VBE_DISPI_INDEX_ENABLE ] & VBE_DISPI_ENABLED )) {
610
611
int h , shift_control ;
ths
authored
18 years ago
612
s -> vbe_regs [ VBE_DISPI_INDEX_VIRT_WIDTH ] =
613
s -> vbe_regs [ VBE_DISPI_INDEX_XRES ];
ths
authored
18 years ago
614
s -> vbe_regs [ VBE_DISPI_INDEX_VIRT_HEIGHT ] =
615
616
617
s -> vbe_regs [ VBE_DISPI_INDEX_YRES ];
s -> vbe_regs [ VBE_DISPI_INDEX_X_OFFSET ] = 0 ;
s -> vbe_regs [ VBE_DISPI_INDEX_Y_OFFSET ] = 0 ;
ths
authored
18 years ago
618
619
620
621
if ( s -> vbe_regs [ VBE_DISPI_INDEX_BPP ] == 4 )
s -> vbe_line_offset = s -> vbe_regs [ VBE_DISPI_INDEX_XRES ] >> 1 ;
else
ths
authored
18 years ago
622
s -> vbe_line_offset = s -> vbe_regs [ VBE_DISPI_INDEX_XRES ] *
623
624
(( s -> vbe_regs [ VBE_DISPI_INDEX_BPP ] + 7 ) >> 3 );
s -> vbe_start_addr = 0 ;
625
626
627
/* clear the screen (should be done in BIOS) */
if ( ! ( val & VBE_DISPI_NOCLEARMEM )) {
ths
authored
18 years ago
628
memset ( s -> vram_ptr , 0 ,
629
630
s -> vbe_regs [ VBE_DISPI_INDEX_YRES ] * s -> vbe_line_offset );
}
ths
authored
18 years ago
631
632
633
634
/* we initialize the VGA graphic mode ( should be done
in BIOS ) */
s -> gr [ 0x06 ] = ( s -> gr [ 0x06 ] & ~ 0x0c ) | 0x05 ; /* graphic mode + memory map 1 */
635
636
637
638
s -> cr [ 0x17 ] |= 3 ; /* no CGA modes */
s -> cr [ 0x13 ] = s -> vbe_line_offset >> 3 ;
/* width */
s -> cr [ 0x01 ] = ( s -> vbe_regs [ VBE_DISPI_INDEX_XRES ] >> 3 ) - 1 ;
639
/* height (only meaningful if < 1024) */
640
641
h = s -> vbe_regs [ VBE_DISPI_INDEX_YRES ] - 1 ;
s -> cr [ 0x12 ] = h ;
ths
authored
18 years ago
642
s -> cr [ 0x07 ] = ( s -> cr [ 0x07 ] & ~ 0x42 ) |
643
644
645
646
647
(( h >> 7 ) & 0x02 ) | (( h >> 3 ) & 0x40 );
/* line compare to 1023 */
s -> cr [ 0x18 ] = 0xff ;
s -> cr [ 0x07 ] |= 0x10 ;
s -> cr [ 0x09 ] |= 0x40 ;
ths
authored
18 years ago
648
649
650
651
652
653
if ( s -> vbe_regs [ VBE_DISPI_INDEX_BPP ] == 4 ) {
shift_control = 0 ;
s -> sr [ 0x01 ] &= ~ 8 ; /* no double line */
} else {
shift_control = 2 ;
654
s -> sr [ 4 ] |= 0x08 ; /* set chain 4 mode */
655
s -> sr [ 2 ] |= 0x0f ; /* activate all planes */
656
657
658
}
s -> gr [ 0x05 ] = ( s -> gr [ 0x05 ] & ~ 0x60 ) | ( shift_control << 5 );
s -> cr [ 0x09 ] &= ~ 0x9f ; /* no double scan */
659
660
} else {
/* XXX: the bios should do that */
661
s -> bank_offset = 0 ;
662
}
663
s -> dac_8bit = ( val & VBE_DISPI_8BIT_DAC ) > 0 ;
664
s -> vbe_regs [ s -> vbe_index ] = val ;
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
break ;
case VBE_DISPI_INDEX_VIRT_WIDTH :
{
int w , h , line_offset ;
if ( val < s -> vbe_regs [ VBE_DISPI_INDEX_XRES ])
return ;
w = val ;
if ( s -> vbe_regs [ VBE_DISPI_INDEX_BPP ] == 4 )
line_offset = w >> 1 ;
else
line_offset = w * (( s -> vbe_regs [ VBE_DISPI_INDEX_BPP ] + 7 ) >> 3 );
h = s -> vram_size / line_offset ;
/* XXX: support weird bochs semantics ? */
if ( h < s -> vbe_regs [ VBE_DISPI_INDEX_YRES ])
return ;
s -> vbe_regs [ VBE_DISPI_INDEX_VIRT_WIDTH ] = w ;
s -> vbe_regs [ VBE_DISPI_INDEX_VIRT_HEIGHT ] = h ;
s -> vbe_line_offset = line_offset ;
}
break ;
case VBE_DISPI_INDEX_X_OFFSET :
case VBE_DISPI_INDEX_Y_OFFSET :
{
int x ;
s -> vbe_regs [ s -> vbe_index ] = val ;
s -> vbe_start_addr = s -> vbe_line_offset * s -> vbe_regs [ VBE_DISPI_INDEX_Y_OFFSET ];
x = s -> vbe_regs [ VBE_DISPI_INDEX_X_OFFSET ];
if ( s -> vbe_regs [ VBE_DISPI_INDEX_BPP ] == 4 )
s -> vbe_start_addr += x >> 1 ;
else
s -> vbe_start_addr += x * (( s -> vbe_regs [ VBE_DISPI_INDEX_BPP ] + 7 ) >> 3 );
s -> vbe_start_addr >>= 2 ;
698
699
700
701
702
703
704
705
706
}
break ;
default :
break ;
}
}
}
# endif
707
/* called for accesses between 0xa0000 and 0xc0000 */
708
uint32_t vga_mem_readb ( void * opaque , target_phys_addr_t addr )
709
{
710
VGAState * s = opaque ;
711
712
int memory_map_mode , plane ;
uint32_t ret ;
ths
authored
18 years ago
713
714
715
/* convert to VGA memory offset */
memory_map_mode = ( s -> gr [ 6 ] >> 2 ) & 3 ;
716
addr &= 0x1ffff ;
717
718
719
720
switch ( memory_map_mode ) {
case 0 :
break ;
case 1 :
721
if ( addr >= 0x10000 )
722
return 0xff ;
723
addr += s -> bank_offset ;
724
725
break ;
case 2 :
726
addr -= 0x10000 ;
727
728
729
730
731
if ( addr >= 0x8000 )
return 0xff ;
break ;
default :
case 3 :
732
addr -= 0x18000 ;
733
734
if ( addr >= 0x8000 )
return 0xff ;
735
736
break ;
}
ths
authored
18 years ago
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
if ( s -> sr [ 4 ] & 0x08 ) {
/* chain 4 mode : simplest access */
ret = s -> vram_ptr [ addr ];
} else if ( s -> gr [ 5 ] & 0x10 ) {
/* odd/even mode (aka text mode mapping) */
plane = ( s -> gr [ 4 ] & 2 ) | ( addr & 1 );
ret = s -> vram_ptr [(( addr & ~ 1 ) << 1 ) | plane ];
} else {
/* standard VGA latched access */
s -> latch = (( uint32_t * ) s -> vram_ptr )[ addr ];
if ( ! ( s -> gr [ 5 ] & 0x08 )) {
/* read mode 0 */
plane = s -> gr [ 4 ];
752
ret = GET_PLANE ( s -> latch , plane );
753
754
755
756
757
758
759
760
761
762
763
} else {
/* read mode 1 */
ret = ( s -> latch ^ mask16 [ s -> gr [ 2 ]]) & mask16 [ s -> gr [ 7 ]];
ret |= ret >> 16 ;
ret |= ret >> 8 ;
ret = ( ~ ret ) & 0xff ;
}
}
return ret ;
}
764
static uint32_t vga_mem_readw ( void * opaque , target_phys_addr_t addr )
765
766
{
uint32_t v ;
767
# ifdef TARGET_WORDS_BIGENDIAN
768
769
v = vga_mem_readb ( opaque , addr ) << 8 ;
v |= vga_mem_readb ( opaque , addr + 1 );
770
# else
771
772
v = vga_mem_readb ( opaque , addr );
v |= vga_mem_readb ( opaque , addr + 1 ) << 8 ;
773
# endif
774
775
776
return v ;
}
777
static uint32_t vga_mem_readl ( void * opaque , target_phys_addr_t addr )
778
779
{
uint32_t v ;
780
# ifdef TARGET_WORDS_BIGENDIAN
781
782
783
784
v = vga_mem_readb ( opaque , addr ) << 24 ;
v |= vga_mem_readb ( opaque , addr + 1 ) << 16 ;
v |= vga_mem_readb ( opaque , addr + 2 ) << 8 ;
v |= vga_mem_readb ( opaque , addr + 3 );
785
# else
786
787
788
789
v = vga_mem_readb ( opaque , addr );
v |= vga_mem_readb ( opaque , addr + 1 ) << 8 ;
v |= vga_mem_readb ( opaque , addr + 2 ) << 16 ;
v |= vga_mem_readb ( opaque , addr + 3 ) << 24 ;
790
# endif
791
792
793
794
return v ;
}
/* called for accesses between 0xa0000 and 0xc0000 */
795
void vga_mem_writeb ( void * opaque , target_phys_addr_t addr , uint32_t val )
796
{
797
VGAState * s = opaque ;
798
int memory_map_mode , plane , write_mode , b , func_select , mask ;
799
800
uint32_t write_mask , bit_mask , set_mask ;
801
# ifdef DEBUG_VGA_MEM
802
printf ( "vga: [0x" TARGET_FMT_plx "] = 0x%02x \n " , addr , val );
803
804
805
# endif
/* convert to VGA memory offset */
memory_map_mode = ( s -> gr [ 6 ] >> 2 ) & 3 ;
806
addr &= 0x1ffff ;
807
808
809
810
switch ( memory_map_mode ) {
case 0 :
break ;
case 1 :
811
if ( addr >= 0x10000 )
812
return ;
813
addr += s -> bank_offset ;
814
815
break ;
case 2 :
816
addr -= 0x10000 ;
817
818
819
820
821
if ( addr >= 0x8000 )
return ;
break ;
default :
case 3 :
822
addr -= 0x18000 ;
823
824
if ( addr >= 0x8000 )
return ;
825
826
break ;
}
ths
authored
18 years ago
827
828
829
830
if ( s -> sr [ 4 ] & 0x08 ) {
/* chain 4 mode : simplest access */
plane = addr & 3 ;
831
832
mask = ( 1 << plane );
if ( s -> sr [ 2 ] & mask ) {
833
s -> vram_ptr [ addr ] = val ;
834
# ifdef DEBUG_VGA_MEM
835
printf ( "vga: chain4: [0x" TARGET_FMT_plx "] \n " , addr );
836
# endif
837
s -> plane_updated |= mask ; /* only used to detect font change */
838
cpu_physical_memory_set_dirty ( s -> vram_offset + addr );
839
840
841
842
}
} else if ( s -> gr [ 5 ] & 0x10 ) {
/* odd/even mode (aka text mode mapping) */
plane = ( s -> gr [ 4 ] & 2 ) | ( addr & 1 );
843
844
mask = ( 1 << plane );
if ( s -> sr [ 2 ] & mask ) {
845
846
addr = (( addr & ~ 1 ) << 1 ) | plane ;
s -> vram_ptr [ addr ] = val ;
847
# ifdef DEBUG_VGA_MEM
848
printf ( "vga: odd/even: [0x" TARGET_FMT_plx "] \n " , addr );
849
# endif
850
s -> plane_updated |= mask ; /* only used to detect font change */
851
cpu_physical_memory_set_dirty ( s -> vram_offset + addr );
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
}
} else {
/* standard VGA latched access */
write_mode = s -> gr [ 5 ] & 3 ;
switch ( write_mode ) {
default :
case 0 :
/* rotate */
b = s -> gr [ 3 ] & 7 ;
val = (( val >> b ) | ( val << ( 8 - b ))) & 0xff ;
val |= val << 8 ;
val |= val << 16 ;
/* apply set/reset mask */
set_mask = mask16 [ s -> gr [ 1 ]];
val = ( val & ~ set_mask ) | ( mask16 [ s -> gr [ 0 ]] & set_mask );
bit_mask = s -> gr [ 8 ];
break ;
case 1 :
val = s -> latch ;
goto do_write ;
case 2 :
val = mask16 [ val & 0x0f ];
bit_mask = s -> gr [ 8 ];
break ;
case 3 :
/* rotate */
b = s -> gr [ 3 ] & 7 ;
880
val = ( val >> b ) | ( val << ( 8 - b ));
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
bit_mask = s -> gr [ 8 ] & val ;
val = mask16 [ s -> gr [ 0 ]];
break ;
}
/* apply logical operation */
func_select = s -> gr [ 3 ] >> 3 ;
switch ( func_select ) {
case 0 :
default :
/* nothing to do */
break ;
case 1 :
/* and */
val &= s -> latch ;
break ;
case 2 :
/* or */
val |= s -> latch ;
break ;
case 3 :
/* xor */
val ^= s -> latch ;
break ;
}
/* apply bit mask */
bit_mask |= bit_mask << 8 ;
bit_mask |= bit_mask << 16 ;
val = ( val & bit_mask ) | ( s -> latch & ~ bit_mask );
do_write :
/* mask data according to sr[2] */
915
916
917
mask = s -> sr [ 2 ];
s -> plane_updated |= mask ; /* only used to detect font change */
write_mask = mask16 [ mask ];
ths
authored
18 years ago
918
919
(( uint32_t * ) s -> vram_ptr )[ addr ] =
((( uint32_t * ) s -> vram_ptr )[ addr ] & ~ write_mask ) |
920
( val & write_mask );
921
# ifdef DEBUG_VGA_MEM
922
923
printf ( "vga: latch: [0x" TARGET_FMT_plx "] mask=0x%08x val=0x%08x \n " ,
addr * 4 , write_mask , val );
924
# endif
925
cpu_physical_memory_set_dirty ( s -> vram_offset + ( addr << 2 ));
926
927
928
}
}
929
static void vga_mem_writew ( void * opaque , target_phys_addr_t addr , uint32_t val )
930
{
931
# ifdef TARGET_WORDS_BIGENDIAN
932
933
vga_mem_writeb ( opaque , addr , ( val >> 8 ) & 0xff );
vga_mem_writeb ( opaque , addr + 1 , val & 0xff );
934
# else
935
936
vga_mem_writeb ( opaque , addr , val & 0xff );
vga_mem_writeb ( opaque , addr + 1 , ( val >> 8 ) & 0xff );
937
# endif
938
939
}
940
static void vga_mem_writel ( void * opaque , target_phys_addr_t addr , uint32_t val )
941
{
942
# ifdef TARGET_WORDS_BIGENDIAN
943
944
945
946
vga_mem_writeb ( opaque , addr , ( val >> 24 ) & 0xff );
vga_mem_writeb ( opaque , addr + 1 , ( val >> 16 ) & 0xff );
vga_mem_writeb ( opaque , addr + 2 , ( val >> 8 ) & 0xff );
vga_mem_writeb ( opaque , addr + 3 , val & 0xff );
947
# else
948
949
950
951
vga_mem_writeb ( opaque , addr , val & 0xff );
vga_mem_writeb ( opaque , addr + 1 , ( val >> 8 ) & 0xff );
vga_mem_writeb ( opaque , addr + 2 , ( val >> 16 ) & 0xff );
vga_mem_writeb ( opaque , addr + 3 , ( val >> 24 ) & 0xff );
952
# endif
953
954
955
956
957
958
}
typedef void vga_draw_glyph8_func ( uint8_t * d , int linesize ,
const uint8_t * font_ptr , int h ,
uint32_t fgcol , uint32_t bgcol );
typedef void vga_draw_glyph9_func ( uint8_t * d , int linesize ,
ths
authored
18 years ago
959
const uint8_t * font_ptr , int h ,
960
uint32_t fgcol , uint32_t bgcol , int dup9 );
ths
authored
18 years ago
961
typedef void vga_draw_line_func ( VGAState * s1 , uint8_t * d ,
962
963
964
965
966
967
968
969
const uint8_t * s , int width );
# define DEPTH 8
# include "vga_template.h"
# define DEPTH 15
# include "vga_template.h"
970
971
972
973
974
975
976
977
# define BGR_FORMAT
# define DEPTH 15
# include "vga_template.h"
# define DEPTH 16
# include "vga_template.h"
# define BGR_FORMAT
978
979
980
981
982
983
# define DEPTH 16
# include "vga_template.h"
# define DEPTH 32
# include "vga_template.h"
984
985
986
987
# define BGR_FORMAT
# define DEPTH 32
# include "vga_template.h"
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
static unsigned int rgb_to_pixel8_dup ( unsigned int r , unsigned int g , unsigned b )
{
unsigned int col ;
col = rgb_to_pixel8 ( r , g , b );
col |= col << 8 ;
col |= col << 16 ;
return col ;
}
static unsigned int rgb_to_pixel15_dup ( unsigned int r , unsigned int g , unsigned b )
{
unsigned int col ;
col = rgb_to_pixel15 ( r , g , b );
col |= col << 16 ;
return col ;
}
1005
1006
1007
1008
1009
1010
1011
1012
1013
static unsigned int rgb_to_pixel15bgr_dup ( unsigned int r , unsigned int g ,
unsigned int b )
{
unsigned int col ;
col = rgb_to_pixel15bgr ( r , g , b );
col |= col << 16 ;
return col ;
}
1014
1015
1016
1017
1018
1019
1020
1021
static unsigned int rgb_to_pixel16_dup ( unsigned int r , unsigned int g , unsigned b )
{
unsigned int col ;
col = rgb_to_pixel16 ( r , g , b );
col |= col << 16 ;
return col ;
}
1022
1023
1024
1025
1026
1027
1028
1029
1030
static unsigned int rgb_to_pixel16bgr_dup ( unsigned int r , unsigned int g ,
unsigned int b )
{
unsigned int col ;
col = rgb_to_pixel16bgr ( r , g , b );
col |= col << 16 ;
return col ;
}
1031
1032
1033
1034
1035
1036
1037
static unsigned int rgb_to_pixel32_dup ( unsigned int r , unsigned int g , unsigned b )
{
unsigned int col ;
col = rgb_to_pixel32 ( r , g , b );
return col ;
}
1038
1039
1040
1041
1042
1043
1044
static unsigned int rgb_to_pixel32bgr_dup ( unsigned int r , unsigned int g , unsigned b )
{
unsigned int col ;
col = rgb_to_pixel32bgr ( r , g , b );
return col ;
}
1045
1046
1047
/* return true if the palette was modified */
static int update_palette16 ( VGAState * s )
{
1048
int full_update , i ;
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
uint32_t v , col , * palette ;
full_update = 0 ;
palette = s -> last_palette ;
for ( i = 0 ; i < 16 ; i ++ ) {
v = s -> ar [ i ];
if ( s -> ar [ 0x10 ] & 0x80 )
v = (( s -> ar [ 0x14 ] & 0xf ) << 4 ) | ( v & 0xf );
else
v = (( s -> ar [ 0x14 ] & 0xc ) << 4 ) | ( v & 0x3f );
v = v * 3 ;
ths
authored
18 years ago
1060
1061
col = s -> rgb_to_pixel ( c6_to_8 ( s -> palette [ v ]),
c6_to_8 ( s -> palette [ v + 1 ]),
1062
1063
1064
1065
c6_to_8 ( s -> palette [ v + 2 ]));
if ( col != palette [ i ]) {
full_update = 1 ;
palette [ i ] = col ;
1066
}
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
}
return full_update ;
}
/* return true if the palette was modified */
static int update_palette256 ( VGAState * s )
{
int full_update , i ;
uint32_t v , col , * palette ;
full_update = 0 ;
palette = s -> last_palette ;
v = 0 ;
for ( i = 0 ; i < 256 ; i ++ ) {
1081
if ( s -> dac_8bit ) {
ths
authored
18 years ago
1082
1083
col = s -> rgb_to_pixel ( s -> palette [ v ],
s -> palette [ v + 1 ],
1084
1085
s -> palette [ v + 2 ]);
} else {
ths
authored
18 years ago
1086
1087
col = s -> rgb_to_pixel ( c6_to_8 ( s -> palette [ v ]),
c6_to_8 ( s -> palette [ v + 1 ]),
1088
1089
c6_to_8 ( s -> palette [ v + 2 ]));
}
1090
1091
1092
1093
if ( col != palette [ i ]) {
full_update = 1 ;
palette [ i ] = col ;
}
1094
v += 3 ;
1095
1096
1097
1098
}
return full_update ;
}
ths
authored
18 years ago
1099
1100
static void vga_get_offsets ( VGAState * s ,
uint32_t * pline_offset ,
1101
1102
uint32_t * pstart_addr ,
uint32_t * pline_compare )
1103
{
1104
uint32_t start_addr , line_offset , line_compare ;
1105
1106
1107
1108
# ifdef CONFIG_BOCHS_VBE
if ( s -> vbe_regs [ VBE_DISPI_INDEX_ENABLE ] & VBE_DISPI_ENABLED ) {
line_offset = s -> vbe_line_offset ;
start_addr = s -> vbe_start_addr ;
1109
line_compare = 65535 ;
1110
1111
} else
# endif
ths
authored
18 years ago
1112
{
1113
1114
1115
/* compute line_offset in bytes */
line_offset = s -> cr [ 0x13 ];
line_offset <<= 3 ;
1116
1117
1118
/* starting address */
start_addr = s -> cr [ 0x0d ] | ( s -> cr [ 0x0c ] << 8 );
1119
1120
/* line compare */
ths
authored
18 years ago
1121
line_compare = s -> cr [ 0x18 ] |
1122
1123
(( s -> cr [ 0x07 ] & 0x10 ) << 4 ) |
(( s -> cr [ 0x09 ] & 0x40 ) << 3 );
1124
}
1125
1126
* pline_offset = line_offset ;
* pstart_addr = start_addr ;
1127
* pline_compare = line_compare ;
1128
1129
1130
1131
1132
1133
1134
}
/* update start_addr and line_offset. Return TRUE if modified */
static int update_basic_params ( VGAState * s )
{
int full_update ;
uint32_t start_addr , line_offset , line_compare ;
ths
authored
18 years ago
1135
1136
1137
full_update = 0 ;
1138
s -> get_offsets ( s , & line_offset , & start_addr , & line_compare );
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
if ( line_offset != s -> line_offset ||
start_addr != s -> start_addr ||
line_compare != s -> line_compare ) {
s -> line_offset = line_offset ;
s -> start_addr = start_addr ;
s -> line_compare = line_compare ;
full_update = 1 ;
}
return full_update ;
}
1151
# define NB_DEPTHS 7
1152
1153
static inline int get_depth_index ( DisplayState * s )
1154
{
1155
switch ( ds_get_bits_per_pixel ( s )) {
1156
1157
1158
1159
default :
case 8 :
return 0 ;
case 15 :
1160
return 1 ;
1161
case 16 :
1162
return 2 ;
1163
case 32 :
1164
1165
1166
1167
if ( is_surface_bgr ( s -> surface ))
return 4 ;
else
return 3 ;
1168
1169
1170
}
}
1171
static vga_draw_glyph8_func * vga_draw_glyph8_table [ NB_DEPTHS ] = {
1172
1173
1174
1175
vga_draw_glyph8_8 ,
vga_draw_glyph8_16 ,
vga_draw_glyph8_16 ,
vga_draw_glyph8_32 ,
1176
vga_draw_glyph8_32 ,
1177
1178
vga_draw_glyph8_16 ,
vga_draw_glyph8_16 ,
1179
1180
};
1181
static vga_draw_glyph8_func * vga_draw_glyph16_table [ NB_DEPTHS ] = {
1182
1183
1184
1185
vga_draw_glyph16_8 ,
vga_draw_glyph16_16 ,
vga_draw_glyph16_16 ,
vga_draw_glyph16_32 ,
1186
vga_draw_glyph16_32 ,
1187
1188
vga_draw_glyph16_16 ,
vga_draw_glyph16_16 ,
1189
1190
};
1191
static vga_draw_glyph9_func * vga_draw_glyph9_table [ NB_DEPTHS ] = {
1192
1193
1194
1195
vga_draw_glyph9_8 ,
vga_draw_glyph9_16 ,
vga_draw_glyph9_16 ,
vga_draw_glyph9_32 ,
1196
vga_draw_glyph9_32 ,
1197
1198
vga_draw_glyph9_16 ,
vga_draw_glyph9_16 ,
1199
};
ths
authored
18 years ago
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
static const uint8_t cursor_glyph [ 32 * 4 ] = {
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff , 0xff ,
ths
authored
18 years ago
1218
};
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
static void vga_get_text_resolution ( VGAState * s , int * pwidth , int * pheight ,
int * pcwidth , int * pcheight )
{
int width , cwidth , height , cheight ;
/* total width & height */
cheight = ( s -> cr [ 9 ] & 0x1f ) + 1 ;
cwidth = 8 ;
if ( ! ( s -> sr [ 1 ] & 0x01 ))
cwidth = 9 ;
if ( s -> sr [ 1 ] & 0x08 )
cwidth = 16 ; /* NOTE: no 18 pixel wide */
width = ( s -> cr [ 0x01 ] + 1 );
if ( s -> cr [ 0x06 ] == 100 ) {
/* ugly hack for CGA 160x100x16 - explain me the logic */
height = 100 ;
} else {
height = s -> cr [ 0x12 ] |
(( s -> cr [ 0x07 ] & 0x02 ) << 7 ) |
(( s -> cr [ 0x07 ] & 0x40 ) << 3 );
height = ( height + 1 ) / cheight ;
}
* pwidth = width ;
* pheight = height ;
* pcwidth = cwidth ;
* pcheight = cheight ;
}
1249
1250
typedef unsigned int rgb_to_pixel_dup_func ( unsigned int r , unsigned int g , unsigned b );
1251
1252
1253
1254
1255
1256
1257
1258
1259
static rgb_to_pixel_dup_func * rgb_to_pixel_dup_table [ NB_DEPTHS ] = {
rgb_to_pixel8_dup ,
rgb_to_pixel15_dup ,
rgb_to_pixel16_dup ,
rgb_to_pixel32_dup ,
rgb_to_pixel32bgr_dup ,
rgb_to_pixel15bgr_dup ,
rgb_to_pixel16bgr_dup ,
};
1260
ths
authored
18 years ago
1261
1262
/*
* Text mode update
1263
1264
* Missing :
* - double scan
ths
authored
18 years ago
1265
* - double width
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
* - underline
* - flashing
*/
static void vga_draw_text ( VGAState * s , int full_update )
{
int cx , cy , cheight , cw , ch , cattr , height , width , ch_attr ;
int cx_min , cx_max , linesize , x_incr ;
uint32_t offset , fgcol , bgcol , v , cursor_offset ;
uint8_t * d1 , * d , * src , * s1 , * dest , * cursor_ptr ;
const uint8_t * font_ptr , * font_base [ 2 ];
int dup9 , line_offset , depth_index ;
uint32_t * palette ;
uint32_t * ch_attr_ptr ;
vga_draw_glyph8_func * vga_draw_glyph8 ;
vga_draw_glyph9_func * vga_draw_glyph9 ;
/* compute font data address (in plane 2) */
v = s -> sr [ 3 ];
1284
offset = ((( v >> 4 ) & 1 ) | (( v << 1 ) & 6 )) * 8192 * 4 + 2 ;
1285
1286
1287
1288
1289
1290
if ( offset != s -> font_offsets [ 0 ]) {
s -> font_offsets [ 0 ] = offset ;
full_update = 1 ;
}
font_base [ 0 ] = s -> vram_ptr + offset ;
1291
offset = ((( v >> 5 ) & 1 ) | (( v >> 1 ) & 6 )) * 8192 * 4 + 2 ;
1292
1293
1294
1295
1296
font_base [ 1 ] = s -> vram_ptr + offset ;
if ( offset != s -> font_offsets [ 1 ]) {
s -> font_offsets [ 1 ] = offset ;
full_update = 1 ;
}
1297
1298
1299
1300
1301
1302
if ( s -> plane_updated & ( 1 << 2 )) {
/* if the plane 2 was modified since the last display , it
indicates the font may have been modified */
s -> plane_updated = 0 ;
full_update = 1 ;
}
1303
full_update |= update_basic_params ( s );
1304
1305
1306
1307
line_offset = s -> line_offset ;
s1 = s -> vram_ptr + ( s -> start_addr * 4 );
1308
vga_get_text_resolution ( s , & width , & height , & cw , & cheight );
1309
x_incr = cw * (( ds_get_bits_per_pixel ( s -> ds ) + 7 ) >> 3 );
1310
1311
1312
1313
1314
if (( height * width ) > CH_ATTR_SIZE ) {
/* better than nothing: exit if transient size is too big */
return ;
}
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
if ( width != s -> last_width || height != s -> last_height ||
cw != s -> last_cw || cheight != s -> last_ch || s -> last_depth ) {
s -> last_scr_width = width * cw ;
s -> last_scr_height = height * cheight ;
qemu_console_resize ( s -> ds , s -> last_scr_width , s -> last_scr_height );
s -> last_depth = 0 ;
s -> last_width = width ;
s -> last_height = height ;
s -> last_ch = cheight ;
s -> last_cw = cw ;
full_update = 1 ;
}
1327
1328
1329
1330
1331
1332
s -> rgb_to_pixel =
rgb_to_pixel_dup_table [ get_depth_index ( s -> ds )];
full_update |= update_palette16 ( s );
palette = s -> last_palette ;
x_incr = cw * (( ds_get_bits_per_pixel ( s -> ds ) + 7 ) >> 3 );
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
cursor_offset = (( s -> cr [ 0x0e ] << 8 ) | s -> cr [ 0x0f ]) - s -> start_addr ;
if ( cursor_offset != s -> cursor_offset ||
s -> cr [ 0xa ] != s -> cursor_start ||
s -> cr [ 0xb ] != s -> cursor_end ) {
/* if the cursor position changed , we update the old and new
chars */
if ( s -> cursor_offset < CH_ATTR_SIZE )
s -> last_ch_attr [ s -> cursor_offset ] = - 1 ;
if ( cursor_offset < CH_ATTR_SIZE )
s -> last_ch_attr [ cursor_offset ] = - 1 ;
s -> cursor_offset = cursor_offset ;
s -> cursor_start = s -> cr [ 0xa ];
s -> cursor_end = s -> cr [ 0xb ];
}
1347
cursor_ptr = s -> vram_ptr + ( s -> start_addr + cursor_offset ) * 4 ;
ths
authored
18 years ago
1348
1349
depth_index = get_depth_index ( s -> ds );
1350
1351
1352
1353
if ( cw == 16 )
vga_draw_glyph8 = vga_draw_glyph16_table [ depth_index ];
else
vga_draw_glyph8 = vga_draw_glyph8_table [ depth_index ];
1354
vga_draw_glyph9 = vga_draw_glyph9_table [ depth_index ];
ths
authored
18 years ago
1355
1356
1357
dest = ds_get_data ( s -> ds );
linesize = ds_get_linesize ( s -> ds );
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
ch_attr_ptr = s -> last_ch_attr ;
for ( cy = 0 ; cy < height ; cy ++ ) {
d1 = dest ;
src = s1 ;
cx_min = width ;
cx_max = - 1 ;
for ( cx = 0 ; cx < width ; cx ++ ) {
ch_attr = * ( uint16_t * ) src ;
if ( full_update || ch_attr != * ch_attr_ptr ) {
if ( cx < cx_min )
cx_min = cx ;
if ( cx > cx_max )
cx_max = cx ;
* ch_attr_ptr = ch_attr ;
1372
# ifdef HOST_WORDS_BIGENDIAN
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
ch = ch_attr >> 8 ;
cattr = ch_attr & 0xff ;
# else
ch = ch_attr & 0xff ;
cattr = ch_attr >> 8 ;
# endif
font_ptr = font_base [( cattr >> 3 ) & 1 ];
font_ptr += 32 * 4 * ch ;
bgcol = palette [ cattr >> 4 ];
fgcol = palette [ cattr & 0x0f ];
1383
if ( cw != 9 ) {
ths
authored
18 years ago
1384
vga_draw_glyph8 ( d1 , linesize ,
1385
1386
1387
1388
1389
font_ptr , cheight , fgcol , bgcol );
} else {
dup9 = 0 ;
if ( ch >= 0xb0 && ch <= 0xdf && ( s -> ar [ 0x10 ] & 0x04 ))
dup9 = 1 ;
ths
authored
18 years ago
1390
vga_draw_glyph9 ( d1 , linesize ,
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
font_ptr , cheight , fgcol , bgcol , dup9 );
}
if ( src == cursor_ptr &&
! ( s -> cr [ 0x0a ] & 0x20 )) {
int line_start , line_last , h ;
/* draw the cursor */
line_start = s -> cr [ 0x0a ] & 0x1f ;
line_last = s -> cr [ 0x0b ] & 0x1f ;
/* XXX: check that */
if ( line_last > cheight - 1 )
line_last = cheight - 1 ;
if ( line_last >= line_start && line_start < cheight ) {
h = line_last - line_start + 1 ;
d = d1 + linesize * line_start ;
1405
if ( cw != 9 ) {
ths
authored
18 years ago
1406
vga_draw_glyph8 ( d , linesize ,
1407
1408
cursor_glyph , h , fgcol , bgcol );
} else {
ths
authored
18 years ago
1409
vga_draw_glyph9 ( d , linesize ,
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
cursor_glyph , h , fgcol , bgcol , 1 );
}
}
}
}
d1 += x_incr ;
src += 4 ;
ch_attr_ptr ++ ;
}
if ( cx_max != - 1 ) {
ths
authored
18 years ago
1420
dpy_update ( s -> ds , cx_min * cw , cy * cheight ,
1421
1422
1423
1424
1425
1426
1427
( cx_max - cx_min + 1 ) * cw , cheight );
}
dest += linesize * cheight ;
s1 += line_offset ;
}
}
1428
1429
1430
1431
1432
1433
1434
1435
1436
enum {
VGA_DRAW_LINE2 ,
VGA_DRAW_LINE2D2 ,
VGA_DRAW_LINE4 ,
VGA_DRAW_LINE4D2 ,
VGA_DRAW_LINE8D2 ,
VGA_DRAW_LINE8 ,
VGA_DRAW_LINE15 ,
VGA_DRAW_LINE16 ,
1437
VGA_DRAW_LINE24 ,
1438
1439
1440
1441
VGA_DRAW_LINE32 ,
VGA_DRAW_LINE_NB ,
};
1442
static vga_draw_line_func * vga_draw_line_table [ NB_DEPTHS * VGA_DRAW_LINE_NB ] = {
1443
1444
1445
1446
vga_draw_line2_8 ,
vga_draw_line2_16 ,
vga_draw_line2_16 ,
vga_draw_line2_32 ,
1447
vga_draw_line2_32 ,
1448
1449
vga_draw_line2_16 ,
vga_draw_line2_16 ,
1450
1451
1452
1453
1454
vga_draw_line2d2_8 ,
vga_draw_line2d2_16 ,
vga_draw_line2d2_16 ,
vga_draw_line2d2_32 ,
1455
vga_draw_line2d2_32 ,
1456
1457
vga_draw_line2d2_16 ,
vga_draw_line2d2_16 ,
1458
1459
1460
1461
1462
vga_draw_line4_8 ,
vga_draw_line4_16 ,
vga_draw_line4_16 ,
vga_draw_line4_32 ,
1463
vga_draw_line4_32 ,
1464
1465
vga_draw_line4_16 ,
vga_draw_line4_16 ,
1466
1467
1468
1469
1470
vga_draw_line4d2_8 ,
vga_draw_line4d2_16 ,
vga_draw_line4d2_16 ,
vga_draw_line4d2_32 ,
1471
vga_draw_line4d2_32 ,
1472
1473
vga_draw_line4d2_16 ,
vga_draw_line4d2_16 ,
1474
1475
1476
1477
1478
vga_draw_line8d2_8 ,
vga_draw_line8d2_16 ,
vga_draw_line8d2_16 ,
vga_draw_line8d2_32 ,
1479
vga_draw_line8d2_32 ,
1480
1481
vga_draw_line8d2_16 ,
vga_draw_line8d2_16 ,
1482
1483
1484
1485
1486
vga_draw_line8_8 ,
vga_draw_line8_16 ,
vga_draw_line8_16 ,
vga_draw_line8_32 ,
1487
vga_draw_line8_32 ,
1488
1489
vga_draw_line8_16 ,
vga_draw_line8_16 ,
1490
1491
1492
1493
1494
vga_draw_line15_8 ,
vga_draw_line15_15 ,
vga_draw_line15_16 ,
vga_draw_line15_32 ,
1495
vga_draw_line15_32bgr ,
1496
1497
vga_draw_line15_15bgr ,
vga_draw_line15_16bgr ,
1498
1499
1500
1501
1502
vga_draw_line16_8 ,
vga_draw_line16_15 ,
vga_draw_line16_16 ,
vga_draw_line16_32 ,
1503
vga_draw_line16_32bgr ,
1504
1505
vga_draw_line16_15bgr ,
vga_draw_line16_16bgr ,
1506
1507
1508
1509
1510
vga_draw_line24_8 ,
vga_draw_line24_15 ,
vga_draw_line24_16 ,
vga_draw_line24_32 ,
1511
vga_draw_line24_32bgr ,
1512
1513
vga_draw_line24_15bgr ,
vga_draw_line24_16bgr ,
1514
1515
1516
1517
1518
vga_draw_line32_8 ,
vga_draw_line32_15 ,
vga_draw_line32_16 ,
vga_draw_line32_32 ,
1519
vga_draw_line32_32bgr ,
1520
1521
vga_draw_line32_15bgr ,
vga_draw_line32_16bgr ,
1522
1523
};
1524
1525
1526
1527
1528
1529
static int vga_get_bpp ( VGAState * s )
{
int ret ;
# ifdef CONFIG_BOCHS_VBE
if ( s -> vbe_regs [ VBE_DISPI_INDEX_ENABLE ] & VBE_DISPI_ENABLED ) {
ret = s -> vbe_regs [ VBE_DISPI_INDEX_BPP ];
ths
authored
18 years ago
1530
} else
1531
1532
1533
1534
1535
1536
1537
# endif
{
ret = 0 ;
}
return ret ;
}
1538
1539
1540
static void vga_get_resolution ( VGAState * s , int * pwidth , int * pheight )
{
int width , height ;
ths
authored
18 years ago
1541
1542
1543
1544
1545
# ifdef CONFIG_BOCHS_VBE
if ( s -> vbe_regs [ VBE_DISPI_INDEX_ENABLE ] & VBE_DISPI_ENABLED ) {
width = s -> vbe_regs [ VBE_DISPI_INDEX_XRES ];
height = s -> vbe_regs [ VBE_DISPI_INDEX_YRES ];
ths
authored
18 years ago
1546
} else
1547
1548
1549
# endif
{
width = ( s -> cr [ 0x01 ] + 1 ) * 8 ;
ths
authored
18 years ago
1550
1551
height = s -> cr [ 0x12 ] |
(( s -> cr [ 0x07 ] & 0x02 ) << 7 ) |
1552
1553
1554
(( s -> cr [ 0x07 ] & 0x40 ) << 3 );
height = ( height + 1 );
}
1555
1556
1557
1558
* pwidth = width ;
* pheight = height ;
}
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
void vga_invalidate_scanlines ( VGAState * s , int y1 , int y2 )
{
int y ;
if ( y1 >= VGA_MAX_HEIGHT )
return ;
if ( y2 >= VGA_MAX_HEIGHT )
y2 = VGA_MAX_HEIGHT ;
for ( y = y1 ; y < y2 ; y ++ ) {
s -> invalidated_y_table [ y >> 5 ] |= 1 << ( y & 0x1f );
}
}
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
static void vga_sync_dirty_bitmap ( VGAState * s )
{
if ( s -> map_addr )
cpu_physical_sync_dirty_bitmap ( s -> map_addr , s -> map_end );
if ( s -> lfb_vram_mapped ) {
cpu_physical_sync_dirty_bitmap ( isa_mem_base + 0xa0000 , 0xa8000 );
cpu_physical_sync_dirty_bitmap ( isa_mem_base + 0xa8000 , 0xb0000 );
}
}
1582
1583
1584
1585
/*
* graphic modes
*/
static void vga_draw_graphic ( VGAState * s , int full_update )
1586
{
1587
1588
1589
int y1 , y , update , linesize , y_start , double_scan , mask , depth ;
int width , height , shift_control , line_offset , bwidth , bits ;
ram_addr_t page0 , page1 , page_min , page_max ;
1590
int disp_width , multi_scan , multi_run ;
1591
1592
1593
1594
1595
1596
1597
1598
uint8_t * d ;
uint32_t v , addr1 , addr ;
vga_draw_line_func * vga_draw_line ;
full_update |= update_basic_params ( s );
if ( ! full_update )
vga_sync_dirty_bitmap ( s );
1599
1600
s -> get_resolution ( s , & width , & height );
1601
disp_width = width ;
1602
1603
shift_control = ( s -> gr [ 0x05 ] >> 5 ) & 3 ;
1604
double_scan = ( s -> cr [ 0x09 ] >> 7 );
1605
1606
1607
1608
1609
1610
1611
1612
if ( shift_control != 1 ) {
multi_scan = ((( s -> cr [ 0x09 ] & 0x1f ) + 1 ) << double_scan ) - 1 ;
} else {
/* in CGA modes, multi_scan is ignored */
/* XXX: is it correct ? */
multi_scan = double_scan ;
}
multi_run = multi_scan ;
1613
1614
if ( shift_control != s -> shift_control ||
double_scan != s -> double_scan ) {
1615
full_update = 1 ;
1616
s -> shift_control = shift_control ;
1617
s -> double_scan = double_scan ;
1618
}
ths
authored
18 years ago
1619
malc
authored
16 years ago
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
if ( shift_control == 0 ) {
if ( s -> sr [ 0x01 ] & 8 ) {
disp_width <<= 1 ;
}
} else if ( shift_control == 1 ) {
if ( s -> sr [ 0x01 ] & 8 ) {
disp_width <<= 1 ;
}
}
1630
depth = s -> get_bpp ( s );
1631
1632
1633
if ( s -> line_offset != s -> last_line_offset ||
disp_width != s -> last_width ||
height != s -> last_height ||
1634
s -> last_depth != depth ) {
1635
# if defined ( HOST_WORDS_BIGENDIAN ) == defined ( TARGET_WORDS_BIGENDIAN )
1636
if ( depth == 16 || depth == 32 ) {
malc
authored
16 years ago
1637
1638
1639
# else
if ( depth == 32 ) {
# endif
1640
1641
1642
1643
qemu_free_displaysurface ( s -> ds );
s -> ds -> surface = qemu_create_displaysurface_from ( disp_width , height , depth ,
s -> line_offset ,
s -> vram_ptr + ( s -> start_addr * 4 ));
1644
# if defined ( HOST_WORDS_BIGENDIAN ) != defined ( TARGET_WORDS_BIGENDIAN )
1645
s -> ds -> surface -> pf = qemu_different_endianness_pixelformat ( depth );
malc
authored
16 years ago
1646
# endif
1647
dpy_resize ( s -> ds );
1648
1649
1650
1651
1652
1653
1654
1655
1656
} else {
qemu_console_resize ( s -> ds , disp_width , height );
}
s -> last_scr_width = disp_width ;
s -> last_scr_height = height ;
s -> last_width = disp_width ;
s -> last_height = height ;
s -> last_line_offset = s -> line_offset ;
s -> last_depth = depth ;
1657
1658
full_update = 1 ;
} else if ( is_buffer_shared ( s -> ds -> surface ) &&
1659
1660
1661
1662
1663
1664
1665
1666
( full_update || s -> ds -> surface -> data != s -> vram_ptr + ( s -> start_addr * 4 ))) {
s -> ds -> surface -> data = s -> vram_ptr + ( s -> start_addr * 4 );
dpy_setdata ( s -> ds );
}
s -> rgb_to_pixel =
rgb_to_pixel_dup_table [ get_depth_index ( s -> ds )];
1667
if ( shift_control == 0 ) {
1668
1669
1670
1671
1672
1673
full_update |= update_palette16 ( s );
if ( s -> sr [ 0x01 ] & 8 ) {
v = VGA_DRAW_LINE4D2 ;
} else {
v = VGA_DRAW_LINE4 ;
}
1674
bits = 4 ;
1675
} else if ( shift_control == 1 ) {
1676
1677
1678
1679
1680
1681
full_update |= update_palette16 ( s );
if ( s -> sr [ 0x01 ] & 8 ) {
v = VGA_DRAW_LINE2D2 ;
} else {
v = VGA_DRAW_LINE2 ;
}
1682
bits = 4 ;
1683
} else {
1684
1685
1686
switch ( s -> get_bpp ( s )) {
default :
case 0 :
1687
1688
full_update |= update_palette256 ( s );
v = VGA_DRAW_LINE8D2 ;
1689
bits = 4 ;
1690
1691
1692
1693
break ;
case 8 :
full_update |= update_palette256 ( s );
v = VGA_DRAW_LINE8 ;
1694
bits = 8 ;
1695
1696
1697
break ;
case 15 :
v = VGA_DRAW_LINE15 ;
1698
bits = 16 ;
1699
1700
1701
break ;
case 16 :
v = VGA_DRAW_LINE16 ;
1702
bits = 16 ;
1703
1704
1705
break ;
case 24 :
v = VGA_DRAW_LINE24 ;
1706
bits = 24 ;
1707
1708
1709
break ;
case 32 :
v = VGA_DRAW_LINE32 ;
1710
bits = 32 ;
1711
break ;
1712
}
1713
}
1714
vga_draw_line = vga_draw_line_table [ v * NB_DEPTHS + get_depth_index ( s -> ds )];
1715
1716
if ( ! is_buffer_shared ( s -> ds -> surface ) && s -> cursor_invalidate )
1717
s -> cursor_invalidate ( s );
ths
authored
18 years ago
1718
1719
line_offset = s -> line_offset ;
1720
# if 0
1721
printf ( "w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x \n " ,
1722
1723
width , height , v , line_offset , s -> cr [ 9 ], s -> cr [ 0x17 ], s -> line_compare , s -> sr [ 0x01 ]);
# endif
1724
addr1 = ( s -> start_addr * 4 );
1725
bwidth = ( width * bits + 7 ) / 8 ;
1726
y_start = - 1 ;
1727
1728
page_min = - 1 ;
page_max = 0 ;
1729
1730
d = ds_get_data ( s -> ds );
linesize = ds_get_linesize ( s -> ds );
1731
y1 = 0 ;
1732
1733
for ( y = 0 ; y < height ; y ++ ) {
addr = addr1 ;
1734
if ( ! ( s -> cr [ 0x17 ] & 1 )) {
1735
int shift ;
1736
/* CGA compatibility handling */
1737
1738
shift = 14 + (( s -> cr [ 0x17 ] >> 6 ) & 1 );
addr = ( addr & ~ ( 1 << shift )) | (( y1 & 1 ) << shift );
1739
}
1740
if ( ! ( s -> cr [ 0x17 ] & 2 )) {
1741
addr = ( addr & ~ 0x8000 ) | (( y1 & 2 ) << 14 );
1742
}
1743
1744
page0 = s -> vram_offset + ( addr & TARGET_PAGE_MASK );
page1 = s -> vram_offset + (( addr + bwidth - 1 ) & TARGET_PAGE_MASK );
ths
authored
18 years ago
1745
update = full_update |
1746
1747
cpu_physical_memory_get_dirty ( page0 , VGA_DIRTY_FLAG ) |
cpu_physical_memory_get_dirty ( page1 , VGA_DIRTY_FLAG );
1748
if (( page1 - page0 ) > TARGET_PAGE_SIZE ) {
1749
/* if wide line, can use another page */
ths
authored
18 years ago
1750
update |= cpu_physical_memory_get_dirty ( page0 + TARGET_PAGE_SIZE ,
1751
VGA_DIRTY_FLAG );
1752
}
1753
1754
/* explicit invalidation for the hardware cursor */
update |= ( s -> invalidated_y_table [ y >> 5 ] >> ( y & 0x1f )) & 1 ;
1755
if ( update ) {
1756
1757
if ( y_start < 0 )
y_start = y ;
1758
1759
1760
1761
if ( page0 < page_min )
page_min = page0 ;
if ( page1 > page_max )
page_max = page1 ;
1762
1763
1764
1765
1766
if ( ! ( is_buffer_shared ( s -> ds -> surface ))) {
vga_draw_line ( s , d , s -> vram_ptr + addr , width );
if ( s -> cursor_draw_line )
s -> cursor_draw_line ( s , d , y );
}
1767
1768
1769
} else {
if ( y_start >= 0 ) {
/* flush to display */
ths
authored
18 years ago
1770
dpy_update ( s -> ds , 0 , y_start ,
1771
disp_width , y - y_start );
1772
1773
y_start = - 1 ;
}
1774
}
1775
if ( ! multi_run ) {
1776
1777
1778
1779
mask = ( s -> cr [ 0x17 ] & 3 ) ^ 3 ;
if (( y1 & mask ) == mask )
addr1 += line_offset ;
y1 ++ ;
1780
multi_run = multi_scan ;
1781
1782
} else {
multi_run -- ;
1783
}
1784
1785
1786
/* line compare acts on the displayed lines */
if ( y == s -> line_compare )
addr1 = 0 ;
1787
1788
d += linesize ;
}
1789
1790
if ( y_start >= 0 ) {
/* flush to display */
ths
authored
18 years ago
1791
dpy_update ( s -> ds , 0 , y_start ,
1792
disp_width , y - y_start );
1793
}
1794
/* reset modified pages */
1795
if ( page_max >= page_min ) {
1796
1797
cpu_physical_memory_reset_dirty ( page_min , page_max + TARGET_PAGE_SIZE ,
VGA_DIRTY_FLAG );
1798
}
1799
memset ( s -> invalidated_y_table , 0 , (( height + 31 ) >> 5 ) * 4 );
1800
1801
}
1802
1803
1804
1805
1806
1807
1808
1809
1810
static void vga_draw_blank ( VGAState * s , int full_update )
{
int i , w , val ;
uint8_t * d ;
if ( ! full_update )
return ;
if ( s -> last_scr_width <= 0 || s -> last_scr_height <= 0 )
return ;
1811
1812
1813
s -> rgb_to_pixel =
rgb_to_pixel_dup_table [ get_depth_index ( s -> ds )];
1814
if ( ds_get_bits_per_pixel ( s -> ds ) == 8 )
1815
1816
1817
val = s -> rgb_to_pixel ( 0 , 0 , 0 );
else
val = 0 ;
1818
1819
w = s -> last_scr_width * (( ds_get_bits_per_pixel ( s -> ds ) + 7 ) >> 3 );
d = ds_get_data ( s -> ds );
1820
1821
for ( i = 0 ; i < s -> last_scr_height ; i ++ ) {
memset ( d , val , w );
1822
d += ds_get_linesize ( s -> ds );
1823
}
ths
authored
18 years ago
1824
dpy_update ( s -> ds , 0 , 0 ,
1825
1826
1827
s -> last_scr_width , s -> last_scr_height );
}
1828
1829
1830
1831
# define GMODE_TEXT 0
# define GMODE_GRAPH 1
# define GMODE_BLANK 2
1832
static void vga_update_display ( void * opaque )
1833
{
1834
VGAState * s = ( VGAState * ) opaque ;
1835
int full_update , graphic_mode ;
1836
1837
if ( ds_get_bits_per_pixel ( s -> ds ) == 0 ) {
1838
/* nothing to do */
1839
} else {
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
full_update = 0 ;
if ( ! ( s -> ar_index & 0x20 )) {
graphic_mode = GMODE_BLANK ;
} else {
graphic_mode = s -> gr [ 6 ] & 1 ;
}
if ( graphic_mode != s -> graphic_mode ) {
s -> graphic_mode = graphic_mode ;
full_update = 1 ;
}
switch ( graphic_mode ) {
1851
case GMODE_TEXT :
1852
vga_draw_text ( s , full_update );
1853
1854
1855
1856
1857
1858
1859
1860
1861
break ;
case GMODE_GRAPH :
vga_draw_graphic ( s , full_update );
break ;
case GMODE_BLANK :
default :
vga_draw_blank ( s , full_update );
break ;
}
1862
1863
1864
}
}
1865
/* force a full display refresh */
1866
static void vga_invalidate_display ( void * opaque )
1867
{
1868
VGAState * s = ( VGAState * ) opaque ;
ths
authored
18 years ago
1869
1870
1871
s -> last_width = - 1 ;
s -> last_height = - 1 ;
1872
1873
}
1874
void vga_reset ( void * opaque )
1875
{
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
VGAState * s = ( VGAState * ) opaque ;
s -> lfb_addr = 0 ;
s -> lfb_end = 0 ;
s -> map_addr = 0 ;
s -> map_end = 0 ;
s -> lfb_vram_mapped = 0 ;
s -> bios_offset = 0 ;
s -> bios_size = 0 ;
s -> sr_index = 0 ;
memset ( s -> sr , '\0' , sizeof ( s -> sr ));
s -> gr_index = 0 ;
memset ( s -> gr , '\0' , sizeof ( s -> gr ));
s -> ar_index = 0 ;
memset ( s -> ar , '\0' , sizeof ( s -> ar ));
s -> ar_flip_flop = 0 ;
s -> cr_index = 0 ;
memset ( s -> cr , '\0' , sizeof ( s -> cr ));
s -> msr = 0 ;
s -> fcr = 0 ;
s -> st00 = 0 ;
s -> st01 = 0 ;
s -> dac_state = 0 ;
s -> dac_sub_index = 0 ;
s -> dac_read_index = 0 ;
s -> dac_write_index = 0 ;
memset ( s -> dac_cache , '\0' , sizeof ( s -> dac_cache ));
s -> dac_8bit = 0 ;
memset ( s -> palette , '\0' , sizeof ( s -> palette ));
s -> bank_offset = 0 ;
# ifdef CONFIG_BOCHS_VBE
s -> vbe_index = 0 ;
memset ( s -> vbe_regs , '\0' , sizeof ( s -> vbe_regs ));
s -> vbe_regs [ VBE_DISPI_INDEX_ID ] = VBE_DISPI_ID0 ;
s -> vbe_start_addr = 0 ;
s -> vbe_line_offset = 0 ;
s -> vbe_bank_mask = ( s -> vram_size >> 16 ) - 1 ;
# endif
memset ( s -> font_offsets , '\0' , sizeof ( s -> font_offsets ));
1915
s -> graphic_mode = - 1 ; /* force full update */
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
s -> shift_control = 0 ;
s -> double_scan = 0 ;
s -> line_offset = 0 ;
s -> line_compare = 0 ;
s -> start_addr = 0 ;
s -> plane_updated = 0 ;
s -> last_cw = 0 ;
s -> last_ch = 0 ;
s -> last_width = 0 ;
s -> last_height = 0 ;
s -> last_scr_width = 0 ;
s -> last_scr_height = 0 ;
s -> cursor_start = 0 ;
s -> cursor_end = 0 ;
s -> cursor_offset = 0 ;
memset ( s -> invalidated_y_table , '\0' , sizeof ( s -> invalidated_y_table ));
memset ( s -> last_palette , '\0' , sizeof ( s -> last_palette ));
memset ( s -> last_ch_attr , '\0' , sizeof ( s -> last_ch_attr ));
switch ( vga_retrace_method ) {
case VGA_RETRACE_DUMB :
break ;
case VGA_RETRACE_PRECISE :
memset ( & s -> retrace_info , 0 , sizeof ( s -> retrace_info ));
break ;
}
1941
1942
}
1943
1944
1945
1946
1947
1948
1949
1950
1951
# define TEXTMODE_X ( x ) (( x ) % width )
# define TEXTMODE_Y ( x ) (( x ) / width )
# define VMEM2CHTYPE ( v ) (( v & 0xff0007ff ) | \
(( v & 0x00000800 ) << 10 ) | (( v & 0x00007000 ) >> 1 ))
/* relay text rendering to the display driver
* instead of doing a full vga_update_display () */
static void vga_update_text ( void * opaque , console_ch_t * chardata )
{
VGAState * s = ( VGAState * ) opaque ;
1952
int graphic_mode , i , cursor_offset , cursor_visible ;
1953
1954
1955
1956
int cw , cheight , width , height , size , c_min , c_max ;
uint32_t * src ;
console_ch_t * dst , val ;
char msg_buffer [ 80 ];
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
int full_update = 0 ;
if ( ! ( s -> ar_index & 0x20 )) {
graphic_mode = GMODE_BLANK ;
} else {
graphic_mode = s -> gr [ 6 ] & 1 ;
}
if ( graphic_mode != s -> graphic_mode ) {
s -> graphic_mode = graphic_mode ;
full_update = 1 ;
}
if ( s -> last_width == - 1 ) {
s -> last_width = 0 ;
full_update = 1 ;
}
1972
1973
switch ( graphic_mode ) {
1974
1975
case GMODE_TEXT :
/* TODO: update palette */
1976
full_update |= update_basic_params ( s );
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
/* total width & height */
cheight = ( s -> cr [ 9 ] & 0x1f ) + 1 ;
cw = 8 ;
if ( ! ( s -> sr [ 1 ] & 0x01 ))
cw = 9 ;
if ( s -> sr [ 1 ] & 0x08 )
cw = 16 ; /* NOTE: no 18 pixel wide */
width = ( s -> cr [ 0x01 ] + 1 );
if ( s -> cr [ 0x06 ] == 100 ) {
/* ugly hack for CGA 160x100x16 - explain me the logic */
height = 100 ;
} else {
height = s -> cr [ 0x12 ] |
(( s -> cr [ 0x07 ] & 0x02 ) << 7 ) |
(( s -> cr [ 0x07 ] & 0x40 ) << 3 );
height = ( height + 1 ) / cheight ;
1994
1995
1996
1997
1998
1999
2000
}
size = ( height * width );
if ( size > CH_ATTR_SIZE ) {
if ( ! full_update )
return ;
2001
2002
snprintf ( msg_buffer , sizeof ( msg_buffer ), "%i x %i Text mode" ,
width , height );
2003
2004
2005
break ;
}
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
if ( width != s -> last_width || height != s -> last_height ||
cw != s -> last_cw || cheight != s -> last_ch ) {
s -> last_scr_width = width * cw ;
s -> last_scr_height = height * cheight ;
s -> ds -> surface -> width = width ;
s -> ds -> surface -> height = height ;
dpy_resize ( s -> ds );
s -> last_width = width ;
s -> last_height = height ;
s -> last_ch = cheight ;
s -> last_cw = cw ;
full_update = 1 ;
}
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
/* Update "hardware" cursor */
cursor_offset = (( s -> cr [ 0x0e ] << 8 ) | s -> cr [ 0x0f ]) - s -> start_addr ;
if ( cursor_offset != s -> cursor_offset ||
s -> cr [ 0xa ] != s -> cursor_start ||
s -> cr [ 0xb ] != s -> cursor_end || full_update ) {
cursor_visible = ! ( s -> cr [ 0xa ] & 0x20 );
if ( cursor_visible && cursor_offset < size && cursor_offset >= 0 )
dpy_cursor ( s -> ds ,
TEXTMODE_X ( cursor_offset ),
TEXTMODE_Y ( cursor_offset ));
else
dpy_cursor ( s -> ds , - 1 , - 1 );
s -> cursor_offset = cursor_offset ;
s -> cursor_start = s -> cr [ 0xa ];
s -> cursor_end = s -> cr [ 0xb ];
}
src = ( uint32_t * ) s -> vram_ptr + s -> start_addr ;
dst = chardata ;
if ( full_update ) {
for ( i = 0 ; i < size ; src ++ , dst ++ , i ++ )
console_write_ch ( dst , VMEM2CHTYPE ( * src ));
dpy_update ( s -> ds , 0 , 0 , width , height );
} else {
c_max = 0 ;
for ( i = 0 ; i < size ; src ++ , dst ++ , i ++ ) {
console_write_ch ( & val , VMEM2CHTYPE ( * src ));
if ( * dst != val ) {
* dst = val ;
c_max = i ;
break ;
}
}
c_min = i ;
for (; i < size ; src ++ , dst ++ , i ++ ) {
console_write_ch ( & val , VMEM2CHTYPE ( * src ));
if ( * dst != val ) {
* dst = val ;
c_max = i ;
}
}
if ( c_min <= c_max ) {
i = TEXTMODE_Y ( c_min );
dpy_update ( s -> ds , 0 , i , width , TEXTMODE_Y ( c_max ) - i + 1 );
}
}
return ;
case GMODE_GRAPH :
if ( ! full_update )
return ;
s -> get_resolution ( s , & width , & height );
2077
2078
snprintf ( msg_buffer , sizeof ( msg_buffer ), "%i x %i Graphic mode" ,
width , height );
2079
2080
2081
2082
2083
2084
break ;
case GMODE_BLANK :
default :
if ( ! full_update )
return ;
2085
snprintf ( msg_buffer , sizeof ( msg_buffer ), "VGA Blank mode" );
2086
2087
2088
2089
break ;
}
/* Display a message */
2090
2091
s -> last_width = 60 ;
s -> last_height = height = 3 ;
2092
dpy_cursor ( s -> ds , - 1 , - 1 );
2093
2094
2095
s -> ds -> surface -> width = s -> last_width ;
s -> ds -> surface -> height = height ;
dpy_resize ( s -> ds );
2096
2097
for ( dst = chardata , i = 0 ; i < s -> last_width * height ; i ++ )
2098
2099
2100
console_write_ch ( dst ++ , ' ' );
size = strlen ( msg_buffer );
2101
2102
width = ( s -> last_width - size ) / 2 ;
dst = chardata + s -> last_width + width ;
2103
2104
2105
for ( i = 0 ; i < size ; i ++ )
console_write_ch ( dst ++ , 0x00200100 | msg_buffer [ i ]);
2106
dpy_update ( s -> ds , 0 , 0 , s -> last_width , height );
2107
2108
}
2109
static CPUReadMemoryFunc * vga_mem_read [ 3 ] = {
2110
2111
2112
2113
2114
vga_mem_readb ,
vga_mem_readw ,
vga_mem_readl ,
};
2115
static CPUWriteMemoryFunc * vga_mem_write [ 3 ] = {
2116
2117
2118
2119
2120
vga_mem_writeb ,
vga_mem_writew ,
vga_mem_writel ,
};
2121
2122
2123
2124
2125
static void vga_save ( QEMUFile * f , void * opaque )
{
VGAState * s = opaque ;
int i ;
2126
2127
2128
if ( s -> pci_dev )
pci_device_save ( s -> pci_dev , f );
2129
2130
2131
2132
2133
2134
2135
qemu_put_be32s ( f , & s -> latch );
qemu_put_8s ( f , & s -> sr_index );
qemu_put_buffer ( f , s -> sr , 8 );
qemu_put_8s ( f , & s -> gr_index );
qemu_put_buffer ( f , s -> gr , 16 );
qemu_put_8s ( f , & s -> ar_index );
qemu_put_buffer ( f , s -> ar , 21 );
ths
authored
17 years ago
2136
qemu_put_be32 ( f , s -> ar_flip_flop );
2137
2138
2139
2140
qemu_put_8s ( f , & s -> cr_index );
qemu_put_buffer ( f , s -> cr , 256 );
qemu_put_8s ( f , & s -> msr );
qemu_put_8s ( f , & s -> fcr );
ths
authored
17 years ago
2141
qemu_put_byte ( f , s -> st00 );
2142
2143
2144
2145
2146
2147
2148
2149
2150
qemu_put_8s ( f , & s -> st01 );
qemu_put_8s ( f , & s -> dac_state );
qemu_put_8s ( f , & s -> dac_sub_index );
qemu_put_8s ( f , & s -> dac_read_index );
qemu_put_8s ( f , & s -> dac_write_index );
qemu_put_buffer ( f , s -> dac_cache , 3 );
qemu_put_buffer ( f , s -> palette , 768 );
ths
authored
17 years ago
2151
qemu_put_be32 ( f , s -> bank_offset );
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
# ifdef CONFIG_BOCHS_VBE
qemu_put_byte ( f , 1 );
qemu_put_be16s ( f , & s -> vbe_index );
for ( i = 0 ; i < VBE_DISPI_INDEX_NB ; i ++ )
qemu_put_be16s ( f , & s -> vbe_regs [ i ]);
qemu_put_be32s ( f , & s -> vbe_start_addr );
qemu_put_be32s ( f , & s -> vbe_line_offset );
qemu_put_be32s ( f , & s -> vbe_bank_mask );
# else
qemu_put_byte ( f , 0 );
# endif
}
static int vga_load ( QEMUFile * f , void * opaque , int version_id )
{
VGAState * s = opaque ;
2168
int is_vbe , i , ret ;
2169
2170
if ( version_id > 2 )
2171
2172
return - EINVAL ;
2173
2174
2175
2176
2177
2178
if ( s -> pci_dev && version_id >= 2 ) {
ret = pci_device_load ( s -> pci_dev , f );
if ( ret < 0 )
return ret ;
}
2179
2180
2181
2182
2183
2184
2185
qemu_get_be32s ( f , & s -> latch );
qemu_get_8s ( f , & s -> sr_index );
qemu_get_buffer ( f , s -> sr , 8 );
qemu_get_8s ( f , & s -> gr_index );
qemu_get_buffer ( f , s -> gr , 16 );
qemu_get_8s ( f , & s -> ar_index );
qemu_get_buffer ( f , s -> ar , 21 );
ths
authored
17 years ago
2186
s -> ar_flip_flop = qemu_get_be32 ( f );
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
qemu_get_8s ( f , & s -> cr_index );
qemu_get_buffer ( f , s -> cr , 256 );
qemu_get_8s ( f , & s -> msr );
qemu_get_8s ( f , & s -> fcr );
qemu_get_8s ( f , & s -> st00 );
qemu_get_8s ( f , & s -> st01 );
qemu_get_8s ( f , & s -> dac_state );
qemu_get_8s ( f , & s -> dac_sub_index );
qemu_get_8s ( f , & s -> dac_read_index );
qemu_get_8s ( f , & s -> dac_write_index );
qemu_get_buffer ( f , s -> dac_cache , 3 );
qemu_get_buffer ( f , s -> palette , 768 );
ths
authored
17 years ago
2201
s -> bank_offset = qemu_get_be32 ( f );
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
is_vbe = qemu_get_byte ( f );
# ifdef CONFIG_BOCHS_VBE
if ( ! is_vbe )
return - EINVAL ;
qemu_get_be16s ( f , & s -> vbe_index );
for ( i = 0 ; i < VBE_DISPI_INDEX_NB ; i ++ )
qemu_get_be16s ( f , & s -> vbe_regs [ i ]);
qemu_get_be32s ( f , & s -> vbe_start_addr );
qemu_get_be32s ( f , & s -> vbe_line_offset );
qemu_get_be32s ( f , & s -> vbe_bank_mask );
# else
if ( is_vbe )
return - EINVAL ;
# endif
/* force refresh */
2218
s -> graphic_mode = - 1 ;
2219
2220
2221
return 0 ;
}
2222
2223
2224
2225
2226
typedef struct PCIVGAState {
PCIDevice dev ;
VGAState vga_state ;
} PCIVGAState ;
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
void vga_dirty_log_start ( VGAState * s )
{
if ( kvm_enabled () && s -> map_addr )
kvm_log_start ( s -> map_addr , s -> map_end - s -> map_addr );
if ( kvm_enabled () && s -> lfb_vram_mapped ) {
kvm_log_start ( isa_mem_base + 0xa0000 , 0x8000 );
kvm_log_start ( isa_mem_base + 0xa8000 , 0x8000 );
}
}
ths
authored
18 years ago
2238
static void vga_map ( PCIDevice * pci_dev , int region_num ,
2239
2240
uint32_t addr , uint32_t size , int type )
{
2241
2242
PCIVGAState * d = ( PCIVGAState * ) pci_dev ;
VGAState * s = & d -> vga_state ;
2243
2244
2245
2246
if ( region_num == PCI_ROM_SLOT ) {
cpu_register_physical_memory ( addr , s -> bios_size , s -> bios_offset );
} else {
cpu_register_physical_memory ( addr , s -> vram_size , s -> vram_offset );
2247
2248
2249
s -> map_addr = addr ;
s -> map_end = addr + s -> vram_size ;
vga_dirty_log_start ( s );
2250
}
2251
2252
}
2253
void vga_common_init ( VGAState * s , int vga_ram_size )
2254
{
2255
int i , j , v , b ;
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
for ( i = 0 ; i < 256 ; i ++ ) {
v = 0 ;
for ( j = 0 ; j < 8 ; j ++ ) {
v |= (( i >> j ) & 1 ) << ( j * 4 );
}
expand4 [ i ] = v ;
v = 0 ;
for ( j = 0 ; j < 4 ; j ++ ) {
v |= (( i >> ( 2 * j )) & 3 ) << ( j * 4 );
}
expand2 [ i ] = v ;
}
2270
2271
2272
2273
2274
2275
2276
2277
2278
for ( i = 0 ; i < 16 ; i ++ ) {
v = 0 ;
for ( j = 0 ; j < 4 ; j ++ ) {
b = (( i >> j ) & 1 );
v |= b << ( 2 * j );
v |= b << ( 2 * j + 1 );
}
expand4to8 [ i ] = v ;
}
2279
2280
2281
s -> vram_offset = qemu_ram_alloc ( vga_ram_size );
s -> vram_ptr = qemu_get_ram_ptr ( s -> vram_offset );
2282
s -> vram_size = vga_ram_size ;
2283
2284
s -> get_bpp = vga_get_bpp ;
s -> get_offsets = vga_get_offsets ;
2285
s -> get_resolution = vga_get_resolution ;
ths
authored
18 years ago
2286
2287
2288
s -> update = vga_update_display ;
s -> invalidate = vga_invalidate_display ;
s -> screen_dump = vga_screen_dump ;
2289
s -> text_update = vga_update_text ;
malc
authored
16 years ago
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
switch ( vga_retrace_method ) {
case VGA_RETRACE_DUMB :
s -> retrace = vga_dumb_retrace ;
s -> update_retrace_info = vga_dumb_update_retrace_info ;
break ;
case VGA_RETRACE_PRECISE :
s -> retrace = vga_precise_retrace ;
s -> update_retrace_info = vga_precise_update_retrace_info ;
break ;
}
2301
vga_reset ( s );
2302
2303
}
2304
/* used by both ISA and PCI */
ths
authored
18 years ago
2305
void vga_init ( VGAState * s )
2306
{
2307
int vga_io_memory ;
2308
2309
qemu_register_reset ( vga_reset , s );
2310
register_savevm ( "vga" , 0 , 2 , vga_save , vga_load , s );
2311
2312
register_ioport_write ( 0x3c0 , 16 , 1 , vga_ioport_write , s );
2313
2314
2315
2316
2317
register_ioport_write ( 0x3b4 , 2 , 1 , vga_ioport_write , s );
register_ioport_write ( 0x3d4 , 2 , 1 , vga_ioport_write , s );
register_ioport_write ( 0x3ba , 1 , 1 , vga_ioport_write , s );
register_ioport_write ( 0x3da , 1 , 1 , vga_ioport_write , s );
2318
2319
register_ioport_read ( 0x3c0 , 16 , 1 , vga_ioport_read , s );
2320
2321
2322
2323
2324
register_ioport_read ( 0x3b4 , 2 , 1 , vga_ioport_read , s );
register_ioport_read ( 0x3d4 , 2 , 1 , vga_ioport_read , s );
register_ioport_read ( 0x3ba , 1 , 1 , vga_ioport_read , s );
register_ioport_read ( 0x3da , 1 , 1 , vga_ioport_read , s );
2325
s -> bank_offset = 0 ;
2326
2327
# ifdef CONFIG_BOCHS_VBE
2328
2329
2330
# if defined ( TARGET_I386 )
register_ioport_read ( 0x1ce , 1 , 2 , vbe_ioport_read_index , s );
register_ioport_read ( 0x1cf , 1 , 2 , vbe_ioport_read_data , s );
2331
2332
2333
register_ioport_write ( 0x1ce , 1 , 2 , vbe_ioport_write_index , s );
register_ioport_write ( 0x1cf , 1 , 2 , vbe_ioport_write_data , s );
2334
2335
/* old Bochs IO ports */
2336
2337
register_ioport_read ( 0xff80 , 1 , 2 , vbe_ioport_read_index , s );
register_ioport_read ( 0xff81 , 1 , 2 , vbe_ioport_read_data , s );
2338
2339
register_ioport_write ( 0xff80 , 1 , 2 , vbe_ioport_write_index , s );
ths
authored
18 years ago
2340
register_ioport_write ( 0xff81 , 1 , 2 , vbe_ioport_write_data , s );
2341
2342
2343
2344
2345
2346
# else
register_ioport_read ( 0x1ce , 1 , 2 , vbe_ioport_read_index , s );
register_ioport_read ( 0x1d0 , 1 , 2 , vbe_ioport_read_data , s );
register_ioport_write ( 0x1ce , 1 , 2 , vbe_ioport_write_index , s );
register_ioport_write ( 0x1d0 , 1 , 2 , vbe_ioport_write_data , s );
2347
# endif
2348
# endif /* CONFIG_BOCHS_VBE */
2349
2350
vga_io_memory = cpu_register_io_memory ( vga_mem_read , vga_mem_write , s );
ths
authored
18 years ago
2351
cpu_register_physical_memory ( isa_mem_base + 0x000a0000 , 0x20000 ,
2352
vga_io_memory );
2353
qemu_register_coalesced_mmio ( isa_mem_base + 0x000a0000 , 0x20000 );
2354
2355
}
ths
authored
18 years ago
2356
2357
2358
2359
2360
/* Memory mapped interface */
static uint32_t vga_mm_readb ( void * opaque , target_phys_addr_t addr )
{
VGAState * s = opaque ;
2361
return vga_ioport_read ( s , addr >> s -> it_shift ) & 0xff ;
ths
authored
18 years ago
2362
2363
2364
2365
2366
2367
2368
}
static void vga_mm_writeb ( void * opaque ,
target_phys_addr_t addr , uint32_t value )
{
VGAState * s = opaque ;
2369
vga_ioport_write ( s , addr >> s -> it_shift , value & 0xff );
ths
authored
18 years ago
2370
2371
2372
2373
2374
2375
}
static uint32_t vga_mm_readw ( void * opaque , target_phys_addr_t addr )
{
VGAState * s = opaque ;
2376
return vga_ioport_read ( s , addr >> s -> it_shift ) & 0xffff ;
ths
authored
18 years ago
2377
2378
2379
2380
2381
2382
2383
}
static void vga_mm_writew ( void * opaque ,
target_phys_addr_t addr , uint32_t value )
{
VGAState * s = opaque ;
2384
vga_ioport_write ( s , addr >> s -> it_shift , value & 0xffff );
ths
authored
18 years ago
2385
2386
2387
2388
2389
2390
}
static uint32_t vga_mm_readl ( void * opaque , target_phys_addr_t addr )
{
VGAState * s = opaque ;
2391
return vga_ioport_read ( s , addr >> s -> it_shift );
ths
authored
18 years ago
2392
2393
2394
2395
2396
2397
2398
}
static void vga_mm_writel ( void * opaque ,
target_phys_addr_t addr , uint32_t value )
{
VGAState * s = opaque ;
2399
vga_ioport_write ( s , addr >> s -> it_shift , value );
ths
authored
18 years ago
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
}
static CPUReadMemoryFunc * vga_mm_read_ctrl [] = {
& vga_mm_readb ,
& vga_mm_readw ,
& vga_mm_readl ,
};
static CPUWriteMemoryFunc * vga_mm_write_ctrl [] = {
& vga_mm_writeb ,
& vga_mm_writew ,
& vga_mm_writel ,
};
static void vga_mm_init ( VGAState * s , target_phys_addr_t vram_base ,
target_phys_addr_t ctrl_base , int it_shift )
{
int s_ioport_ctrl , vga_io_memory ;
s -> it_shift = it_shift ;
2420
2421
s_ioport_ctrl = cpu_register_io_memory ( vga_mm_read_ctrl , vga_mm_write_ctrl , s );
vga_io_memory = cpu_register_io_memory ( vga_mem_read , vga_mem_write , s );
ths
authored
18 years ago
2422
2423
2424
2425
2426
2427
register_savevm ( "vga" , 0 , 2 , vga_save , vga_load , s );
cpu_register_physical_memory ( ctrl_base , 0x100000 , s_ioport_ctrl );
s -> bank_offset = 0 ;
cpu_register_physical_memory ( vram_base + 0x000a0000 , 0x20000 , vga_io_memory );
2428
qemu_register_coalesced_mmio ( vram_base + 0x000a0000 , 0x20000 );
ths
authored
18 years ago
2429
2430
}
2431
int isa_vga_init ( void )
2432
2433
2434
2435
2436
{
VGAState * s ;
s = qemu_mallocz ( sizeof ( VGAState ));
2437
vga_common_init ( s , VGA_RAM_SIZE );
2438
vga_init ( s );
2439
2440
2441
s -> ds = graphic_console_init ( s -> update , s -> invalidate ,
s -> screen_dump , s -> text_update , s );
ths
authored
18 years ago
2442
2443
# ifdef CONFIG_BOCHS_VBE
2444
/* XXX: use optimized standard vga accesses */
ths
authored
18 years ago
2445
cpu_register_physical_memory ( VBE_DISPI_LFB_PHYSICAL_ADDRESS ,
2446
VGA_RAM_SIZE , s -> vram_offset );
2447
# endif
2448
2449
2450
return 0 ;
}
2451
int isa_vga_mm_init ( target_phys_addr_t vram_base ,
2452
target_phys_addr_t ctrl_base , int it_shift )
ths
authored
18 years ago
2453
2454
2455
2456
2457
{
VGAState * s ;
s = qemu_mallocz ( sizeof ( VGAState ));
2458
vga_common_init ( s , VGA_RAM_SIZE );
ths
authored
18 years ago
2459
2460
vga_mm_init ( s , vram_base , ctrl_base , it_shift );
2461
2462
s -> ds = graphic_console_init ( s -> update , s -> invalidate ,
s -> screen_dump , s -> text_update , s );
ths
authored
18 years ago
2463
2464
2465
2466
# ifdef CONFIG_BOCHS_VBE
/* XXX: use optimized standard vga accesses */
cpu_register_physical_memory ( VBE_DISPI_LFB_PHYSICAL_ADDRESS ,
2467
VGA_RAM_SIZE , s -> vram_offset );
ths
authored
18 years ago
2468
2469
2470
2471
# endif
return 0 ;
}
2472
2473
2474
2475
2476
2477
2478
static void pci_vga_write_config ( PCIDevice * d ,
uint32_t address , uint32_t val , int len )
{
PCIVGAState * pvs = container_of ( d , PCIVGAState , dev );
VGAState * s = & pvs -> vga_state ;
pci_default_write_config ( d , address , val , len );
2479
2480
if ( s -> map_addr && pvs -> dev . io_regions [ 0 ]. addr == - 1 )
s -> map_addr = 0 ;
2481
2482
}
2483
static void pci_vga_initfn ( PCIDevice * dev )
2484
{
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
PCIVGAState * d = DO_UPCAST ( PCIVGAState , dev , dev );
VGAState * s = & d -> vga_state ;
uint8_t * pci_conf = d -> dev . config ;
// vga + console init
vga_common_init ( s , VGA_RAM_SIZE );
vga_init ( s );
s -> pci_dev = & d -> dev ;
s -> ds = graphic_console_init ( s -> update , s -> invalidate ,
s -> screen_dump , s -> text_update , s );
// dummy VGA ( same as Bochs ID )
pci_config_set_vendor_id ( pci_conf , PCI_VENDOR_ID_QEMU );
pci_config_set_device_id ( pci_conf , PCI_DEVICE_ID_QEMU_VGA );
pci_config_set_class ( pci_conf , PCI_CLASS_DISPLAY_VGA );
pci_conf [ PCI_HEADER_TYPE ] = PCI_HEADER_TYPE_NORMAL ; // header_type
/* XXX: VGA_RAM_SIZE must be a power of two */
pci_register_bar ( & d -> dev , 0 , VGA_RAM_SIZE ,
PCI_ADDRESS_SPACE_MEM_PREFETCH , vga_map );
if ( s -> bios_size ) {
2507
2508
2509
unsigned int bios_total_size ;
/* must be a power of two */
bios_total_size = 1 ;
2510
while ( bios_total_size < s -> bios_size )
2511
bios_total_size <<= 1 ;
2512
pci_register_bar ( & d -> dev , PCI_ROM_SLOT , bios_total_size ,
2513
PCI_ADDRESS_SPACE_MEM_PREFETCH , vga_map );
2514
}
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
}
int pci_vga_init ( PCIBus * bus ,
unsigned long vga_bios_offset , int vga_bios_size )
{
PCIDevice * dev ;
dev = pci_create ( "VGA" , NULL );
qdev_prop_set_uint32 ( & dev -> qdev , "bios-offset" , vga_bios_offset );
qdev_prop_set_uint32 ( & dev -> qdev , "bios-size" , vga_bios_offset );
qdev_init ( & dev -> qdev );
2527
2528
return 0 ;
}
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
static PCIDeviceInfo vga_info = {
. qdev . name = "VGA" ,
. qdev . size = sizeof ( PCIVGAState ),
. init = pci_vga_initfn ,
. config_write = pci_vga_write_config ,
. qdev . props = ( Property []) {
{
. name = "bios-offset" ,
. info = & qdev_prop_hex32 ,
. offset = offsetof ( PCIVGAState , vga_state . bios_offset ),
},{
. name = "bios-size" ,
. info = & qdev_prop_hex32 ,
. offset = offsetof ( PCIVGAState , vga_state . bios_size ),
},
{ /* end of list */ }
}
};
static void vga_register ( void )
{
pci_qdev_register ( & vga_info );
}
device_init ( vga_register );
2555
2556
2557
/********************************************************/
/* vga screen dump */
ths
authored
18 years ago
2558
static void vga_save_dpy_update ( DisplayState * s ,
2559
2560
2561
2562
int x , int y , int w , int h )
{
}
2563
static void vga_save_dpy_resize ( DisplayState * s )
2564
2565
2566
2567
2568
2569
2570
{
}
static void vga_save_dpy_refresh ( DisplayState * s )
{
}
2571
int ppm_save ( const char * filename , struct DisplaySurface * ds )
2572
2573
2574
{
FILE * f ;
uint8_t * d , * d1 ;
2575
uint32_t v ;
2576
int y , x ;
2577
uint8_t r , g , b ;
2578
2579
2580
2581
2582
f = fopen ( filename , "wb" );
if ( ! f )
return - 1 ;
fprintf ( f , "P6 \n %d %d \n %d \n " ,
2583
2584
2585
ds -> width , ds -> height , 255 );
d1 = ds -> data ;
for ( y = 0 ; y < ds -> height ; y ++ ) {
2586
d = d1 ;
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
for ( x = 0 ; x < ds -> width ; x ++ ) {
if ( ds -> pf . bits_per_pixel == 32 )
v = * ( uint32_t * ) d ;
else
v = ( uint32_t ) ( * ( uint16_t * ) d );
r = (( v >> ds -> pf . rshift ) & ds -> pf . rmax ) * 256 /
( ds -> pf . rmax + 1 );
g = (( v >> ds -> pf . gshift ) & ds -> pf . gmax ) * 256 /
( ds -> pf . gmax + 1 );
b = (( v >> ds -> pf . bshift ) & ds -> pf . bmax ) * 256 /
( ds -> pf . bmax + 1 );
fputc ( r , f );
fputc ( g , f );
fputc ( b , f );
d += ds -> pf . bytes_per_pixel ;
2602
}
2603
d1 += ds -> linesize ;
2604
2605
2606
2607
2608
}
fclose ( f );
return 0 ;
}
2609
2610
2611
2612
static void vga_screen_dump_blank ( VGAState * s , const char * filename )
{
FILE * f ;
unsigned int y , x , w , h ;
2613
unsigned char blank_sample [ 3 ] = { 0 , 0 , 0 };
2614
2615
w = s -> last_scr_width ;
2616
2617
2618
2619
2620
2621
2622
2623
h = s -> last_scr_height ;
f = fopen ( filename , "wb" );
if ( ! f )
return ;
fprintf ( f , "P6 \n %d %d \n %d \n " , w , h , 255 );
for ( y = 0 ; y < h ; y ++ ) {
for ( x = 0 ; x < w ; x ++ ) {
2624
fwrite ( blank_sample , 3 , 1 , f );
2625
2626
2627
2628
2629
2630
2631
}
}
fclose ( f );
}
static void vga_screen_dump_common ( VGAState * s , const char * filename ,
int w , int h )
2632
2633
{
DisplayState * saved_ds , ds1 , * ds = & ds1 ;
2634
DisplayChangeListener dcl ;
ths
authored
18 years ago
2635
2636
/* XXX: this is a little hackish */
2637
vga_invalidate_display ( s );
2638
2639
2640
saved_ds = s -> ds ;
memset ( ds , 0 , sizeof ( DisplayState ));
2641
2642
2643
2644
2645
memset ( & dcl , 0 , sizeof ( DisplayChangeListener ));
dcl . dpy_update = vga_save_dpy_update ;
dcl . dpy_resize = vga_save_dpy_resize ;
dcl . dpy_refresh = vga_save_dpy_refresh ;
register_displaychangelistener ( ds , & dcl );
2646
ds -> allocator = & default_allocator ;
2647
ds -> surface = qemu_create_displaysurface ( ds , w , h );
2648
2649
s -> ds = ds ;
2650
s -> graphic_mode = - 1 ;
2651
vga_update_display ( s );
2652
2653
ppm_save ( filename , ds -> surface );
2654
2655
qemu_free_displaysurface ( ds );
2656
2657
s -> ds = saved_ds ;
}
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
static void vga_screen_dump_graphic ( VGAState * s , const char * filename )
{
int w , h ;
s -> get_resolution ( s , & w , & h );
vga_screen_dump_common ( s , filename , w , h );
}
static void vga_screen_dump_text ( VGAState * s , const char * filename )
{
int w , h , cwidth , cheight ;
vga_get_text_resolution ( s , & w , & h , & cwidth , & cheight );
vga_screen_dump_common ( s , filename , w * cwidth , h * cheight );
}
/* save the vga display in a PPM image even if no display is
available */
static void vga_screen_dump ( void * opaque , const char * filename )
{
VGAState * s = ( VGAState * ) opaque ;
2681
if ( ! ( s -> ar_index & 0x20 ))
2682
vga_screen_dump_blank ( s , filename );
2683
2684
2685
2686
else if ( s -> gr [ 6 ] & 1 )
vga_screen_dump_graphic ( s , filename );
else
vga_screen_dump_text ( s , filename );
2687
vga_invalidate_display ( s );
2688
}