Commit b0f74c87a1dbd6b0c5e4de7f1c5cb40197e3fbe9
1 parent
c8906845
Don't use "hz" in identifiers to make AIX happy.
malc found AIX headers leak "hz" and so it can't be used there. Change the occurences in hw/. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5709 c046a42c-6fe2-441c-8c8c-71466251a162
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5 changed files
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15 additions
and
15 deletions
hw/i2c.h
| ... | ... | @@ -68,7 +68,7 @@ void wm8750_dac_dat(void *opaque, uint32_t sample); |
| 68 | 68 | uint32_t wm8750_adc_dat(void *opaque); |
| 69 | 69 | void *wm8750_dac_buffer(void *opaque, int samples); |
| 70 | 70 | void wm8750_dac_commit(void *opaque); |
| 71 | -void wm8750_set_bclk_in(void *opaque, int hz); | |
| 71 | +void wm8750_set_bclk_in(void *opaque, int new_hz); | |
| 72 | 72 | |
| 73 | 73 | /* ssd0303.c */ |
| 74 | 74 | void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address); | ... | ... |
hw/rc4030.c
| ... | ... | @@ -70,11 +70,11 @@ typedef struct rc4030State |
| 70 | 70 | static void set_next_tick(rc4030State *s) |
| 71 | 71 | { |
| 72 | 72 | qemu_irq_lower(s->timer_irq); |
| 73 | - uint32_t hz; | |
| 73 | + uint32_t tm_hz; | |
| 74 | 74 | |
| 75 | - hz = 1000 / (s->itr + 1); | |
| 75 | + tm_hz = 1000 / (s->itr + 1); | |
| 76 | 76 | |
| 77 | - qemu_mod_timer(s->periodic_timer, qemu_get_clock(vm_clock) + ticks_per_sec / hz); | |
| 77 | + qemu_mod_timer(s->periodic_timer, qemu_get_clock(vm_clock) + ticks_per_sec / tm_hz); | |
| 78 | 78 | } |
| 79 | 79 | |
| 80 | 80 | /* called for accesses to rc4030 */ | ... | ... |
hw/twl92230.c
| ... | ... | @@ -54,7 +54,7 @@ struct menelaus_s { |
| 54 | 54 | struct { |
| 55 | 55 | uint8_t ctrl; |
| 56 | 56 | uint16_t comp; |
| 57 | - QEMUTimer *hz; | |
| 57 | + QEMUTimer *hz_tm; | |
| 58 | 58 | int64_t next; |
| 59 | 59 | struct tm tm; |
| 60 | 60 | struct tm new; |
| ... | ... | @@ -77,12 +77,12 @@ static inline void menelaus_update(struct menelaus_s *s) |
| 77 | 77 | static inline void menelaus_rtc_start(struct menelaus_s *s) |
| 78 | 78 | { |
| 79 | 79 | s->rtc.next =+ qemu_get_clock(rt_clock); |
| 80 | - qemu_mod_timer(s->rtc.hz, s->rtc.next); | |
| 80 | + qemu_mod_timer(s->rtc.hz_tm, s->rtc.next); | |
| 81 | 81 | } |
| 82 | 82 | |
| 83 | 83 | static inline void menelaus_rtc_stop(struct menelaus_s *s) |
| 84 | 84 | { |
| 85 | - qemu_del_timer(s->rtc.hz); | |
| 85 | + qemu_del_timer(s->rtc.hz_tm); | |
| 86 | 86 | s->rtc.next =- qemu_get_clock(rt_clock); |
| 87 | 87 | if (s->rtc.next < 1) |
| 88 | 88 | s->rtc.next = 1; |
| ... | ... | @@ -106,7 +106,7 @@ static void menelaus_rtc_hz(void *opaque) |
| 106 | 106 | s->rtc.next_comp --; |
| 107 | 107 | s->rtc.alm_sec --; |
| 108 | 108 | s->rtc.next += 1000; |
| 109 | - qemu_mod_timer(s->rtc.hz, s->rtc.next); | |
| 109 | + qemu_mod_timer(s->rtc.hz_tm, s->rtc.next); | |
| 110 | 110 | if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */ |
| 111 | 111 | menelaus_rtc_update(s); |
| 112 | 112 | if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec) |
| ... | ... | @@ -886,7 +886,7 @@ i2c_slave *twl92230_init(i2c_bus *bus, qemu_irq irq) |
| 886 | 886 | s->i2c.send = menelaus_tx; |
| 887 | 887 | |
| 888 | 888 | s->irq = irq; |
| 889 | - s->rtc.hz = qemu_new_timer(rt_clock, menelaus_rtc_hz, s); | |
| 889 | + s->rtc.hz_tm = qemu_new_timer(rt_clock, menelaus_rtc_hz, s); | |
| 890 | 890 | s->in = qemu_allocate_irqs(menelaus_gpio_set, s, 3); |
| 891 | 891 | s->pwrbtn = qemu_allocate_irqs(menelaus_pwrbtn_set, s, 1)[0]; |
| 892 | 892 | ... | ... |
hw/vga.c
| ... | ... | @@ -169,7 +169,7 @@ static void vga_precise_update_retrace_info(VGAState *s) |
| 169 | 169 | int div2, sldiv2, dots; |
| 170 | 170 | int clocking_mode; |
| 171 | 171 | int clock_sel; |
| 172 | - const int hz[] = {25175000, 28322000, 25175000, 25175000}; | |
| 172 | + const int clk_hz[] = {25175000, 28322000, 25175000, 25175000}; | |
| 173 | 173 | int64_t chars_per_sec; |
| 174 | 174 | struct vga_precise_retrace *r = &s->retrace_info.precise; |
| 175 | 175 | |
| ... | ... | @@ -194,7 +194,7 @@ static void vga_precise_update_retrace_info(VGAState *s) |
| 194 | 194 | clock_sel = (s->msr >> 2) & 3; |
| 195 | 195 | dots = (s->msr & 1) ? 8 : 9; |
| 196 | 196 | |
| 197 | - chars_per_sec = hz[clock_sel] / dots; | |
| 197 | + chars_per_sec = clk_hz[clock_sel] / dots; | |
| 198 | 198 | |
| 199 | 199 | htotal_chars <<= clocking_mode; |
| 200 | 200 | |
| ... | ... | @@ -239,7 +239,7 @@ static void vga_precise_update_retrace_info(VGAState *s) |
| 239 | 239 | div2, sldiv2, |
| 240 | 240 | clocking_mode, |
| 241 | 241 | clock_sel, |
| 242 | - hz[clock_sel], | |
| 242 | + clk_hz[clock_sel], | |
| 243 | 243 | dots, |
| 244 | 244 | r->ticks_per_char |
| 245 | 245 | ); | ... | ... |
hw/wm8750.c
| ... | ... | @@ -723,11 +723,11 @@ uint32_t wm8750_adc_dat(void *opaque) |
| 723 | 723 | return *data; |
| 724 | 724 | } |
| 725 | 725 | |
| 726 | -void wm8750_set_bclk_in(void *opaque, int hz) | |
| 726 | +void wm8750_set_bclk_in(void *opaque, int new_hz) | |
| 727 | 727 | { |
| 728 | 728 | struct wm8750_s *s = (struct wm8750_s *) opaque; |
| 729 | 729 | |
| 730 | - s->ext_adc_hz = hz; | |
| 731 | - s->ext_dac_hz = hz; | |
| 730 | + s->ext_adc_hz = new_hz; | |
| 731 | + s->ext_dac_hz = new_hz; | |
| 732 | 732 | wm8750_clk_update(s, 1); |
| 733 | 733 | } | ... | ... |