gwj / at91sam9263 · Commits

Commit 0f35920cd8d323f77d553d18e1f4edd7e761aebf

Authored by bellard
1 parent 7d977de7

io port API change - removed dumb console redraw (not useful) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@662 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 24 additions and 53 deletions
hw/vga.c
  View file @0f35920
... ... @@ -40,9 +40,6 @@
40 40 #include <sys/wait.h>
41 41 #include <netinet/in.h>
42 42  
43   -#define NO_THUNK_TYPE_SIZE
44   -#include "thunk.h"
45   -
46 43 #include "cpu.h"
47 44 #include "exec-all.h"
48 45  
... ... @@ -260,9 +257,9 @@ static uint8_t expand4to8[16];
260 257 VGAState vga_state;
261 258 int vga_io_memory;
262 259  
263   -static uint32_t vga_ioport_read(CPUState *env, uint32_t addr)
  260 +static uint32_t vga_ioport_read(void *opaque, uint32_t addr)
264 261 {
265   - VGAState *s = &vga_state;
  262 + VGAState *s = opaque;
266 263 int val, index;
267 264  
268 265 /* check port range access depending on color/monochrome mode */
... ... @@ -356,9 +353,9 @@ static uint32_t vga_ioport_read(CPUState *env, uint32_t addr)
356 353 return val;
357 354 }
358 355  
359   -static void vga_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
  356 +static void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
360 357 {
361   - VGAState *s = &vga_state;
  358 + VGAState *s = opaque;
362 359 int index, v;
363 360  
364 361 /* check port range access depending on color/monochrome mode */
... ... @@ -506,9 +503,9 @@ static void vga_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
506 503 }
507 504  
508 505 #ifdef CONFIG_BOCHS_VBE
509   -static uint32_t vbe_ioport_read(CPUState *env, uint32_t addr)
  506 +static uint32_t vbe_ioport_read(void *opaque, uint32_t addr)
510 507 {
511   - VGAState *s = &vga_state;
  508 + VGAState *s = opaque;
512 509 uint32_t val;
513 510  
514 511 addr &= 1;
... ... @@ -526,9 +523,9 @@ static uint32_t vbe_ioport_read(CPUState *env, uint32_t addr)
526 523 return val;
527 524 }
528 525  
529   -static void vbe_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
  526 +static void vbe_ioport_write(void *opaque, uint32_t addr, uint32_t val)
530 527 {
531   - VGAState *s = &vga_state;
  528 + VGAState *s = opaque;
532 529  
533 530 addr &= 1;
534 531 if (addr == 0) {
... ... @@ -1519,40 +1516,14 @@ static void vga_draw_graphic(VGAState *s, int full_update)
1519 1516 }
1520 1517 }
1521 1518  
1522   -/* draw text terminal (very limited, just for simple boot debug
1523   - messages) */
1524   -static int last_cursor_pos;
1525   -
1526   -void vga_draw_dumb(VGAState *s)
1527   -{
1528   - int c, i, cursor_pos, eol;
1529   -
1530   - cursor_pos = s->cr[0x0f] | (s->cr[0x0e] << 8);
1531   - eol = 0;
1532   - for(i = last_cursor_pos; i < cursor_pos; i++) {
1533   - /* XXX: should use vga RAM */
1534   - c = phys_ram_base[0xb8000 + (i) * 2];
1535   - if (c >= ' ') {
1536   - putchar(c);
1537   - eol = 0;
1538   - } else {
1539   - if (!eol)
1540   - putchar('\n');
1541   - eol = 1;
1542   - }
1543   - }
1544   - fflush(stdout);
1545   - last_cursor_pos = cursor_pos;
1546   -}
1547   -
1548 1519 void vga_update_display(void)
1549 1520 {
1550 1521 VGAState *s = &vga_state;
1551 1522 int full_update, graphic_mode;
1552 1523  
1553 1524 if (s->ds->depth == 0) {
1554   - vga_draw_dumb(s);
1555   - } else {
  1525 + /* nothing to do */
  1526 + } else {
1556 1527 full_update = 0;
1557 1528 graphic_mode = s->gr[6] & 1;
1558 1529 if (graphic_mode != s->graphic_mode) {
... ... @@ -1643,29 +1614,29 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
1643 1614 s->vram_size = vga_ram_size;
1644 1615 s->ds = ds;
1645 1616  
1646   - register_ioport_write(0x3c0, 16, vga_ioport_write, 1);
  1617 + register_ioport_write(0x3c0, 16, 1, vga_ioport_write, s);
1647 1618  
1648   - register_ioport_write(0x3b4, 2, vga_ioport_write, 1);
1649   - register_ioport_write(0x3d4, 2, vga_ioport_write, 1);
1650   - register_ioport_write(0x3ba, 1, vga_ioport_write, 1);
1651   - register_ioport_write(0x3da, 1, vga_ioport_write, 1);
  1619 + register_ioport_write(0x3b4, 2, 1, vga_ioport_write, s);
  1620 + register_ioport_write(0x3d4, 2, 1, vga_ioport_write, s);
  1621 + register_ioport_write(0x3ba, 1, 1, vga_ioport_write, s);
  1622 + register_ioport_write(0x3da, 1, 1, vga_ioport_write, s);
1652 1623  
1653   - register_ioport_read(0x3c0, 16, vga_ioport_read, 1);
  1624 + register_ioport_read(0x3c0, 16, 1, vga_ioport_read, s);
1654 1625  
1655   - register_ioport_read(0x3b4, 2, vga_ioport_read, 1);
1656   - register_ioport_read(0x3d4, 2, vga_ioport_read, 1);
1657   - register_ioport_read(0x3ba, 1, vga_ioport_read, 1);
1658   - register_ioport_read(0x3da, 1, vga_ioport_read, 1);
  1626 + register_ioport_read(0x3b4, 2, 1, vga_ioport_read, s);
  1627 + register_ioport_read(0x3d4, 2, 1, vga_ioport_read, s);
  1628 + register_ioport_read(0x3ba, 1, 1, vga_ioport_read, s);
  1629 + register_ioport_read(0x3da, 1, 1, vga_ioport_read, s);
1659 1630 s->bank_offset = -0xa0000;
1660 1631  
1661 1632 #ifdef CONFIG_BOCHS_VBE
1662 1633 s->vbe_regs[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID0;
1663 1634 s->vbe_bank_mask = ((s->vram_size >> 16) - 1);
1664   - register_ioport_read(0x1ce, 1, vbe_ioport_read, 2);
1665   - register_ioport_read(0x1cf, 1, vbe_ioport_read, 2);
  1635 + register_ioport_read(0x1ce, 1, 2, vbe_ioport_read, s);
  1636 + register_ioport_read(0x1cf, 1, 2, vbe_ioport_read, s);
1666 1637  
1667   - register_ioport_write(0x1ce, 1, vbe_ioport_write, 2);
1668   - register_ioport_write(0x1cf, 1, vbe_ioport_write, 2);
  1638 + register_ioport_write(0x1ce, 1, 2, vbe_ioport_write, s);
  1639 + register_ioport_write(0x1cf, 1, 2, vbe_ioport_write, s);
1669 1640 #endif
1670 1641  
1671 1642 vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write);
... ...