gwj / at91sam9263 · Commits

Commit b584726df971c1238a5249cc21121cf2ebbcaf55

Authored by pbrook
1 parent a8b01dd8

Clean up VGA ram allocation. 

Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7063 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 16 changed files with 71 additions and 130 deletions
hw/cirrus_vga.c
  View file @b584726
... ... @@ -3289,15 +3289,13 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci)
3289 3289 *
3290 3290 ***************************************/
3291 3291  
3292   -void isa_cirrus_vga_init(uint8_t *vga_ram_base,
3293   - ram_addr_t vga_ram_offset, int vga_ram_size)
  3292 +void isa_cirrus_vga_init(int vga_ram_size)
3294 3293 {
3295 3294 CirrusVGAState *s;
3296 3295  
3297 3296 s = qemu_mallocz(sizeof(CirrusVGAState));
3298 3297  
3299   - vga_common_init((VGAState *)s,
3300   - vga_ram_base, vga_ram_offset, vga_ram_size);
  3298 + vga_common_init((VGAState *)s, vga_ram_size);
3301 3299 cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0);
3302 3300 s->ds = graphic_console_init(s->update, s->invalidate,
3303 3301 s->screen_dump, s->text_update, s);
... ... @@ -3358,8 +3356,7 @@ static void pci_cirrus_write_config(PCIDevice *d,
3358 3356 vga_dirty_log_start((VGAState *)s);
3359 3357 }
3360 3358  
3361   -void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
3362   - ram_addr_t vga_ram_offset, int vga_ram_size)
  3359 +void pci_cirrus_vga_init(PCIBus *bus, int vga_ram_size)
3363 3360 {
3364 3361 PCICirrusVGAState *d;
3365 3362 uint8_t *pci_conf;
... ... @@ -3381,8 +3378,7 @@ void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
3381 3378  
3382 3379 /* setup VGA */
3383 3380 s = &d->cirrus_vga;
3384   - vga_common_init((VGAState *)s,
3385   - vga_ram_base, vga_ram_offset, vga_ram_size);
  3381 + vga_common_init((VGAState *)s, vga_ram_size);
3386 3382 cirrus_init_common(s, device_id, 1);
3387 3383  
3388 3384 s->ds = graphic_console_init(s->update, s->invalidate,
... ...
hw/g364fb.c
  View file @b584726
... ... @@ -584,8 +584,7 @@ static void g364fb_save(QEMUFile *f, void *opaque)
584 584 qemu_put_be32(f, s->height);
585 585 }
586 586  
587   -int g364fb_mm_init(uint8_t *vram, ram_addr_t vram_offset,
588   - int vram_size, target_phys_addr_t vram_base,
  587 +int g364fb_mm_init(int vram_size, target_phys_addr_t vram_base,
589 588 target_phys_addr_t ctrl_base, int it_shift,
590 589 qemu_irq irq)
591 590 {
... ... @@ -594,8 +593,8 @@ int g364fb_mm_init(uint8_t *vram, ram_addr_t vram_offset,
594 593  
595 594 s = qemu_mallocz(sizeof(G364State));
596 595  
597   - s->vram = vram;
598   - s->vram_offset = vram_offset;
  596 + s->vram_offset = qemu_ram_alloc(vram_size);
  597 + s->vram = qemu_get_ram_ptr(s->vram_offset);
599 598 s->vram_size = vram_size;
600 599 s->irq = irq;
601 600  
... ...
hw/mips.h
  View file @b584726
... ... @@ -10,8 +10,7 @@ void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
10 10 void ds1225y_set_protection(void *opaque, int protection);
11 11  
12 12 /* g364fb.c */
13   -int g364fb_mm_init(uint8_t *vram, ram_addr_t vram_offset,
14   - int vram_size, target_phys_addr_t vram_base,
  13 +int g364fb_mm_init(int vram_size, target_phys_addr_t vram_base,
15 14 target_phys_addr_t ctrl_base, int it_shift,
16 15 qemu_irq irq);
17 16  
... ...
hw/mips_jazz.c
  View file @b584726
... ... @@ -142,7 +142,6 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
142 142 qemu_irq esp_reset;
143 143 ram_addr_t ram_offset;
144 144 ram_addr_t bios_offset;
145   - ram_addr_t vga_ram_offset;
146 145  
147 146 /* init CPUs */
148 147 if (cpu_model == NULL) {
... ... @@ -164,7 +163,6 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
164 163 ram_offset = qemu_ram_alloc(ram_size);
165 164 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
166 165  
167   - vga_ram_offset = qemu_ram_alloc(vga_ram_size);
168 166 bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE);
169 167 cpu_register_physical_memory(0x1fc00000LL,
170 168 MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
... ... @@ -205,12 +203,10 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
205 203 /* Video card */
206 204 switch (jazz_model) {
207 205 case JAZZ_MAGNUM:
208   - g364fb_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size,
209   - 0x40000000, 0x60000000, 0, rc4030[3]);
  206 + g364fb_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0, rc4030[3]);
210 207 break;
211 208 case JAZZ_PICA61:
212   - isa_vga_mm_init(phys_ram_base + vga_ram_offset, ram_size, vga_ram_size,
213   - 0x40000000, 0x60000000, 0);
  209 + isa_vga_mm_init(vga_ram_size, 0x40000000, 0x60000000, 0);
214 210 break;
215 211 default:
216 212 break;
... ...
hw/mips_malta.c
  View file @b584726
... ... @@ -769,7 +769,6 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
769 769 {
770 770 char buf[1024];
771 771 ram_addr_t ram_offset;
772   - ram_addr_t vga_ram_offset;
773 772 ram_addr_t bios_offset;
774 773 target_long bios_size;
775 774 int64_t kernel_entry;
... ... @@ -812,7 +811,6 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
812 811 exit(1);
813 812 }
814 813 ram_offset = qemu_ram_alloc(ram_size);
815   - vga_ram_offset = qemu_ram_alloc(vga_ram_size);
816 814 bios_offset = qemu_ram_alloc(BIOS_SIZE);
817 815  
818 816  
... ... @@ -949,14 +947,11 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
949 947  
950 948 /* Optional PCI video card */
951 949 if (cirrus_vga_enabled) {
952   - pci_cirrus_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
953   - ram_size, vga_ram_size);
  950 + pci_cirrus_vga_init(pci_bus, vga_ram_size);
954 951 } else if (vmsvga_enabled) {
955   - pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_offset,
956   - ram_size, vga_ram_size);
  952 + pci_vmsvga_init(pci_bus, vga_ram_size);
957 953 } else if (std_vga_enabled) {
958   - pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
959   - ram_size, vga_ram_size, 0, 0);
  954 + pci_vga_init(pci_bus, vga_ram_size, 0, 0);
960 955 }
961 956 }
962 957  
... ...
hw/mips_r4k.c
  View file @b584726
... ... @@ -155,7 +155,6 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
155 155 {
156 156 char buf[1024];
157 157 ram_addr_t ram_offset;
158   - ram_addr_t vga_ram_offset;
159 158 ram_addr_t bios_offset;
160 159 int bios_size;
161 160 CPUState *env;
... ... @@ -188,7 +187,6 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
188 187 exit(1);
189 188 }
190 189 ram_offset = qemu_ram_alloc(ram_size);
191   - vga_ram_offset = qemu_ram_alloc(vga_ram_size);
192 190  
193 191 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
194 192  
... ... @@ -257,8 +255,7 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
257 255 }
258 256 }
259 257  
260   - isa_vga_init(phys_ram_base + vga_ram_offset, ram_size,
261   - vga_ram_size);
  258 + isa_vga_init(vga_ram_size);
262 259  
263 260 if (nd_table[0].vlan)
264 261 isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
... ...
... ... @@ -784,7 +784,7 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
784 784 {
785 785 char buf[1024];
786 786 int ret, linux_boot, i;
787   - ram_addr_t ram_addr, vga_ram_addr, bios_offset, option_rom_offset;
  787 + ram_addr_t ram_addr, bios_offset, option_rom_offset;
788 788 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
789 789 int bios_size, isa_bios_size, oprom_area_size;
790 790 PCIBus *pci_bus;
... ... @@ -858,9 +858,6 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
858 858 }
859 859  
860 860  
861   - /* allocate VGA RAM */
862   - vga_ram_addr = qemu_ram_alloc(vga_ram_size);
863   -
864 861 /* BIOS load */
865 862 if (bios_name == NULL)
866 863 bios_name = BIOS_FILENAME;
... ... @@ -943,26 +940,20 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
943 940  
944 941 if (cirrus_vga_enabled) {
945 942 if (pci_enabled) {
946   - pci_cirrus_vga_init(pci_bus,
947   - phys_ram_base + vga_ram_addr,
948   - vga_ram_addr, vga_ram_size);
  943 + pci_cirrus_vga_init(pci_bus, vga_ram_size);
949 944 } else {
950   - isa_cirrus_vga_init(phys_ram_base + vga_ram_addr,
951   - vga_ram_addr, vga_ram_size);
  945 + isa_cirrus_vga_init(vga_ram_size);
952 946 }
953 947 } else if (vmsvga_enabled) {
954 948 if (pci_enabled)
955   - pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_addr,
956   - vga_ram_addr, vga_ram_size);
  949 + pci_vmsvga_init(pci_bus, vga_ram_size);
957 950 else
958 951 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
959 952 } else if (std_vga_enabled) {
960 953 if (pci_enabled) {
961   - pci_vga_init(pci_bus, phys_ram_base + vga_ram_addr,
962   - vga_ram_addr, vga_ram_size, 0, 0);
  954 + pci_vga_init(pci_bus, vga_ram_size, 0, 0);
963 955 } else {
964   - isa_vga_init(phys_ram_base + vga_ram_addr,
965   - vga_ram_addr, vga_ram_size);
  956 + isa_vga_init(vga_ram_size);
966 957 }
967 958 }
968 959  
... ...
... ... @@ -144,21 +144,15 @@ extern enum vga_retrace_method vga_retrace_method;
144 144 #define VGA_RAM_SIZE (9 * 1024 * 1024)
145 145 #endif
146 146  
147   -int isa_vga_init(uint8_t *vga_ram_base,
148   - unsigned long vga_ram_offset, int vga_ram_size);
149   -int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
150   - unsigned long vga_ram_offset, int vga_ram_size,
  147 +int isa_vga_init(int vga_ram_size);
  148 +int pci_vga_init(PCIBus *bus, int vga_ram_size,
151 149 unsigned long vga_bios_offset, int vga_bios_size);
152   -int isa_vga_mm_init(uint8_t *vga_ram_base,
153   - unsigned long vga_ram_offset, int vga_ram_size,
154   - target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
155   - int it_shift);
  150 +int isa_vga_mm_init(int vga_ram_size, target_phys_addr_t vram_base,
  151 + target_phys_addr_t ctrl_base, int it_shift);
156 152  
157 153 /* cirrus_vga.c */
158   -void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
159   - ram_addr_t vga_ram_offset, int vga_ram_size);
160   -void isa_cirrus_vga_init(uint8_t *vga_ram_base,
161   - ram_addr_t vga_ram_offset, int vga_ram_size);
  154 +void pci_cirrus_vga_init(PCIBus *bus, int vga_ram_size);
  155 +void isa_cirrus_vga_init(int vga_ram_size);
162 156  
163 157 /* ide.c */
164 158 void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
... ...
hw/pci.h
  View file @b584726
... ... @@ -219,8 +219,7 @@ void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
219 219 void *lsi_scsi_init(PCIBus *bus, int devfn);
220 220  
221 221 /* vmware_vga.c */
222   -void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
223   - unsigned long vga_ram_offset, int vga_ram_size);
  222 +void pci_vmsvga_init(PCIBus *bus, int vga_ram_size);
224 223  
225 224 /* usb-uhci.c */
226 225 void usb_uhci_piix3_init(PCIBus *bus, int devfn);
... ...
hw/ppc_newworld.c
  View file @b584726
... ... @@ -97,7 +97,7 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
97 97 qemu_irq *pic, **openpic_irqs;
98 98 int unin_memory;
99 99 int linux_boot, i;
100   - ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
  100 + ram_addr_t ram_offset, bios_offset, vga_bios_offset;
101 101 uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
102 102 PCIBus *pci_bus;
103 103 MacIONVRAMState *nvr;
... ... @@ -136,9 +136,6 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
136 136 ram_offset = qemu_ram_alloc(ram_size);
137 137 cpu_register_physical_memory(0, ram_size, ram_offset);
138 138  
139   - /* allocate VGA RAM */
140   - vga_ram_offset = qemu_ram_alloc(vga_ram_size);
141   -
142 139 /* allocate and load BIOS */
143 140 bios_offset = qemu_ram_alloc(BIOS_SIZE);
144 141 if (bios_name == NULL)
... ... @@ -288,8 +285,7 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
288 285 pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
289 286 pci_bus = pci_pmac_init(pic);
290 287 /* init basic PC hardware */
291   - pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
292   - vga_ram_offset, vga_ram_size,
  288 + pci_vga_init(pci_bus, vga_ram_size,
293 289 vga_bios_offset, vga_bios_size);
294 290  
295 291 /* XXX: suppress that */
... ...
hw/ppc_oldworld.c
  View file @b584726
... ... @@ -125,7 +125,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
125 125 char buf[1024];
126 126 qemu_irq *pic, **heathrow_irqs;
127 127 int linux_boot, i;
128   - ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
  128 + ram_addr_t ram_offset, bios_offset, vga_bios_offset;
129 129 uint32_t kernel_base, initrd_base;
130 130 int32_t kernel_size, initrd_size;
131 131 PCIBus *pci_bus;
... ... @@ -169,9 +169,6 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
169 169 ram_offset = qemu_ram_alloc(ram_size);
170 170 cpu_register_physical_memory(0, ram_size, ram_offset);
171 171  
172   - /* allocate VGA RAM */
173   - vga_ram_offset = qemu_ram_alloc(vga_ram_size);
174   -
175 172 /* allocate and load BIOS */
176 173 bios_offset = qemu_ram_alloc(BIOS_SIZE);
177 174 if (bios_name == NULL)
... ... @@ -303,8 +300,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
303 300 }
304 301 pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
305 302 pci_bus = pci_grackle_init(0xfec00000, pic);
306   - pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
307   - vga_ram_offset, vga_ram_size,
  303 + pci_vga_init(pci_bus, vga_ram_size,
308 304 vga_bios_offset, vga_bios_size);
309 305  
310 306 escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
... ...
hw/ppc_prep.c
  View file @b584726
... ... @@ -543,7 +543,7 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
543 543 m48t59_t *m48t59;
544 544 int PPC_io_memory;
545 545 int linux_boot, i, nb_nics1, bios_size;
546   - ram_addr_t ram_offset, vga_ram_offset, bios_offset;
  546 + ram_addr_t ram_offset, bios_offset;
547 547 uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
548 548 PCIBus *pci_bus;
549 549 qemu_irq *i8259;
... ... @@ -580,9 +580,6 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
580 580 ram_offset = qemu_ram_alloc(ram_size);
581 581 cpu_register_physical_memory(0, ram_size, ram_offset);
582 582  
583   - /* allocate VGA RAM */
584   - vga_ram_offset = qemu_ram_alloc(vga_ram_size);
585   -
586 583 /* allocate and load BIOS */
587 584 bios_offset = qemu_ram_alloc(BIOS_SIZE);
588 585 if (bios_name == NULL)
... ... @@ -663,8 +660,7 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
663 660 cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
664 661  
665 662 /* init basic PC hardware */
666   - pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
667   - vga_ram_offset, vga_ram_size, 0, 0);
  663 + pci_vga_init(pci_bus, vga_ram_size, 0, 0);
668 664 // openpic = openpic_init(0x00000000, 0xF0000000, 1);
669 665 // pit = pit_init(0x40, i8259[0]);
670 666 rtc_init(0x70, i8259[8], 2000);
... ...
hw/sun4u.c
  View file @b584726
... ... @@ -337,7 +337,7 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
337 337 m48t59_t *nvram;
338 338 int ret, linux_boot;
339 339 unsigned int i;
340   - ram_addr_t ram_offset, prom_offset, vga_ram_offset;
  340 + ram_addr_t ram_offset, prom_offset;
341 341 long initrd_size, kernel_size;
342 342 PCIBus *pci_bus, *pci_bus2, *pci_bus3;
343 343 QEMUBH *bh;
... ... @@ -447,10 +447,7 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
447 447 pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL, &pci_bus2,
448 448 &pci_bus3);
449 449 isa_mem_base = VGA_BASE;
450   - vga_ram_offset = qemu_ram_alloc(vga_ram_size);
451   - pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
452   - vga_ram_offset, vga_ram_size,
453   - 0, 0);
  450 + pci_vga_init(pci_bus, vga_ram_size, 0, 0);
454 451  
455 452 // XXX Should be pci_bus3
456 453 pci_ebus_init(pci_bus, -1);
... ...
hw/vga.c
  View file @b584726
... ... @@ -2266,8 +2266,7 @@ static void vga_map(PCIDevice *pci_dev, int region_num,
2266 2266 vga_dirty_log_start(s);
2267 2267 }
2268 2268  
2269   -void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
2270   - ram_addr_t vga_ram_offset, int vga_ram_size)
  2269 +void vga_common_init(VGAState *s, int vga_ram_size)
2271 2270 {
2272 2271 int i, j, v, b;
2273 2272  
... ... @@ -2294,8 +2293,8 @@ void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
2294 2293 expand4to8[i] = v;
2295 2294 }
2296 2295  
2297   - s->vram_ptr = vga_ram_base;
2298   - s->vram_offset = vga_ram_offset;
  2296 + s->vram_offset = qemu_ram_alloc(vga_ram_size);
  2297 + s->vram_ptr = qemu_get_ram_ptr(s->vram_offset);
2299 2298 s->vram_size = vga_ram_size;
2300 2299 s->get_bpp = vga_get_bpp;
2301 2300 s->get_offsets = vga_get_offsets;
... ... @@ -2445,14 +2444,13 @@ static void vga_mm_init(VGAState *s, target_phys_addr_t vram_base,
2445 2444 qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
2446 2445 }
2447 2446  
2448   -int isa_vga_init(uint8_t *vga_ram_base,
2449   - unsigned long vga_ram_offset, int vga_ram_size)
  2447 +int isa_vga_init(int vga_ram_size)
2450 2448 {
2451 2449 VGAState *s;
2452 2450  
2453 2451 s = qemu_mallocz(sizeof(VGAState));
2454 2452  
2455   - vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
  2453 + vga_common_init(s, vga_ram_size);
2456 2454 vga_init(s);
2457 2455  
2458 2456 s->ds = graphic_console_init(s->update, s->invalidate,
... ... @@ -2461,21 +2459,19 @@ int isa_vga_init(uint8_t *vga_ram_base,
2461 2459 #ifdef CONFIG_BOCHS_VBE
2462 2460 /* XXX: use optimized standard vga accesses */
2463 2461 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
2464   - vga_ram_size, vga_ram_offset);
  2462 + vga_ram_size, s->vram_offset);
2465 2463 #endif
2466 2464 return 0;
2467 2465 }
2468 2466  
2469   -int isa_vga_mm_init(uint8_t *vga_ram_base,
2470   - unsigned long vga_ram_offset, int vga_ram_size,
2471   - target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
2472   - int it_shift)
  2467 +int isa_vga_mm_init(int vga_ram_size, target_phys_addr_t vram_base,
  2468 + target_phys_addr_t ctrl_base, int it_shift)
2473 2469 {
2474 2470 VGAState *s;
2475 2471  
2476 2472 s = qemu_mallocz(sizeof(VGAState));
2477 2473  
2478   - vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
  2474 + vga_common_init(s, vga_ram_size);
2479 2475 vga_mm_init(s, vram_base, ctrl_base, it_shift);
2480 2476  
2481 2477 s->ds = graphic_console_init(s->update, s->invalidate,
... ... @@ -2484,7 +2480,7 @@ int isa_vga_mm_init(uint8_t *vga_ram_base,
2484 2480 #ifdef CONFIG_BOCHS_VBE
2485 2481 /* XXX: use optimized standard vga accesses */
2486 2482 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
2487   - vga_ram_size, vga_ram_offset);
  2483 + vga_ram_size, s->vram_offset);
2488 2484 #endif
2489 2485 return 0;
2490 2486 }
... ... @@ -2500,8 +2496,7 @@ static void pci_vga_write_config(PCIDevice *d,
2500 2496 vga_dirty_log_start(s);
2501 2497 }
2502 2498  
2503   -int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
2504   - unsigned long vga_ram_offset, int vga_ram_size,
  2499 +int pci_vga_init(PCIBus *bus, int vga_ram_size,
2505 2500 unsigned long vga_bios_offset, int vga_bios_size)
2506 2501 {
2507 2502 PCIVGAState *d;
... ... @@ -2515,7 +2510,7 @@ int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
2515 2510 return -1;
2516 2511 s = &d->vga_state;
2517 2512  
2518   - vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
  2513 + vga_common_init(s, vga_ram_size);
2519 2514 vga_init(s);
2520 2515  
2521 2516 s->ds = graphic_console_init(s->update, s->invalidate,
... ...
hw/vga_int.h
  View file @b584726
... ... @@ -191,8 +191,7 @@ static inline int c6_to_8(int v)
191 191 return (v << 2) | (b << 1) | b;
192 192 }
193 193  
194   -void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
195   - ram_addr_t vga_ram_offset, int vga_ram_size);
  194 +void vga_common_init(VGAState *s, int vga_ram_size);
196 195 void vga_init(VGAState *s);
197 196 void vga_reset(void *s);
198 197  
... ...
hw/vmware_vga.c
  View file @b584726
... ... @@ -59,8 +59,8 @@ struct vmsvga_state_s {
59 59 DisplayState *ds;
60 60 int vram_size;
61 61 ram_addr_t vram_offset;
  62 + uint8_t *vram_ptr;
62 63 #endif
63   - uint8_t *vram;
64 64 target_phys_addr_t vram_base;
65 65  
66 66 int index;
... ... @@ -326,7 +326,7 @@ static inline void vmsvga_update_rect(struct vmsvga_state_s *s,
326 326 bypl = s->bypp * s->width;
327 327 width = s->bypp * w;
328 328 start = s->bypp * x + bypl * y;
329   - src = s->vram + start;
  329 + src = s->vram_ptr + start;
330 330 dst = ds_get_data(s->ds) + start;
331 331  
332 332 for (; line > 0; line --, src += bypl, dst += bypl)
... ... @@ -339,7 +339,7 @@ static inline void vmsvga_update_rect(struct vmsvga_state_s *s,
339 339 static inline void vmsvga_update_screen(struct vmsvga_state_s *s)
340 340 {
341 341 #ifndef DIRECT_VRAM
342   - memcpy(ds_get_data(s->ds), s->vram, s->bypp * s->width * s->height);
  342 + memcpy(ds_get_data(s->ds), s->vram_ptr, s->bypp * s->width * s->height);
343 343 #endif
344 344  
345 345 dpy_update(s->ds, 0, 0, s->width, s->height);
... ... @@ -383,7 +383,7 @@ static inline void vmsvga_copy_rect(struct vmsvga_state_s *s,
383 383 # ifdef DIRECT_VRAM
384 384 uint8_t *vram = ds_get_data(s->ds);
385 385 # else
386   - uint8_t *vram = s->vram;
  386 + uint8_t *vram = s->vram_ptr;
387 387 # endif
388 388 int bypl = s->bypp * s->width;
389 389 int width = s->bypp * w;
... ... @@ -420,7 +420,7 @@ static inline void vmsvga_fill_rect(struct vmsvga_state_s *s,
420 420 # ifdef DIRECT_VRAM
421 421 uint8_t *vram = ds_get_data(s->ds);
422 422 # else
423   - uint8_t *vram = s->vram;
  423 + uint8_t *vram = s->vram_ptr;
424 424 # endif
425 425 int bypp = s->bypp;
426 426 int bypl = bypp * s->width;
... ... @@ -801,7 +801,7 @@ static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value)
801 801  
802 802 case SVGA_REG_CONFIG_DONE:
803 803 if (value) {
804   - s->fifo = (uint32_t *) &s->vram[s->vram_size - SVGA_FIFO_SIZE];
  804 + s->fifo = (uint32_t *) &s->vram_ptr[s->vram_size - SVGA_FIFO_SIZE];
805 805 /* Check range and alignment. */
806 806 if ((CMD(min) | CMD(max) |
807 807 CMD(next_cmd) | CMD(stop)) & 3)
... ... @@ -985,7 +985,7 @@ static void vmsvga_screen_dump(void *opaque, const char *filename)
985 985  
986 986 if (s->depth == 32) {
987 987 DisplaySurface *ds = qemu_create_displaysurface_from(s->width,
988   - s->height, 32, ds_get_linesize(s->ds), s->vram);
  988 + s->height, 32, ds_get_linesize(s->ds), s->vram_ptr);
989 989 ppm_save(filename, ds);
990 990 qemu_free(ds);
991 991 }
... ... @@ -1006,7 +1006,7 @@ static uint32_t vmsvga_vram_readb(void *opaque, target_phys_addr_t addr)
1006 1006 if (addr < s->fb_size)
1007 1007 return *(uint8_t *) (ds_get_data(s->ds) + addr);
1008 1008 else
1009   - return *(uint8_t *) (s->vram + addr);
  1009 + return *(uint8_t *) (s->vram_ptr + addr);
1010 1010 }
1011 1011  
1012 1012 static uint32_t vmsvga_vram_readw(void *opaque, target_phys_addr_t addr)
... ... @@ -1015,7 +1015,7 @@ static uint32_t vmsvga_vram_readw(void *opaque, target_phys_addr_t addr)
1015 1015 if (addr < s->fb_size)
1016 1016 return *(uint16_t *) (ds_get_data(s->ds) + addr);
1017 1017 else
1018   - return *(uint16_t *) (s->vram + addr);
  1018 + return *(uint16_t *) (s->vram_ptr + addr);
1019 1019 }
1020 1020  
1021 1021 static uint32_t vmsvga_vram_readl(void *opaque, target_phys_addr_t addr)
... ... @@ -1024,7 +1024,7 @@ static uint32_t vmsvga_vram_readl(void *opaque, target_phys_addr_t addr)
1024 1024 if (addr < s->fb_size)
1025 1025 return *(uint32_t *) (ds_get_data(s->ds) + addr);
1026 1026 else
1027   - return *(uint32_t *) (s->vram + addr);
  1027 + return *(uint32_t *) (s->vram_ptr + addr);
1028 1028 }
1029 1029  
1030 1030 static void vmsvga_vram_writeb(void *opaque, target_phys_addr_t addr,
... ... @@ -1034,7 +1034,7 @@ static void vmsvga_vram_writeb(void *opaque, target_phys_addr_t addr,
1034 1034 if (addr < s->fb_size)
1035 1035 *(uint8_t *) (ds_get_data(s->ds) + addr) = value;
1036 1036 else
1037   - *(uint8_t *) (s->vram + addr) = value;
  1037 + *(uint8_t *) (s->vram_ptr + addr) = value;
1038 1038 }
1039 1039  
1040 1040 static void vmsvga_vram_writew(void *opaque, target_phys_addr_t addr,
... ... @@ -1044,7 +1044,7 @@ static void vmsvga_vram_writew(void *opaque, target_phys_addr_t addr,
1044 1044 if (addr < s->fb_size)
1045 1045 *(uint16_t *) (ds_get_data(s->ds) + addr) = value;
1046 1046 else
1047   - *(uint16_t *) (s->vram + addr) = value;
  1047 + *(uint16_t *) (s->vram_ptr + addr) = value;
1048 1048 }
1049 1049  
1050 1050 static void vmsvga_vram_writel(void *opaque, target_phys_addr_t addr,
... ... @@ -1054,7 +1054,7 @@ static void vmsvga_vram_writel(void *opaque, target_phys_addr_t addr,
1054 1054 if (addr < s->fb_size)
1055 1055 *(uint32_t *) (ds_get_data(s->ds) + addr) = value;
1056 1056 else
1057   - *(uint32_t *) (s->vram + addr) = value;
  1057 + *(uint32_t *) (s->vram_ptr + addr) = value;
1058 1058 }
1059 1059  
1060 1060 static CPUReadMemoryFunc *vmsvga_vram_read[] = {
... ... @@ -1116,28 +1116,25 @@ static int vmsvga_load(struct vmsvga_state_s *s, QEMUFile *f)
1116 1116  
1117 1117 s->invalidated = 1;
1118 1118 if (s->config)
1119   - s->fifo = (uint32_t *) &s->vram[s->vram_size - SVGA_FIFO_SIZE];
  1119 + s->fifo = (uint32_t *) &s->vram_ptr[s->vram_size - SVGA_FIFO_SIZE];
1120 1120  
1121 1121 return 0;
1122 1122 }
1123 1123  
1124   -static void vmsvga_init(struct vmsvga_state_s *s,
1125   - uint8_t *vga_ram_base, unsigned long vga_ram_offset,
1126   - int vga_ram_size)
  1124 +static void vmsvga_init(struct vmsvga_state_s *s, int vga_ram_size)
1127 1125 {
1128   - s->vram = vga_ram_base;
1129   - s->vram_size = vga_ram_size;
1130   - s->vram_offset = vga_ram_offset;
1131   -
1132 1126 s->scratch_size = SVGA_SCRATCH_SIZE;
1133 1127 s->scratch = (uint32_t *) qemu_malloc(s->scratch_size * 4);
1134 1128  
1135 1129 vmsvga_reset(s);
1136 1130  
1137 1131 #ifdef EMBED_STDVGA
1138   - vga_common_init((VGAState *) s,
1139   - vga_ram_base, vga_ram_offset, vga_ram_size);
  1132 + vga_common_init((VGAState *) s, vga_ram_size);
1140 1133 vga_init((VGAState *) s);
  1134 +#else
  1135 + s->vram_size = vga_ram_size;
  1136 + s->vram_offset = qemu_ram_alloc(vga_ram_size);
  1137 + s->vram_ptr = qemu_get_ram_ptr(s->vram_offset);
1141 1138 #endif
1142 1139  
1143 1140 s->ds = graphic_console_init(vmsvga_update_display,
... ... @@ -1148,7 +1145,7 @@ static void vmsvga_init(struct vmsvga_state_s *s,
1148 1145 #ifdef CONFIG_BOCHS_VBE
1149 1146 /* XXX: use optimized standard vga accesses */
1150 1147 cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
1151   - vga_ram_size, vga_ram_offset);
  1148 + vga_ram_size, s->vram_offset);
1152 1149 #endif
1153 1150 }
1154 1151  
... ... @@ -1215,8 +1212,7 @@ static void pci_vmsvga_map_mem(PCIDevice *pci_dev, int region_num,
1215 1212  
1216 1213 #define PCI_CLASS_HEADERTYPE_00h 0x00
1217 1214  
1218   -void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
1219   - unsigned long vga_ram_offset, int vga_ram_size)
  1215 +void pci_vmsvga_init(PCIBus *bus, int vga_ram_size)
1220 1216 {
1221 1217 struct pci_vmsvga_state_s *s;
1222 1218  
... ... @@ -1242,7 +1238,7 @@ void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
1242 1238 pci_register_io_region(&s->card, 1, vga_ram_size,
1243 1239 PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
1244 1240  
1245   - vmsvga_init(&s->chip, vga_ram_base, vga_ram_offset, vga_ram_size);
  1241 + vmsvga_init(&s->chip, vga_ram_size);
1246 1242  
1247 1243 register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);
1248 1244 }
... ...