gwj / at91sam9263 · Commits

Commit 3023f3329d87a6203d03a0e9ccb948772940da96

Authored by aliguori
1 parent 9f8df9c1

graphical_console_init change (Stefano Stabellini) 

Patch 5/7

This patch changes the graphical_console_init function to return an
allocated DisplayState instead of a QEMUConsole.

This patch contains just the graphical_console_init change and few other
modifications mainly in console.c and vl.c.
It was necessary to move the display frontends (e.g. sdl and vnc)
initialization after machine->init in vl.c.

This patch does *not* include any required changes to any device, these
changes come with the following patches.

Patch 6/7

This patch changes the QEMUMachine init functions not to take a
DisplayState as an argument because is not needed any more;

In few places the graphic hardware initialization function was called
only if DisplayState was not NULL, now they are always called.
Apart from these cases, the rest are all mechanical substitutions.

Patch 7/7

This patch updates the graphic device code to use the new
graphical_console_init function.

As for the previous patch, in few places graphical_console_init was called
only if DisplayState was not NULL, now it is always called.
Apart from these cases, the rest are all mechanical substitutions.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6344 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 63 changed files with 412 additions and 407 deletions
console.c
  View file @3023f33
... ... @@ -1190,6 +1190,17 @@ static void text_console_update(void *opaque, console_ch_t *chardata)
1190 1190 }
1191 1191 }
1192 1192  
  1193 +static TextConsole *get_graphic_console() {
  1194 + int i;
  1195 + TextConsole *s;
  1196 + for (i = 0; i < nb_consoles; i++) {
  1197 + s = consoles[i];
  1198 + if (s->console_type == GRAPHIC_CONSOLE)
  1199 + return s;
  1200 + }
  1201 + return NULL;
  1202 +}
  1203 +
1193 1204 static TextConsole *new_console(DisplayState *ds, console_type_t console_type)
1194 1205 {
1195 1206 TextConsole *s;
... ... @@ -1217,27 +1228,39 @@ static TextConsole *new_console(DisplayState *ds, console_type_t console_type)
1217 1228 consoles[i] = consoles[i - 1];
1218 1229 }
1219 1230 consoles[i] = s;
  1231 + nb_consoles++;
1220 1232 }
1221 1233 return s;
1222 1234 }
1223 1235  
1224   -TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
1225   - vga_hw_invalidate_ptr invalidate,
1226   - vga_hw_screen_dump_ptr screen_dump,
1227   - vga_hw_text_update_ptr text_update,
1228   - void *opaque)
  1236 +DisplayState *graphic_console_init(vga_hw_update_ptr update,
  1237 + vga_hw_invalidate_ptr invalidate,
  1238 + vga_hw_screen_dump_ptr screen_dump,
  1239 + vga_hw_text_update_ptr text_update,
  1240 + void *opaque)
1229 1241 {
1230 1242 TextConsole *s;
  1243 + DisplayState *ds;
  1244 +
  1245 + ds = (DisplayState *) qemu_mallocz(sizeof(DisplayState));
  1246 + if (ds == NULL)
  1247 + return NULL;
  1248 + ds->surface = qemu_create_displaysurface(640, 480, 32, 640 * 4);
1231 1249  
1232 1250 s = new_console(ds, GRAPHIC_CONSOLE);
1233   - if (!s)
1234   - return NULL;
  1251 + if (s == NULL) {
  1252 + qemu_free_displaysurface(ds->surface);
  1253 + qemu_free(ds);
  1254 + return NULL;
  1255 + }
1235 1256 s->hw_update = update;
1236 1257 s->hw_invalidate = invalidate;
1237 1258 s->hw_screen_dump = screen_dump;
1238 1259 s->hw_text_update = text_update;
1239 1260 s->hw = opaque;
1240   - return s;
  1261 +
  1262 + register_displaystate(ds);
  1263 + return ds;
1241 1264 }
1242 1265  
1243 1266 int is_graphic_console(void)
... ... @@ -1285,6 +1308,7 @@ CharDriverState *text_console_init(DisplayState *ds, const char *p)
1285 1308 s->out_fifo.buf = s->out_fifo_buf;
1286 1309 s->out_fifo.buf_size = sizeof(s->out_fifo_buf);
1287 1310 s->kbd_timer = qemu_new_timer(rt_clock, kbd_send_chars, s);
  1311 + s->ds = ds;
1288 1312  
1289 1313 if (!color_inited) {
1290 1314 color_inited = 1;
... ... @@ -1337,22 +1361,22 @@ CharDriverState *text_console_init(DisplayState *ds, const char *p)
1337 1361 return chr;
1338 1362 }
1339 1363  
1340   -void qemu_console_resize(QEMUConsole *console, int width, int height)
  1364 +void qemu_console_resize(DisplayState *ds, int width, int height)
1341 1365 {
1342   - console->g_width = width;
1343   - console->g_height = height;
1344   - if (active_console == console) {
1345   - DisplayState *ds = console->ds;
  1366 + TextConsole *s = get_graphic_console();
  1367 + s->g_width = width;
  1368 + s->g_height = height;
  1369 + if (is_graphic_console()) {
1346 1370 ds->surface = qemu_resize_displaysurface(ds->surface, width, height, 32, 4 * width);
1347   - dpy_resize(console->ds);
  1371 + dpy_resize(ds);
1348 1372 }
1349 1373 }
1350 1374  
1351   -void qemu_console_copy(QEMUConsole *console, int src_x, int src_y,
1352   - int dst_x, int dst_y, int w, int h)
  1375 +void qemu_console_copy(DisplayState *ds, int src_x, int src_y,
  1376 + int dst_x, int dst_y, int w, int h)
1353 1377 {
1354   - if (active_console == console) {
1355   - dpy_copy(console->ds, src_x, src_y, dst_x, dst_y, w, h);
  1378 + if (is_graphic_console()) {
  1379 + dpy_copy(ds, src_x, src_y, dst_x, dst_y, w, h);
1356 1380 }
1357 1381 }
1358 1382  
... ...
console.h
  View file @3023f33
... ... @@ -122,8 +122,12 @@ struct DisplayState {
122 122 void (*mouse_set)(int x, int y, int on);
123 123 void (*cursor_define)(int width, int height, int bpp, int hot_x, int hot_y,
124 124 uint8_t *image, uint8_t *mask);
  125 +
  126 + struct DisplayState *next;
125 127 };
126 128  
  129 +void register_displaystate(DisplayState *ds);
  130 +DisplayState *get_displaystate(void);
127 131 DisplaySurface* qemu_create_displaysurface(int width, int height, int bpp, int linesize);
128 132 DisplaySurface* qemu_resize_displaysurface(DisplaySurface *surface,
129 133 int width, int height, int bpp, int linesize);
... ... @@ -248,11 +252,12 @@ typedef void (*vga_hw_invalidate_ptr)(void *);
248 252 typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
249 253 typedef void (*vga_hw_text_update_ptr)(void *, console_ch_t *);
250 254  
251   -TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
252   - vga_hw_invalidate_ptr invalidate,
253   - vga_hw_screen_dump_ptr screen_dump,
254   - vga_hw_text_update_ptr text_update,
255   - void *opaque);
  255 +DisplayState *graphic_console_init(vga_hw_update_ptr update,
  256 + vga_hw_invalidate_ptr invalidate,
  257 + vga_hw_screen_dump_ptr screen_dump,
  258 + vga_hw_text_update_ptr text_update,
  259 + void *opaque);
  260 +
256 261 void vga_hw_update(void);
257 262 void vga_hw_invalidate(void);
258 263 void vga_hw_screen_dump(const char *filename);
... ... @@ -263,9 +268,9 @@ int is_fixedsize_console(void);
263 268 CharDriverState *text_console_init(DisplayState *ds, const char *p);
264 269 void console_select(unsigned int index);
265 270 void console_color_init(DisplayState *ds);
266   -void qemu_console_resize(QEMUConsole *console, int width, int height);
267   -void qemu_console_copy(QEMUConsole *console, int src_x, int src_y,
268   - int dst_x, int dst_y, int w, int h);
  271 +void qemu_console_resize(DisplayState *ds, int width, int height);
  272 +void qemu_console_copy(DisplayState *ds, int src_x, int src_y,
  273 + int dst_x, int dst_y, int w, int h);
269 274  
270 275 /* sdl.c */
271 276 void sdl_display_init(DisplayState *ds, int full_screen, int no_frame);
... ...
hw/an5206.c
  View file @3023f33
... ... @@ -27,7 +27,7 @@ void irq_info(void)
27 27 /* Board init. */
28 28  
29 29 static void an5206_init(ram_addr_t ram_size, int vga_ram_size,
30   - const char *boot_device, DisplayState *ds,
  30 + const char *boot_device,
31 31 const char *kernel_filename, const char *kernel_cmdline,
32 32 const char *initrd_filename, const char *cpu_model)
33 33 {
... ...
hw/blizzard.c
  View file @3023f33
... ... @@ -72,7 +72,6 @@ struct blizzard_s {
72 72 uint8_t iformat;
73 73 uint8_t source;
74 74 DisplayState *state;
75   - QEMUConsole *console;
76 75 blizzard_fn_t *line_fn_tab[2];
77 76 void *fb;
78 77  
... ... @@ -896,7 +895,7 @@ static void blizzard_update_display(void *opaque)
896 895  
897 896 if (s->x != ds_get_width(s->state) || s->y != ds_get_height(s->state)) {
898 897 s->invalidate = 1;
899   - qemu_console_resize(s->console, s->x, s->y);
  898 + qemu_console_resize(s->state, s->x, s->y);
900 899 }
901 900  
902 901 if (s->invalidate) {
... ... @@ -954,11 +953,10 @@ static void blizzard_screen_dump(void *opaque, const char *filename) {
954 953 #define DEPTH 32
955 954 #include "blizzard_template.h"
956 955  
957   -void *s1d13745_init(qemu_irq gpio_int, DisplayState *ds)
  956 +void *s1d13745_init(qemu_irq gpio_int)
958 957 {
959 958 struct blizzard_s *s = (struct blizzard_s *) qemu_mallocz(sizeof(*s));
960 959  
961   - s->state = ds;
962 960 s->fb = qemu_malloc(0x180000);
963 961  
964 962 switch (ds_get_bits_per_pixel(s->state)) {
... ... @@ -993,9 +991,9 @@ void *s1d13745_init(qemu_irq gpio_int, DisplayState *ds)
993 991  
994 992 blizzard_reset(s);
995 993  
996   - s->console = graphic_console_init(s->state, blizzard_update_display,
997   - blizzard_invalidate_display,
998   - blizzard_screen_dump, NULL, s);
  994 + s->state = graphic_console_init(blizzard_update_display,
  995 + blizzard_invalidate_display,
  996 + blizzard_screen_dump, NULL, s);
999 997  
1000 998 return s;
1001 999 }
... ...
hw/boards.h
  View file @3023f33
... ... @@ -4,7 +4,7 @@
4 4 #define HW_BOARDS_H
5 5  
6 6 typedef void QEMUMachineInitFunc(ram_addr_t ram_size, int vga_ram_size,
7   - const char *boot_device, DisplayState *ds,
  7 + const char *boot_device,
8 8 const char *kernel_filename,
9 9 const char *kernel_cmdline,
10 10 const char *initrd_filename,
... ...
hw/cirrus_vga.c
  View file @3023f33
... ... @@ -774,7 +774,7 @@ static void cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h)
774 774 s->cirrus_blt_width, s->cirrus_blt_height);
775 775  
776 776 if (notify)
777   - qemu_console_copy(s->console,
  777 + qemu_console_copy(s->ds,
778 778 sx, sy, dx, dy,
779 779 s->cirrus_blt_width / depth,
780 780 s->cirrus_blt_height);
... ... @@ -3290,7 +3290,7 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci)
3290 3290 *
3291 3291 ***************************************/
3292 3292  
3293   -void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
  3293 +void isa_cirrus_vga_init(uint8_t *vga_ram_base,
3294 3294 ram_addr_t vga_ram_offset, int vga_ram_size)
3295 3295 {
3296 3296 CirrusVGAState *s;
... ... @@ -3298,10 +3298,10 @@ void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
3298 3298 s = qemu_mallocz(sizeof(CirrusVGAState));
3299 3299  
3300 3300 vga_common_init((VGAState *)s,
3301   - ds, vga_ram_base, vga_ram_offset, vga_ram_size);
  3301 + vga_ram_base, vga_ram_offset, vga_ram_size);
3302 3302 cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0);
3303   - s->console = graphic_console_init(s->ds, s->update, s->invalidate,
3304   - s->screen_dump, s->text_update, s);
  3303 + s->ds = graphic_console_init(s->update, s->invalidate,
  3304 + s->screen_dump, s->text_update, s);
3305 3305 /* XXX ISA-LFB support */
3306 3306 }
3307 3307  
... ... @@ -3339,7 +3339,7 @@ static void cirrus_pci_mmio_map(PCIDevice *d, int region_num,
3339 3339 s->cirrus_mmio_io_addr);
3340 3340 }
3341 3341  
3342   -void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
  3342 +void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
3343 3343 ram_addr_t vga_ram_offset, int vga_ram_size)
3344 3344 {
3345 3345 PCICirrusVGAState *d;
... ... @@ -3366,11 +3366,11 @@ void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
3366 3366 /* setup VGA */
3367 3367 s = &d->cirrus_vga;
3368 3368 vga_common_init((VGAState *)s,
3369   - ds, vga_ram_base, vga_ram_offset, vga_ram_size);
  3369 + vga_ram_base, vga_ram_offset, vga_ram_size);
3370 3370 cirrus_init_common(s, device_id, 1);
3371 3371  
3372   - s->console = graphic_console_init(s->ds, s->update, s->invalidate,
3373   - s->screen_dump, s->text_update, s);
  3372 + s->ds = graphic_console_init(s->update, s->invalidate,
  3373 + s->screen_dump, s->text_update, s);
3374 3374  
3375 3375 s->pci_dev = (PCIDevice *)d;
3376 3376  
... ...
hw/devices.h
  View file @3023f33
... ... @@ -8,7 +8,7 @@ void smc91c111_init(NICInfo *, uint32_t, qemu_irq);
8 8  
9 9 /* ssd0323.c */
10 10 int ssd0323_xfer_ssi(void *opaque, int data);
11   -void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p);
  11 +void *ssd0323_init(qemu_irq *cmd_p);
12 12  
13 13 /* ads7846.c */
14 14 struct ads7846_state_s;
... ... @@ -37,7 +37,7 @@ void tsc2005_set_transform(void *opaque, struct mouse_transform_info_s *info);
37 37 void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode);
38 38  
39 39 /* blizzard.c */
40   -void *s1d13745_init(qemu_irq gpio_int, DisplayState *ds);
  40 +void *s1d13745_init(qemu_irq gpio_int);
41 41 void s1d13745_write(void *opaque, int dc, uint16_t value);
42 42 void s1d13745_write_block(void *opaque, int dc,
43 43 void *buf, size_t len, int pitch);
... ... @@ -67,13 +67,13 @@ void tusb6010_power(struct tusb_s *s, int on);
67 67 /* tc6393xb.c */
68 68 struct tc6393xb_s;
69 69 #define TC6393XB_RAM 0x110000 /* amount of ram for Video and USB */
70   -struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds);
  70 +struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq);
71 71 void tc6393xb_gpio_out_set(struct tc6393xb_s *s, int line,
72 72 qemu_irq handler);
73 73 qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s);
74 74 qemu_irq tc6393xb_l3v_get(struct tc6393xb_s *s);
75 75  
76 76 /* sm501.c */
77   -void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
  77 +void sm501_init(uint32_t base, unsigned long local_mem_base,
78 78 uint32_t local_mem_bytes, CharDriverState *chr);
79 79 #endif
... ...
hw/dummy_m68k.c
  View file @3023f33
... ... @@ -15,7 +15,7 @@
15 15 /* Board init. */
16 16  
17 17 static void dummy_m68k_init(ram_addr_t ram_size, int vga_ram_size,
18   - const char *boot_device, DisplayState *ds,
  18 + const char *boot_device,
19 19 const char *kernel_filename, const char *kernel_cmdline,
20 20 const char *initrd_filename, const char *cpu_model)
21 21 {
... ...
hw/etraxfs.c
  View file @3023f33
... ... @@ -47,7 +47,7 @@ static void main_cpu_reset(void *opaque)
47 47  
48 48 static
49 49 void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
50   - const char *boot_device, DisplayState *ds,
  50 + const char *boot_device,
51 51 const char *kernel_filename, const char *kernel_cmdline,
52 52 const char *initrd_filename, const char *cpu_model)
53 53 {
... ...
hw/g364fb.c
  View file @3023f33
... ... @@ -32,7 +32,6 @@ typedef struct G364State {
32 32 uint8_t palette[256][3];
33 33 /* display refresh support */
34 34 DisplayState *ds;
35   - QEMUConsole *console;
36 35 int graphic_mode;
37 36 uint32_t scr_width, scr_height; /* in pixels */
38 37 } G364State;
... ... @@ -131,7 +130,7 @@ static void g364fb_update_display(void *opaque)
131 130 full_update = 1;
132 131 }
133 132 if (s->scr_width != ds_get_width(s->ds) || s->scr_height != ds_get_height(s->ds)) {
134   - qemu_console_resize(s->console, s->scr_width, s->scr_height);
  133 + qemu_console_resize(s->ds, s->scr_width, s->scr_height);
135 134 full_update = 1;
136 135 }
137 136 switch(graphic_mode) {
... ... @@ -354,8 +353,7 @@ static CPUWriteMemoryFunc *g364fb_mem_write[3] = {
354 353 g364fb_mem_writel,
355 354 };
356 355  
357   -int g364fb_mm_init(DisplayState *ds,
358   - int vram_size, int it_shift,
  356 +int g364fb_mm_init(int vram_size, int it_shift,
359 357 target_phys_addr_t vram_base, target_phys_addr_t ctrl_base)
360 358 {
361 359 G364State *s;
... ... @@ -371,11 +369,9 @@ int g364fb_mm_init(DisplayState *ds,
371 369 qemu_register_reset(g364fb_reset, s);
372 370 g364fb_reset(s);
373 371  
374   - s->ds = ds;
375   -
376   - s->console = graphic_console_init(ds, g364fb_update_display,
377   - g364fb_invalidate_display,
378   - g364fb_screen_dump, NULL, s);
  372 + s->ds = graphic_console_init(g364fb_update_display,
  373 + g364fb_invalidate_display,
  374 + g364fb_screen_dump, NULL, s);
379 375  
380 376 io_vram = cpu_register_io_memory(0, g364fb_mem_read, g364fb_mem_write, s);
381 377 cpu_register_physical_memory(vram_base, vram_size, io_vram);
... ...
hw/gumstix.c
  View file @3023f33
... ... @@ -42,7 +42,7 @@
42 42 static const int sector_len = 128 * 1024;
43 43  
44 44 static void connex_init(ram_addr_t ram_size, int vga_ram_size,
45   - const char *boot_device, DisplayState *ds,
  45 + const char *boot_device,
46 46 const char *kernel_filename, const char *kernel_cmdline,
47 47 const char *initrd_filename, const char *cpu_model)
48 48 {
... ... @@ -58,7 +58,7 @@ static void connex_init(ram_addr_t ram_size, int vga_ram_size,
58 58 exit(1);
59 59 }
60 60  
61   - cpu = pxa255_init(connex_ram, ds);
  61 + cpu = pxa255_init(connex_ram);
62 62  
63 63 index = drive_get_index(IF_PFLASH, 0, 0);
64 64 if (index == -1) {
... ... @@ -82,7 +82,7 @@ static void connex_init(ram_addr_t ram_size, int vga_ram_size,
82 82 }
83 83  
84 84 static void verdex_init(ram_addr_t ram_size, int vga_ram_size,
85   - const char *boot_device, DisplayState *ds,
  85 + const char *boot_device,
86 86 const char *kernel_filename, const char *kernel_cmdline,
87 87 const char *initrd_filename, const char *cpu_model)
88 88 {
... ... @@ -98,7 +98,7 @@ static void verdex_init(ram_addr_t ram_size, int vga_ram_size,
98 98 exit(1);
99 99 }
100 100  
101   - cpu = pxa270_init(verdex_ram, ds, cpu_model ?: "pxa270-c0");
  101 + cpu = pxa270_init(verdex_ram, cpu_model ?: "pxa270-c0");
102 102  
103 103 index = drive_get_index(IF_PFLASH, 0, 0);
104 104 if (index == -1) {
... ...
hw/i2c.h
  View file @3023f33
... ... @@ -71,7 +71,7 @@ void wm8750_dac_commit(void *opaque);
71 71 void wm8750_set_bclk_in(void *opaque, int new_hz);
72 72  
73 73 /* ssd0303.c */
74   -void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address);
  74 +void ssd0303_init(i2c_bus *bus, int address);
75 75  
76 76 /* twl92230.c */
77 77 i2c_slave *twl92230_init(i2c_bus *bus, qemu_irq irq);
... ...
hw/integratorcp.c
  View file @3023f33
... ... @@ -454,7 +454,7 @@ static struct arm_boot_info integrator_binfo = {
454 454 };
455 455  
456 456 static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size,
457   - const char *boot_device, DisplayState *ds,
  457 + const char *boot_device,
458 458 const char *kernel_filename, const char *kernel_cmdline,
459 459 const char *initrd_filename, const char *cpu_model)
460 460 {
... ... @@ -499,7 +499,7 @@ static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size,
499 499 pl181_init(0x1c000000, drives_table[sd].bdrv, pic[23], pic[24]);
500 500 if (nd_table[0].vlan)
501 501 smc91c111_init(&nd_table[0], 0xc8000000, pic[27]);
502   - pl110_init(ds, 0xc0000000, pic[22], 0);
  502 + pl110_init(0xc0000000, pic[22], 0);
503 503  
504 504 integrator_binfo.ram_size = ram_size;
505 505 integrator_binfo.kernel_filename = kernel_filename;
... ...
hw/jazz_led.c
  View file @3023f33
... ... @@ -36,7 +36,6 @@ typedef enum {
36 36 typedef struct LedState {
37 37 uint8_t segments;
38 38 DisplayState *ds;
39   - QEMUConsole *console;
40 39 screen_state_t state;
41 40 } LedState;
42 41  
... ... @@ -289,7 +288,7 @@ static void jazz_led_text_update(void *opaque, console_ch_t *chardata)
289 288 char buf[2];
290 289  
291 290 dpy_cursor(s->ds, -1, -1);
292   - qemu_console_resize(s->console, 2, 1);
  291 + qemu_console_resize(s->ds, 2, 1);
293 292  
294 293 /* TODO: draw the segments */
295 294 snprintf(buf, 2, "%02hhx\n", s->segments);
... ... @@ -299,7 +298,7 @@ static void jazz_led_text_update(void *opaque, console_ch_t *chardata)
299 298 dpy_update(s->ds, 0, 0, 2, 1);
300 299 }
301 300  
302   -void jazz_led_init(DisplayState *ds, target_phys_addr_t base)
  301 +void jazz_led_init(target_phys_addr_t base)
303 302 {
304 303 LedState *s;
305 304 int io;
... ... @@ -308,15 +307,14 @@ void jazz_led_init(DisplayState *ds, target_phys_addr_t base)
308 307 if (!s)
309 308 return;
310 309  
311   - s->ds = ds;
312 310 s->state = REDRAW_SEGMENTS | REDRAW_BACKGROUND;
313 311  
314 312 io = cpu_register_io_memory(0, led_read, led_write, s);
315 313 cpu_register_physical_memory(base, 1, io);
316 314  
317   - s->console = graphic_console_init(ds, jazz_led_update_display,
318   - jazz_led_invalidate_display,
319   - jazz_led_screen_dump,
320   - jazz_led_text_update, s);
321   - qemu_console_resize(s->console, 60, 80);
  315 + s->ds = graphic_console_init(jazz_led_update_display,
  316 + jazz_led_invalidate_display,
  317 + jazz_led_screen_dump,
  318 + jazz_led_text_update, s);
  319 + qemu_console_resize(s->ds, 60, 80);
322 320 }
... ...
hw/mainstone.c
  View file @3023f33
... ... @@ -69,7 +69,7 @@ static struct arm_boot_info mainstone_binfo = {
69 69 };
70 70  
71 71 static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size,
72   - DisplayState *ds, const char *kernel_filename,
  72 + const char *kernel_filename,
73 73 const char *kernel_cmdline, const char *initrd_filename,
74 74 const char *cpu_model, enum mainstone_model_e model, int arm_id)
75 75 {
... ... @@ -91,7 +91,7 @@ static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size,
91 91 exit(1);
92 92 }
93 93  
94   - cpu = pxa270_init(mainstone_binfo.ram_size, ds, cpu_model);
  94 + cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
95 95 cpu_register_physical_memory(0, MAINSTONE_ROM,
96 96 qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM);
97 97  
... ... @@ -135,11 +135,11 @@ static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size,
135 135 }
136 136  
137 137 static void mainstone_init(ram_addr_t ram_size, int vga_ram_size,
138   - const char *boot_device, DisplayState *ds,
  138 + const char *boot_device,
139 139 const char *kernel_filename, const char *kernel_cmdline,
140 140 const char *initrd_filename, const char *cpu_model)
141 141 {
142   - mainstone_common_init(ram_size, vga_ram_size, ds, kernel_filename,
  142 + mainstone_common_init(ram_size, vga_ram_size, kernel_filename,
143 143 kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
144 144 }
145 145  
... ...
hw/mcf5208.c
  View file @3023f33
... ... @@ -198,7 +198,7 @@ static void mcf5208_sys_init(qemu_irq *pic)
198 198 }
199 199  
200 200 static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size,
201   - const char *boot_device, DisplayState *ds,
  201 + const char *boot_device,
202 202 const char *kernel_filename, const char *kernel_cmdline,
203 203 const char *initrd_filename, const char *cpu_model)
204 204 {
... ...
hw/mips.h
  View file @3023f33
... ... @@ -10,15 +10,14 @@ void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
10 10 void ds1225y_set_protection(void *opaque, int protection);
11 11  
12 12 /* g364fb.c */
13   -int g364fb_mm_init(DisplayState *ds,
14   - int vram_size, int it_shift,
  13 +int g364fb_mm_init(int vram_size, int it_shift,
15 14 target_phys_addr_t vram_base, target_phys_addr_t ctrl_base);
16 15  
17 16 /* mipsnet.c */
18 17 void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
19 18  
20 19 /* jazz_led.c */
21   -extern void jazz_led_init(DisplayState *ds, target_phys_addr_t base);
  20 +extern void jazz_led_init(target_phys_addr_t base);
22 21  
23 22 /* mips_int.c */
24 23 extern void cpu_mips_irq_init_cpu(CPUState *env);
... ...
hw/mips_jazz.c
  View file @3023f33
... ... @@ -125,7 +125,7 @@ static void audio_init(qemu_irq *pic)
125 125  
126 126 static
127 127 void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
128   - DisplayState *ds, const char *cpu_model,
  128 + const char *cpu_model,
129 129 enum jazz_model_e jazz_model)
130 130 {
131 131 char buf[1024];
... ... @@ -201,10 +201,10 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
201 201 /* Video card */
202 202 switch (jazz_model) {
203 203 case JAZZ_MAGNUM:
204   - g364fb_mm_init(ds, vga_ram_size, 0, 0x40000000, 0x60000000);
  204 + g364fb_mm_init(vga_ram_size, 0, 0x40000000, 0x60000000);
205 205 break;
206 206 case JAZZ_PICA61:
207   - isa_vga_mm_init(ds, phys_ram_base + ram_size, ram_size, vga_ram_size,
  207 + isa_vga_mm_init(phys_ram_base + ram_size, ram_size, vga_ram_size,
208 208 0x40000000, 0x60000000, 0);
209 209 break;
210 210 default:
... ... @@ -267,25 +267,25 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
267 267 ds1225y_init(0x80009000, "nvram");
268 268  
269 269 /* LED indicator */
270   - jazz_led_init(ds, 0x8000f000);
  270 + jazz_led_init(0x8000f000);
271 271 }
272 272  
273 273 static
274 274 void mips_magnum_init (ram_addr_t ram_size, int vga_ram_size,
275   - const char *boot_device, DisplayState *ds,
  275 + const char *boot_device,
276 276 const char *kernel_filename, const char *kernel_cmdline,
277 277 const char *initrd_filename, const char *cpu_model)
278 278 {
279   - mips_jazz_init(ram_size, vga_ram_size, ds, cpu_model, JAZZ_MAGNUM);
  279 + mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_MAGNUM);
280 280 }
281 281  
282 282 static
283 283 void mips_pica61_init (ram_addr_t ram_size, int vga_ram_size,
284   - const char *boot_device, DisplayState *ds,
  284 + const char *boot_device,
285 285 const char *kernel_filename, const char *kernel_cmdline,
286 286 const char *initrd_filename, const char *cpu_model)
287 287 {
288   - mips_jazz_init(ram_size, vga_ram_size, ds, cpu_model, JAZZ_PICA61);
  288 + mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_PICA61);
289 289 }
290 290  
291 291 QEMUMachine mips_magnum_machine = {
... ...
hw/mips_malta.c
  View file @3023f33
... ... @@ -763,7 +763,7 @@ static void main_cpu_reset(void *opaque)
763 763  
764 764 static
765 765 void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
766   - const char *boot_device, DisplayState *ds,
  766 + const char *boot_device,
767 767 const char *kernel_filename, const char *kernel_cmdline,
768 768 const char *initrd_filename, const char *cpu_model)
769 769 {
... ... @@ -938,7 +938,7 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
938 938 network_init(pci_bus);
939 939  
940 940 /* Optional PCI video card */
941   - pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + ram_size,
  941 + pci_cirrus_vga_init(pci_bus, phys_ram_base + ram_size,
942 942 ram_size, vga_ram_size);
943 943 }
944 944  
... ...
hw/mips_mipssim.c
  View file @3023f33
... ... @@ -108,7 +108,7 @@ static void main_cpu_reset(void *opaque)
108 108  
109 109 static void
110 110 mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
111   - const char *boot_device, DisplayState *ds,
  111 + const char *boot_device,
112 112 const char *kernel_filename, const char *kernel_cmdline,
113 113 const char *initrd_filename, const char *cpu_model)
114 114 {
... ...
hw/mips_r4k.c
  View file @3023f33
... ... @@ -148,7 +148,7 @@ static void main_cpu_reset(void *opaque)
148 148 static const int sector_len = 32 * 1024;
149 149 static
150 150 void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
151   - const char *boot_device, DisplayState *ds,
  151 + const char *boot_device,
152 152 const char *kernel_filename, const char *kernel_cmdline,
153 153 const char *initrd_filename, const char *cpu_model)
154 154 {
... ... @@ -244,7 +244,7 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
244 244 }
245 245 }
246 246  
247   - isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
  247 + isa_vga_init(phys_ram_base + ram_size, ram_size,
248 248 vga_ram_size);
249 249  
250 250 if (nd_table[0].vlan)
... ...
hw/musicpal.c
  View file @3023f33
... ... @@ -752,7 +752,6 @@ typedef struct musicpal_lcd_state {
752 752 int page;
753 753 int page_off;
754 754 DisplayState *ds;
755   - QEMUConsole *console;
756 755 uint8_t video_ram[128*64/8];
757 756 } musicpal_lcd_state;
758 757  
... ... @@ -906,7 +905,7 @@ static CPUWriteMemoryFunc *musicpal_lcd_writefn[] = {
906 905 musicpal_lcd_write
907 906 };
908 907  
909   -static void musicpal_lcd_init(DisplayState *ds, uint32_t base)
  908 +static void musicpal_lcd_init(uint32_t base)
910 909 {
911 910 musicpal_lcd_state *s;
912 911 int iomemtype;
... ... @@ -914,14 +913,13 @@ static void musicpal_lcd_init(DisplayState *ds, uint32_t base)
914 913 s = qemu_mallocz(sizeof(musicpal_lcd_state));
915 914 if (!s)
916 915 return;
917   - s->ds = ds;
918 916 iomemtype = cpu_register_io_memory(0, musicpal_lcd_readfn,
919 917 musicpal_lcd_writefn, s);
920 918 cpu_register_physical_memory(base, MP_LCD_SIZE, iomemtype);
921 919  
922   - s->console = graphic_console_init(ds, lcd_refresh, lcd_invalidate,
923   - NULL, NULL, s);
924   - qemu_console_resize(s->console, 128*3, 64*3);
  920 + s->ds = graphic_console_init(lcd_refresh, lcd_invalidate,
  921 + NULL, NULL, s);
  922 + qemu_console_resize(s->ds, 128*3, 64*3);
925 923 }
926 924  
927 925 /* PIC register offsets */
... ... @@ -1404,7 +1402,7 @@ static struct arm_boot_info musicpal_binfo = {
1404 1402 };
1405 1403  
1406 1404 static void musicpal_init(ram_addr_t ram_size, int vga_ram_size,
1407   - const char *boot_device, DisplayState *ds,
  1405 + const char *boot_device,
1408 1406 const char *kernel_filename, const char *kernel_cmdline,
1409 1407 const char *initrd_filename, const char *cpu_model)
1410 1408 {
... ... @@ -1470,7 +1468,7 @@ static void musicpal_init(ram_addr_t ram_size, int vga_ram_size,
1470 1468 }
1471 1469 mv88w8618_flashcfg_init(MP_FLASHCFG_BASE);
1472 1470  
1473   - musicpal_lcd_init(ds, MP_LCD_BASE);
  1471 + musicpal_lcd_init(MP_LCD_BASE);
1474 1472  
1475 1473 qemu_add_kbd_event_handler(musicpal_key_event, pic[MP_GPIO_IRQ]);
1476 1474  
... ...
hw/nseries.c
  View file @3023f33
... ... @@ -714,9 +714,9 @@ static void n800_dss_init(struct rfbi_chip_s *chip)
714 714 free(fb_blank);
715 715 }
716 716  
717   -static void n8x0_dss_setup(struct n800_s *s, DisplayState *ds)
  717 +static void n8x0_dss_setup(struct n800_s *s)
718 718 {
719   - s->blizzard.opaque = s1d13745_init(0, ds);
  719 + s->blizzard.opaque = s1d13745_init(0);
720 720 s->blizzard.block = s1d13745_write_block;
721 721 s->blizzard.write = s1d13745_write;
722 722 s->blizzard.read = s1d13745_read;
... ... @@ -1266,13 +1266,14 @@ static int n810_atag_setup(struct arm_boot_info *info, void *p)
1266 1266 }
1267 1267  
1268 1268 static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
1269   - DisplayState *ds, const char *kernel_filename,
  1269 + const char *kernel_filename,
1270 1270 const char *kernel_cmdline, const char *initrd_filename,
1271 1271 const char *cpu_model, struct arm_boot_info *binfo, int model)
1272 1272 {
1273 1273 struct n800_s *s = (struct n800_s *) qemu_mallocz(sizeof(*s));
1274 1274 int sdram_size = binfo->ram_size;
1275 1275 int onenandram_size = 0x00010000;
  1276 + DisplayState *ds = get_displaystate();
1276 1277  
1277 1278 if (ram_size < sdram_size + onenandram_size + OMAP242X_SRAM_SIZE) {
1278 1279 fprintf(stderr, "This architecture uses %i bytes of memory\n",
... ... @@ -1280,7 +1281,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
1280 1281 exit(1);
1281 1282 }
1282 1283  
1283   - s->cpu = omap2420_mpu_init(sdram_size, NULL, cpu_model);
  1284 + s->cpu = omap2420_mpu_init(sdram_size, cpu_model);
1284 1285  
1285 1286 /* Setup peripherals
1286 1287 *
... ... @@ -1317,7 +1318,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
1317 1318 n810_kbd_setup(s);
1318 1319 }
1319 1320 n8x0_spi_setup(s);
1320   - n8x0_dss_setup(s, ds);
  1321 + n8x0_dss_setup(s);
1321 1322 n8x0_cbus_setup(s);
1322 1323 n8x0_uart_setup(s);
1323 1324 if (usb_enabled)
... ... @@ -1384,21 +1385,21 @@ static struct arm_boot_info n810_binfo = {
1384 1385 };
1385 1386  
1386 1387 static void n800_init(ram_addr_t ram_size, int vga_ram_size,
1387   - const char *boot_device, DisplayState *ds,
  1388 + const char *boot_device,
1388 1389 const char *kernel_filename, const char *kernel_cmdline,
1389 1390 const char *initrd_filename, const char *cpu_model)
1390 1391 {
1391   - return n8x0_init(ram_size, boot_device, ds,
  1392 + return n8x0_init(ram_size, boot_device,
1392 1393 kernel_filename, kernel_cmdline, initrd_filename,
1393 1394 cpu_model, &n800_binfo, 800);
1394 1395 }
1395 1396  
1396 1397 static void n810_init(ram_addr_t ram_size, int vga_ram_size,
1397   - const char *boot_device, DisplayState *ds,
  1398 + const char *boot_device,
1398 1399 const char *kernel_filename, const char *kernel_cmdline,
1399 1400 const char *initrd_filename, const char *cpu_model)
1400 1401 {
1401   - return n8x0_init(ram_size, boot_device, ds,
  1402 + return n8x0_init(ram_size, boot_device,
1402 1403 kernel_filename, kernel_cmdline, initrd_filename,
1403 1404 cpu_model, &n810_binfo, 810);
1404 1405 }
... ...
hw/omap.h
  View file @3023f33
... ... @@ -746,7 +746,7 @@ struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta,
746 746 struct omap_lcd_panel_s;
747 747 void omap_lcdc_reset(struct omap_lcd_panel_s *s);
748 748 struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
749   - struct omap_dma_lcd_channel_s *dma, DisplayState *ds,
  749 + struct omap_dma_lcd_channel_s *dma,
750 750 ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk);
751 751  
752 752 /* omap_dss.c */
... ... @@ -759,7 +759,7 @@ struct rfbi_chip_s {
759 759 struct omap_dss_s;
760 760 void omap_dss_reset(struct omap_dss_s *s);
761 761 struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
762   - target_phys_addr_t l3_base, DisplayState *ds,
  762 + target_phys_addr_t l3_base,
763 763 qemu_irq irq, qemu_irq drq,
764 764 omap_clk fck1, omap_clk fck2, omap_clk ck54m,
765 765 omap_clk ick1, omap_clk ick2);
... ... @@ -956,11 +956,11 @@ struct omap_mpu_state_s {
956 956  
957 957 /* omap1.c */
958 958 struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
959   - DisplayState *ds, const char *core);
  959 + const char *core);
960 960  
961 961 /* omap2.c */
962 962 struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
963   - DisplayState *ds, const char *core);
  963 + const char *core);
964 964  
965 965 # if TARGET_PHYS_ADDR_BITS == 32
966 966 # define OMAP_FMT_plx "%#08x"
... ...
hw/omap1.c
  View file @3023f33
... ... @@ -4622,7 +4622,7 @@ static int omap_validate_tipb_mpui_addr(struct omap_mpu_state_s *s,
4622 4622 }
4623 4623  
4624 4624 struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
4625   - DisplayState *ds, const char *core)
  4625 + const char *core)
4626 4626 {
4627 4627 int i;
4628 4628 struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)
... ... @@ -4704,7 +4704,7 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
4704 4704 omap_findclk(s, "clk32-kHz"));
4705 4705  
4706 4706 s->lcd = omap_lcdc_init(0xfffec000, s->irq[0][OMAP_INT_LCD_CTRL],
4707   - omap_dma_get_lcdch(s->dma), ds, imif_base, emiff_base,
  4707 + omap_dma_get_lcdch(s->dma), imif_base, emiff_base,
4708 4708 omap_findclk(s, "lcd_ck"));
4709 4709  
4710 4710 omap_ulpd_pm_init(0xfffe0800, s);
... ...
hw/omap2.c
  View file @3023f33
... ... @@ -4492,7 +4492,7 @@ static const struct dma_irq_map omap2_dma_irq_map[] = {
4492 4492 };
4493 4493  
4494 4494 struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
4495   - DisplayState *ds, const char *core)
  4495 + const char *core)
4496 4496 {
4497 4497 struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)
4498 4498 qemu_mallocz(sizeof(struct omap_mpu_state_s));
... ... @@ -4670,7 +4670,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
4670 4670 omap_findclk(s, "spi2_fclk"),
4671 4671 omap_findclk(s, "spi2_iclk"));
4672 4672  
4673   - s->dss = omap_dss_init(omap_l4ta(s->l4, 10), 0x68000800, ds,
  4673 + s->dss = omap_dss_init(omap_l4ta(s->l4, 10), 0x68000800,
4674 4674 /* XXX wire M_IRQ_25, D_L2_IRQ_30 and I_IRQ_13 together */
4675 4675 s->irq[0][OMAP_INT_24XX_DSS_IRQ], s->drq[OMAP24XX_DMA_DSS],
4676 4676 omap_findclk(s, "dss_clk1"), omap_findclk(s, "dss_clk2"),
... ...
hw/omap_dss.c
  View file @3023f33
... ... @@ -1022,7 +1022,7 @@ static CPUWriteMemoryFunc *omap_im3_writefn[] = {
1022 1022 };
1023 1023  
1024 1024 struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
1025   - target_phys_addr_t l3_base, DisplayState *ds,
  1025 + target_phys_addr_t l3_base,
1026 1026 qemu_irq irq, qemu_irq drq,
1027 1027 omap_clk fck1, omap_clk fck2, omap_clk ck54m,
1028 1028 omap_clk ick1, omap_clk ick2)
... ... @@ -1033,7 +1033,6 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
1033 1033  
1034 1034 s->irq = irq;
1035 1035 s->drq = drq;
1036   - s->state = ds;
1037 1036 omap_dss_reset(s);
1038 1037  
1039 1038 iomemtype[0] = l4_register_io_memory(0, omap_diss1_readfn,
... ... @@ -1053,9 +1052,8 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
1053 1052 cpu_register_physical_memory(l3_base, 0x1000, iomemtype[4]);
1054 1053  
1055 1054 #if 0
1056   - if (ds)
1057   - graphic_console_init(ds, omap_update_display,
1058   - omap_invalidate_display, omap_screen_dump, s);
  1055 + s->state = graphic_console_init(omap_update_display,
  1056 + omap_invalidate_display, omap_screen_dump, s);
1059 1057 #endif
1060 1058  
1061 1059 return s;
... ...
hw/omap_lcdc.c
  View file @3023f33
... ... @@ -24,7 +24,6 @@
24 24 struct omap_lcd_panel_s {
25 25 qemu_irq irq;
26 26 DisplayState *state;
27   - QEMUConsole *console;
28 27 ram_addr_t imif_base;
29 28 ram_addr_t emiff_base;
30 29  
... ... @@ -174,7 +173,7 @@ static void omap_update_display(void *opaque)
174 173 width = omap_lcd->width;
175 174 if (width != ds_get_width(omap_lcd->state) ||
176 175 omap_lcd->height != ds_get_height(omap_lcd->state)) {
177   - qemu_console_resize(omap_lcd->console,
  176 + qemu_console_resize(omap_lcd->state,
178 177 omap_lcd->width, omap_lcd->height);
179 178 omap_lcd->invalidate = 1;
180 179 }
... ... @@ -472,7 +471,7 @@ void omap_lcdc_reset(struct omap_lcd_panel_s *s)
472 471 }
473 472  
474 473 struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
475   - struct omap_dma_lcd_channel_s *dma, DisplayState *ds,
  474 + struct omap_dma_lcd_channel_s *dma,
476 475 ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk)
477 476 {
478 477 int iomemtype;
... ... @@ -481,7 +480,6 @@ struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
481 480  
482 481 s->irq = irq;
483 482 s->dma = dma;
484   - s->state = ds;
485 483 s->imif_base = imif_base;
486 484 s->emiff_base = emiff_base;
487 485 omap_lcdc_reset(s);
... ... @@ -490,9 +488,9 @@ struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
490 488 omap_lcdc_writefn, s);
491 489 cpu_register_physical_memory(base, 0x100, iomemtype);
492 490  
493   - s->console = graphic_console_init(ds, omap_update_display,
494   - omap_invalidate_display,
495   - omap_screen_dump, NULL, s);
  491 + s->state = graphic_console_init(omap_update_display,
  492 + omap_invalidate_display,
  493 + omap_screen_dump, NULL, s);
496 494  
497 495 return s;
498 496 }
... ...
hw/omap_sx1.c
  View file @3023f33
... ... @@ -136,7 +136,7 @@ static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
136 136 flash_size = flash2_size;
137 137 }
138 138  
139   - cpu = omap310_mpu_init(sx1_binfo.ram_size, ds, cpu_model);
  139 + cpu = omap310_mpu_init(sx1_binfo.ram_size, cpu_model);
140 140  
141 141 /* External Flash (EMIFS) */
142 142 cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
... ... @@ -201,8 +201,7 @@ static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
201 201 cpu->env->regs[15] = 0x00000000;
202 202 }
203 203  
204   - ds->surface = qemu_resize_displaysurface(ds->surface, 640, 480, 32, 4 * 640);
205   - dpy_resize(ds);
  204 + qemu_console_resize(ds, 640, 480);
206 205 }
207 206  
208 207 static void sx1_init_v1(ram_addr_t ram_size, int vga_ram_size,
... ...
hw/palm.c
  View file @3023f33
... ... @@ -200,7 +200,7 @@ static struct arm_boot_info palmte_binfo = {
200 200 };
201 201  
202 202 static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
203   - const char *boot_device, DisplayState *ds,
  203 + const char *boot_device,
204 204 const char *kernel_filename, const char *kernel_cmdline,
205 205 const char *initrd_filename, const char *cpu_model)
206 206 {
... ... @@ -214,6 +214,7 @@ static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
214 214 static uint32_t cs3val = 0xe1a0e1a0;
215 215 ram_addr_t phys_flash;
216 216 int rom_size, rom_loaded = 0;
  217 + DisplayState *ds = get_displaystate();
217 218  
218 219 if (ram_size < flash_size + sdram_size + OMAP15XX_SRAM_SIZE) {
219 220 fprintf(stderr, "This architecture uses %i bytes of memory\n",
... ... @@ -221,7 +222,7 @@ static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
221 222 exit(1);
222 223 }
223 224  
224   - cpu = omap310_mpu_init(sdram_size, ds, cpu_model);
  225 + cpu = omap310_mpu_init(sdram_size, cpu_model);
225 226  
226 227 /* External Flash (EMIFS) */
227 228 cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
... ...
... ... @@ -752,7 +752,7 @@ static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
752 752  
753 753 /* PC hardware initialisation */
754 754 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
755   - const char *boot_device, DisplayState *ds,
  755 + const char *boot_device,
756 756 const char *kernel_filename, const char *kernel_cmdline,
757 757 const char *initrd_filename,
758 758 int pci_enabled, const char *cpu_model)
... ... @@ -946,24 +946,24 @@ vga_bios_error:
946 946 if (cirrus_vga_enabled) {
947 947 if (pci_enabled) {
948 948 pci_cirrus_vga_init(pci_bus,
949   - ds, phys_ram_base + vga_ram_addr,
  949 + phys_ram_base + vga_ram_addr,
950 950 vga_ram_addr, vga_ram_size);
951 951 } else {
952   - isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
  952 + isa_cirrus_vga_init(phys_ram_base + vga_ram_addr,
953 953 vga_ram_addr, vga_ram_size);
954 954 }
955 955 } else if (vmsvga_enabled) {
956 956 if (pci_enabled)
957   - pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
  957 + pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_addr,
958 958 vga_ram_addr, vga_ram_size);
959 959 else
960 960 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
961 961 } else if (std_vga_enabled) {
962 962 if (pci_enabled) {
963   - pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
  963 + pci_vga_init(pci_bus, phys_ram_base + vga_ram_addr,
964 964 vga_ram_addr, vga_ram_size, 0, 0);
965 965 } else {
966   - isa_vga_init(ds, phys_ram_base + vga_ram_addr,
  966 + isa_vga_init(phys_ram_base + vga_ram_addr,
967 967 vga_ram_addr, vga_ram_size);
968 968 }
969 969 }
... ... @@ -1111,25 +1111,25 @@ vga_bios_error:
1111 1111 }
1112 1112  
1113 1113 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1114   - const char *boot_device, DisplayState *ds,
  1114 + const char *boot_device,
1115 1115 const char *kernel_filename,
1116 1116 const char *kernel_cmdline,
1117 1117 const char *initrd_filename,
1118 1118 const char *cpu_model)
1119 1119 {
1120   - pc_init1(ram_size, vga_ram_size, boot_device, ds,
  1120 + pc_init1(ram_size, vga_ram_size, boot_device,
1121 1121 kernel_filename, kernel_cmdline,
1122 1122 initrd_filename, 1, cpu_model);
1123 1123 }
1124 1124  
1125 1125 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1126   - const char *boot_device, DisplayState *ds,
  1126 + const char *boot_device,
1127 1127 const char *kernel_filename,
1128 1128 const char *kernel_cmdline,
1129 1129 const char *initrd_filename,
1130 1130 const char *cpu_model)
1131 1131 {
1132   - pc_init1(ram_size, vga_ram_size, boot_device, ds,
  1132 + pc_init1(ram_size, vga_ram_size, boot_device,
1133 1133 kernel_filename, kernel_cmdline,
1134 1134 initrd_filename, 0, cpu_model);
1135 1135 }
... ...
... ... @@ -132,20 +132,20 @@ extern enum vga_retrace_method vga_retrace_method;
132 132 #define VGA_RAM_SIZE (9 * 1024 * 1024)
133 133 #endif
134 134  
135   -int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
  135 +int isa_vga_init(uint8_t *vga_ram_base,
136 136 unsigned long vga_ram_offset, int vga_ram_size);
137   -int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
  137 +int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
138 138 unsigned long vga_ram_offset, int vga_ram_size,
139 139 unsigned long vga_bios_offset, int vga_bios_size);
140   -int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
  140 +int isa_vga_mm_init(uint8_t *vga_ram_base,
141 141 unsigned long vga_ram_offset, int vga_ram_size,
142 142 target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
143 143 int it_shift);
144 144  
145 145 /* cirrus_vga.c */
146   -void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
  146 +void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
147 147 ram_addr_t vga_ram_offset, int vga_ram_size);
148   -void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
  148 +void isa_cirrus_vga_init(uint8_t *vga_ram_base,
149 149 ram_addr_t vga_ram_offset, int vga_ram_size);
150 150  
151 151 /* ide.c */
... ...
hw/pci.h
  View file @3023f33
... ... @@ -135,7 +135,7 @@ void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
135 135 void *lsi_scsi_init(PCIBus *bus, int devfn);
136 136  
137 137 /* vmware_vga.c */
138   -void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
  138 +void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
139 139 unsigned long vga_ram_offset, int vga_ram_size);
140 140  
141 141 /* usb-uhci.c */
... ...
hw/pl110.c
  View file @3023f33
... ... @@ -29,7 +29,6 @@ enum pl110_bppmode
29 29  
30 30 typedef struct {
31 31 DisplayState *ds;
32   - QEMUConsole *console;
33 32  
34 33 /* The Versatile/PB uses a slightly modified PL110 controller. */
35 34 int versatile;
... ... @@ -271,7 +270,7 @@ static void pl110_resize(pl110_state *s, int width, int height)
271 270 {
272 271 if (width != s->cols || height != s->rows) {
273 272 if (pl110_enabled(s)) {
274   - qemu_console_resize(s->console, width, height);
  273 + qemu_console_resize(s->ds, width, height);
275 274 }
276 275 }
277 276 s->cols = width;
... ... @@ -386,7 +385,7 @@ static void pl110_write(void *opaque, target_phys_addr_t offset,
386 385 s->cr = val;
387 386 s->bpp = (val >> 1) & 7;
388 387 if (pl110_enabled(s)) {
389   - qemu_console_resize(s->console, s->cols, s->rows);
  388 + qemu_console_resize(s->ds, s->cols, s->rows);
390 389 }
391 390 break;
392 391 case 10: /* LCDICR */
... ... @@ -410,8 +409,7 @@ static CPUWriteMemoryFunc *pl110_writefn[] = {
410 409 pl110_write
411 410 };
412 411  
413   -void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq,
414   - int versatile)
  412 +void *pl110_init(uint32_t base, qemu_irq irq, int versatile)
415 413 {
416 414 pl110_state *s;
417 415 int iomemtype;
... ... @@ -420,12 +418,11 @@ void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq,
420 418 iomemtype = cpu_register_io_memory(0, pl110_readfn,
421 419 pl110_writefn, s);
422 420 cpu_register_physical_memory(base, 0x00001000, iomemtype);
423   - s->ds = ds;
424 421 s->versatile = versatile;
425 422 s->irq = irq;
426   - s->console = graphic_console_init(ds, pl110_update_display,
427   - pl110_invalidate_display,
428   - NULL, NULL, s);
  423 + s->ds = graphic_console_init(pl110_update_display,
  424 + pl110_invalidate_display,
  425 + NULL, NULL, s);
429 426 /* ??? Save/restore. */
430 427 return s;
431 428 }
... ...
hw/ppc405_boards.c
  View file @3023f33
... ... @@ -172,7 +172,7 @@ static void ref405ep_fpga_init (uint32_t base)
172 172 }
173 173  
174 174 static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size,
175   - const char *boot_device, DisplayState *ds,
  175 + const char *boot_device,
176 176 const char *kernel_filename,
177 177 const char *kernel_cmdline,
178 178 const char *initrd_filename,
... ... @@ -496,7 +496,7 @@ static void taihu_cpld_init (uint32_t base)
496 496 }
497 497  
498 498 static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size,
499   - const char *boot_device, DisplayState *ds,
  499 + const char *boot_device,
500 500 const char *kernel_filename,
501 501 const char *kernel_cmdline,
502 502 const char *initrd_filename,
... ...
hw/ppc_chrp.c
  View file @3023f33
... ... @@ -59,7 +59,7 @@ static CPUReadMemoryFunc *unin_read[] = {
59 59  
60 60 /* PowerPC Mac99 hardware initialisation */
61 61 static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
62   - const char *boot_device, DisplayState *ds,
  62 + const char *boot_device,
63 63 const char *kernel_filename,
64 64 const char *kernel_cmdline,
65 65 const char *initrd_filename,
... ... @@ -256,7 +256,7 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
256 256 pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
257 257 pci_bus = pci_pmac_init(pic);
258 258 /* init basic PC hardware */
259   - pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
  259 + pci_vga_init(pci_bus, phys_ram_base + ram_size,
260 260 ram_size, vga_ram_size,
261 261 vga_bios_offset, vga_bios_size);
262 262  
... ...
hw/ppc_oldworld.c
  View file @3023f33
... ... @@ -108,7 +108,7 @@ static int vga_osi_call (CPUState *env)
108 108 }
109 109  
110 110 static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
111   - const char *boot_device, DisplayState *ds,
  111 + const char *boot_device,
112 112 const char *kernel_filename,
113 113 const char *kernel_cmdline,
114 114 const char *initrd_filename,
... ... @@ -297,7 +297,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
297 297 }
298 298 pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
299 299 pci_bus = pci_grackle_init(0xfec00000, pic);
300   - pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,
  300 + pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
301 301 vga_ram_offset, vga_ram_size,
302 302 vga_bios_offset, vga_bios_size);
303 303  
... ...
hw/ppc_prep.c
  View file @3023f33
... ... @@ -531,7 +531,7 @@ static CPUReadMemoryFunc *PPC_prep_io_read[] = {
531 531  
532 532 /* PowerPC PREP hardware initialisation */
533 533 static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
534   - const char *boot_device, DisplayState *ds,
  534 + const char *boot_device,
535 535 const char *kernel_filename,
536 536 const char *kernel_cmdline,
537 537 const char *initrd_filename,
... ... @@ -655,7 +655,7 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
655 655 cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
656 656  
657 657 /* init basic PC hardware */
658   - pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, ram_size,
  658 + pci_vga_init(pci_bus, phys_ram_base + ram_size, ram_size,
659 659 vga_ram_size, 0, 0);
660 660 // openpic = openpic_init(0x00000000, 0xF0000000, 1);
661 661 // pit = pit_init(0x40, i8259[0]);
... ...
hw/primecell.h
  View file @3023f33
... ... @@ -9,7 +9,7 @@
9 9 void pl031_init(uint32_t base, qemu_irq irq);
10 10  
11 11 /* pl110.c */
12   -void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq, int);
  12 +void *pl110_init(uint32_t base, qemu_irq irq, int);
13 13  
14 14 /* pl011.c */
15 15 enum pl011_type {
... ...
hw/pxa.h
  View file @3023f33
... ... @@ -89,7 +89,7 @@ void pxa2xx_dma_request(struct pxa2xx_dma_state_s *s, int req_num, int on);
89 89 /* pxa2xx_lcd.c */
90 90 struct pxa2xx_lcdc_s;
91 91 struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base,
92   - qemu_irq irq, DisplayState *ds);
  92 + qemu_irq irq);
93 93 void pxa2xx_lcd_vsync_notifier(struct pxa2xx_lcdc_s *s, qemu_irq handler);
94 94 void pxa2xx_lcdc_oritentation(void *opaque, int angle);
95 95  
... ... @@ -215,9 +215,8 @@ struct pxa2xx_i2s_s {
215 215 # define PA_FMT "0x%08lx"
216 216 # define REG_FMT "0x" TARGET_FMT_plx
217 217  
218   -struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, DisplayState *ds,
219   - const char *revision);
220   -struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, DisplayState *ds);
  218 +struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, const char *revision);
  219 +struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size);
221 220  
222 221 /* usb-ohci.c */
223 222 void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
... ...
hw/pxa2xx.c
  View file @3023f33
... ... @@ -2010,8 +2010,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
2010 2010 }
2011 2011  
2012 2012 /* Initialise a PXA270 integrated chip (ARM based core). */
2013   -struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
2014   - DisplayState *ds, const char *revision)
  2013 +struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, const char *revision)
2015 2014 {
2016 2015 struct pxa2xx_state_s *s;
2017 2016 struct pxa2xx_ssp_s *ssp;
... ... @@ -2067,8 +2066,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
2067 2066 s->fir = pxa2xx_fir_init(0x40800000, s->pic[PXA2XX_PIC_ICP],
2068 2067 s->dma, serial_hds[i]);
2069 2068  
2070   - if (ds)
2071   - s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD], ds);
  2069 + s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD]);
2072 2070  
2073 2071 s->cm_base = 0x41300000;
2074 2072 s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
... ... @@ -2141,8 +2139,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
2141 2139 }
2142 2140  
2143 2141 /* Initialise a PXA255 integrated chip (ARM based core). */
2144   -struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
2145   - DisplayState *ds)
  2142 +struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size)
2146 2143 {
2147 2144 struct pxa2xx_state_s *s;
2148 2145 struct pxa2xx_ssp_s *ssp;
... ... @@ -2191,8 +2188,7 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
2191 2188 s->fir = pxa2xx_fir_init(0x40800000, s->pic[PXA2XX_PIC_ICP],
2192 2189 s->dma, serial_hds[i]);
2193 2190  
2194   - if (ds)
2195   - s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD], ds);
  2191 + s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD]);
2196 2192  
2197 2193 s->cm_base = 0x41300000;
2198 2194 s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
... ...
hw/pxa2xx_lcd.c
  View file @3023f33
... ... @@ -22,7 +22,6 @@ struct pxa2xx_lcdc_s {
22 22  
23 23 int invalidated;
24 24 DisplayState *ds;
25   - QEMUConsole *console;
26 25 drawfn *line_fn[2];
27 26 int dest_width;
28 27 int xres, yres;
... ... @@ -792,9 +791,9 @@ static void pxa2xx_lcdc_resize(struct pxa2xx_lcdc_s *s)
792 791  
793 792 if (width != s->xres || height != s->yres) {
794 793 if (s->orientation)
795   - qemu_console_resize(s->console, height, width);
  794 + qemu_console_resize(s->ds, height, width);
796 795 else
797   - qemu_console_resize(s->console, width, height);
  796 + qemu_console_resize(s->ds, width, height);
798 797 s->invalidated = 1;
799 798 s->xres = width;
800 799 s->yres = height;
... ... @@ -981,8 +980,7 @@ static int pxa2xx_lcdc_load(QEMUFile *f, void *opaque, int version_id)
981 980 #define BITS 32
982 981 #include "pxa2xx_template.h"
983 982  
984   -struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
985   - DisplayState *ds)
  983 +struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq)
986 984 {
987 985 int iomemtype;
988 986 struct pxa2xx_lcdc_s *s;
... ... @@ -990,7 +988,6 @@ struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
990 988 s = (struct pxa2xx_lcdc_s *) qemu_mallocz(sizeof(struct pxa2xx_lcdc_s));
991 989 s->invalidated = 1;
992 990 s->irq = irq;
993   - s->ds = ds;
994 991  
995 992 pxa2xx_lcdc_orientation(s, graphic_rotate);
996 993  
... ... @@ -998,9 +995,9 @@ struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
998 995 pxa2xx_lcdc_writefn, s);
999 996 cpu_register_physical_memory(base, 0x00100000, iomemtype);
1000 997  
1001   - s->console = graphic_console_init(ds, pxa2xx_update_display,
1002   - pxa2xx_invalidate_display,
1003   - pxa2xx_screen_dump, NULL, s);
  998 + s->ds = graphic_console_init(pxa2xx_update_display,
  999 + pxa2xx_invalidate_display,
  1000 + pxa2xx_screen_dump, NULL, s);
1004 1001  
1005 1002 switch (ds_get_bits_per_pixel(s->ds)) {
1006 1003 case 0:
... ...
hw/r2d.c
  View file @3023f33
... ... @@ -193,7 +193,7 @@ static int r2d_pci_map_irq(PCIDevice *d, int irq_num)
193 193 }
194 194  
195 195 static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
196   - const char *boot_device, DisplayState * ds,
  196 + const char *boot_device,
197 197 const char *kernel_filename, const char *kernel_cmdline,
198 198 const char *initrd_filename, const char *cpu_model)
199 199 {
... ... @@ -222,7 +222,7 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
222 222 pci = sh_pci_register_bus(r2d_pci_set_irq, r2d_pci_map_irq, irq, 0, 4);
223 223  
224 224 sm501_vga_ram_addr = qemu_ram_alloc(SM501_VRAM_SIZE);
225   - sm501_init(ds, 0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE,
  225 + sm501_init(0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE,
226 226 serial_hds[2]);
227 227  
228 228 /* onboard CF (True IDE mode, Master only). */
... ...
hw/realview.c
  View file @3023f33
... ... @@ -24,7 +24,7 @@ static struct arm_boot_info realview_binfo = {
24 24 };
25 25  
26 26 static void realview_init(ram_addr_t ram_size, int vga_ram_size,
27   - const char *boot_device, DisplayState *ds,
  27 + const char *boot_device,
28 28 const char *kernel_filename, const char *kernel_cmdline,
29 29 const char *initrd_filename, const char *cpu_model)
30 30 {
... ... @@ -93,7 +93,7 @@ static void realview_init(ram_addr_t ram_size, int vga_ram_size,
93 93 sp804_init(0x10011000, pic[4]);
94 94 sp804_init(0x10012000, pic[5]);
95 95  
96   - pl110_init(ds, 0x10020000, pic[23], 1);
  96 + pl110_init(0x10020000, pic[23], 1);
97 97  
98 98 index = drive_get_index(IF_SD, 0, 0);
99 99 if (index == -1) {
... ...
hw/shix.c
  View file @3023f33
... ... @@ -61,7 +61,7 @@ void vga_screen_dump(const char *filename)
61 61 }
62 62  
63 63 static void shix_init(ram_addr_t ram_size, int vga_ram_size,
64   - const char *boot_device, DisplayState * ds,
  64 + const char *boot_device,
65 65 const char *kernel_filename, const char *kernel_cmdline,
66 66 const char *initrd_filename, const char *cpu_model)
67 67 {
... ...
hw/sm501.c
  View file @3023f33
... ... @@ -450,7 +450,6 @@ static const uint32_t sm501_mem_local_size[] = {
450 450 typedef struct SM501State {
451 451 /* graphic console status */
452 452 DisplayState *ds;
453   - QEMUConsole *console;
454 453  
455 454 /* status & internal resources */
456 455 target_phys_addr_t base;
... ... @@ -994,7 +993,7 @@ static void sm501_draw_crt(SM501State * s)
994 993  
995 994 /* adjust console size */
996 995 if (s->last_width != width || s->last_height != height) {
997   - qemu_console_resize(s->console, width, height);
  996 + qemu_console_resize(s->ds, width, height);
998 997 s->last_width = width;
999 998 s->last_height = height;
1000 999 full_update = 1;
... ... @@ -1051,7 +1050,7 @@ static void sm501_update_display(void *opaque)
1051 1050 sm501_draw_crt(s);
1052 1051 }
1053 1052  
1054   -void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
  1053 +void sm501_init(uint32_t base, unsigned long local_mem_base,
1055 1054 uint32_t local_mem_bytes, CharDriverState *chr)
1056 1055 {
1057 1056 SM501State * s;
... ... @@ -1069,7 +1068,6 @@ void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
1069 1068 s->misc_control = 0x00001000; /* assumes SH, active=low */
1070 1069 s->dc_panel_control = 0x00010000;
1071 1070 s->dc_crt_control = 0x00010000;
1072   - s->ds = ds;
1073 1071  
1074 1072 /* allocate local memory */
1075 1073 s->local_mem = (uint8 *)phys_ram_base + local_mem_base;
... ... @@ -1093,6 +1091,6 @@ void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
1093 1091 115200, chr, 1);
1094 1092  
1095 1093 /* create qemu graphic console */
1096   - s->console = graphic_console_init(s->ds, sm501_update_display, NULL,
1097   - NULL, NULL, s);
  1094 + s->ds = graphic_console_init(sm501_update_display, NULL,
  1095 + NULL, NULL, s);
1098 1096 }
... ...
hw/spitz.c
  View file @3023f33
... ... @@ -908,7 +908,7 @@ static struct arm_boot_info spitz_binfo = {
908 908 };
909 909  
910 910 static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
911   - DisplayState *ds, const char *kernel_filename,
  911 + const char *kernel_filename,
912 912 const char *kernel_cmdline, const char *initrd_filename,
913 913 const char *cpu_model, enum spitz_model_e model, int arm_id)
914 914 {
... ... @@ -924,7 +924,7 @@ static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
924 924 SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE);
925 925 exit(1);
926 926 }
927   - cpu = pxa270_init(spitz_binfo.ram_size, ds, cpu_model);
  927 + cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
928 928  
929 929 sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
930 930  
... ... @@ -969,38 +969,38 @@ static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
969 969 }
970 970  
971 971 static void spitz_init(ram_addr_t ram_size, int vga_ram_size,
972   - const char *boot_device, DisplayState *ds,
  972 + const char *boot_device,
973 973 const char *kernel_filename, const char *kernel_cmdline,
974 974 const char *initrd_filename, const char *cpu_model)
975 975 {
976   - spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
  976 + spitz_common_init(ram_size, vga_ram_size, kernel_filename,
977 977 kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
978 978 }
979 979  
980 980 static void borzoi_init(ram_addr_t ram_size, int vga_ram_size,
981   - const char *boot_device, DisplayState *ds,
  981 + const char *boot_device,
982 982 const char *kernel_filename, const char *kernel_cmdline,
983 983 const char *initrd_filename, const char *cpu_model)
984 984 {
985   - spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
  985 + spitz_common_init(ram_size, vga_ram_size, kernel_filename,
986 986 kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
987 987 }
988 988  
989 989 static void akita_init(ram_addr_t ram_size, int vga_ram_size,
990   - const char *boot_device, DisplayState *ds,
  990 + const char *boot_device,
991 991 const char *kernel_filename, const char *kernel_cmdline,
992 992 const char *initrd_filename, const char *cpu_model)
993 993 {
994   - spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
  994 + spitz_common_init(ram_size, vga_ram_size, kernel_filename,
995 995 kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
996 996 }
997 997  
998 998 static void terrier_init(ram_addr_t ram_size, int vga_ram_size,
999   - const char *boot_device, DisplayState *ds,
  999 + const char *boot_device,
1000 1000 const char *kernel_filename, const char *kernel_cmdline,
1001 1001 const char *initrd_filename, const char *cpu_model)
1002 1002 {
1003   - spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
  1003 + spitz_common_init(ram_size, vga_ram_size, kernel_filename,
1004 1004 kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
1005 1005 }
1006 1006  
... ...
hw/ssd0303.c
  View file @3023f33
... ... @@ -45,7 +45,6 @@ enum ssd0303_cmd {
45 45 typedef struct {
46 46 i2c_slave i2c;
47 47 DisplayState *ds;
48   - QEMUConsole *console;
49 48 int row;
50 49 int col;
51 50 int start_line;
... ... @@ -306,18 +305,17 @@ static int ssd0303_load(QEMUFile *f, void *opaque, int version_id)
306 305 return 0;
307 306 }
308 307  
309   -void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address)
  308 +void ssd0303_init(i2c_bus *bus, int address)
310 309 {
311 310 ssd0303_state *s;
312 311  
313 312 s = (ssd0303_state *)i2c_slave_init(bus, address, sizeof(ssd0303_state));
314   - s->ds = ds;
315 313 s->i2c.event = ssd0303_event;
316 314 s->i2c.recv = ssd0303_recv;
317 315 s->i2c.send = ssd0303_send;
318   - s->console = graphic_console_init(ds, ssd0303_update_display,
319   - ssd0303_invalidate_display,
320   - NULL, NULL, s);
321   - qemu_console_resize(s->console, 96 * MAGNIFY, 16 * MAGNIFY);
  316 + s->ds = graphic_console_init(ssd0303_update_display,
  317 + ssd0303_invalidate_display,
  318 + NULL, NULL, s);
  319 + qemu_console_resize(s->ds, 96 * MAGNIFY, 16 * MAGNIFY);
322 320 register_savevm("ssd0303_oled", -1, 1, ssd0303_save, ssd0303_load, s);
323 321 }
... ...
hw/ssd0323.c
  View file @3023f33
... ... @@ -44,7 +44,6 @@ enum ssd0323_mode
44 44  
45 45 typedef struct {
46 46 DisplayState *ds;
47   - QEMUConsole *console;
48 47  
49 48 int cmd_len;
50 49 int cmd;
... ... @@ -322,7 +321,7 @@ static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
322 321 return 0;
323 322 }
324 323  
325   -void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p)
  324 +void *ssd0323_init(qemu_irq *cmd_p)
326 325 {
327 326 ssd0323_state *s;
328 327 qemu_irq *cmd;
... ... @@ -330,11 +329,10 @@ void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p)
330 329 s = (ssd0323_state *)qemu_mallocz(sizeof(ssd0323_state));
331 330 s->col_end = 63;
332 331 s->row_end = 79;
333   - s->ds = ds;
334   - s->console = graphic_console_init(ds, ssd0323_update_display,
335   - ssd0323_invalidate_display,
336   - NULL, NULL, s);
337   - qemu_console_resize(s->console, 128 * MAGNIFY, 64 * MAGNIFY);
  332 + s->ds = graphic_console_init(ssd0323_update_display,
  333 + ssd0323_invalidate_display,
  334 + NULL, NULL, s);
  335 + qemu_console_resize(s->ds, 128 * MAGNIFY, 64 * MAGNIFY);
338 336  
339 337 cmd = qemu_allocate_irqs(ssd0323_cd, s, 1);
340 338 *cmd_p = *cmd;
... ...
hw/stellaris.c
  View file @3023f33
... ... @@ -1282,7 +1282,7 @@ static stellaris_board_info stellaris_boards[] = {
1282 1282 };
1283 1283  
1284 1284 static void stellaris_init(const char *kernel_filename, const char *cpu_model,
1285   - DisplayState *ds, stellaris_board_info *board)
  1285 + stellaris_board_info *board)
1286 1286 {
1287 1287 static const int uart_irq[] = {5, 6, 33, 34};
1288 1288 static const int timer_irq[] = {19, 21, 23, 35};
... ... @@ -1329,7 +1329,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
1329 1329 i2c = i2c_init_bus();
1330 1330 stellaris_i2c_init(0x40020000, pic[8], i2c);
1331 1331 if (board->peripherals & BP_OLED_I2C) {
1332   - ssd0303_init(ds, i2c, 0x3d);
  1332 + ssd0303_init(i2c, 0x3d);
1333 1333 }
1334 1334 }
1335 1335  
... ... @@ -1346,7 +1346,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
1346 1346 void *ssi_bus;
1347 1347 int index;
1348 1348  
1349   - oled = ssd0323_init(ds, &gpio_out[GPIO_C][7]);
  1349 + oled = ssd0323_init(&gpio_out[GPIO_C][7]);
1350 1350 index = drive_get_index(IF_SD, 0, 0);
1351 1351 sd = ssi_sd_init(drives_table[index].bdrv);
1352 1352  
... ... @@ -1379,19 +1379,19 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
1379 1379  
1380 1380 /* FIXME: Figure out how to generate these from stellaris_boards. */
1381 1381 static void lm3s811evb_init(ram_addr_t ram_size, int vga_ram_size,
1382   - const char *boot_device, DisplayState *ds,
  1382 + const char *boot_device,
1383 1383 const char *kernel_filename, const char *kernel_cmdline,
1384 1384 const char *initrd_filename, const char *cpu_model)
1385 1385 {
1386   - stellaris_init(kernel_filename, cpu_model, ds, &stellaris_boards[0]);
  1386 + stellaris_init(kernel_filename, cpu_model, &stellaris_boards[0]);
1387 1387 }
1388 1388  
1389 1389 static void lm3s6965evb_init(ram_addr_t ram_size, int vga_ram_size,
1390   - const char *boot_device, DisplayState *ds,
  1390 + const char *boot_device,
1391 1391 const char *kernel_filename, const char *kernel_cmdline,
1392 1392 const char *initrd_filename, const char *cpu_model)
1393 1393 {
1394   - stellaris_init(kernel_filename, cpu_model, ds, &stellaris_boards[1]);
  1394 + stellaris_init(kernel_filename, cpu_model, &stellaris_boards[1]);
1395 1395 }
1396 1396  
1397 1397 QEMUMachine lm3s811evb_machine = {
... ...
hw/sun4m.c
  View file @3023f33
... ... @@ -423,7 +423,7 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
423 423  
424 424 static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
425 425 const char *boot_device,
426   - DisplayState *ds, const char *kernel_filename,
  426 + const char *kernel_filename,
427 427 const char *kernel_cmdline,
428 428 const char *initrd_filename, const char *cpu_model)
429 429  
... ... @@ -533,7 +533,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
533 533 exit (1);
534 534 }
535 535 tcx_offset = qemu_ram_alloc(hwdef->vram_size);
536   - tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
  536 + tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
537 537 hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
538 538  
539 539 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
... ... @@ -978,92 +978,92 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
978 978  
979 979 /* SPARCstation 5 hardware initialisation */
980 980 static void ss5_init(ram_addr_t RAM_size, int vga_ram_size,
981   - const char *boot_device, DisplayState *ds,
  981 + const char *boot_device,
982 982 const char *kernel_filename, const char *kernel_cmdline,
983 983 const char *initrd_filename, const char *cpu_model)
984 984 {
985   - sun4m_hw_init(&sun4m_hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
  985 + sun4m_hw_init(&sun4m_hwdefs[0], RAM_size, boot_device, kernel_filename,
986 986 kernel_cmdline, initrd_filename, cpu_model);
987 987 }
988 988  
989 989 /* SPARCstation 10 hardware initialisation */
990 990 static void ss10_init(ram_addr_t RAM_size, int vga_ram_size,
991   - const char *boot_device, DisplayState *ds,
  991 + const char *boot_device,
992 992 const char *kernel_filename, const char *kernel_cmdline,
993 993 const char *initrd_filename, const char *cpu_model)
994 994 {
995   - sun4m_hw_init(&sun4m_hwdefs[1], RAM_size, boot_device, ds, kernel_filename,
  995 + sun4m_hw_init(&sun4m_hwdefs[1], RAM_size, boot_device, kernel_filename,
996 996 kernel_cmdline, initrd_filename, cpu_model);
997 997 }
998 998  
999 999 /* SPARCserver 600MP hardware initialisation */
1000 1000 static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size,
1001   - const char *boot_device, DisplayState *ds,
  1001 + const char *boot_device,
1002 1002 const char *kernel_filename,
1003 1003 const char *kernel_cmdline,
1004 1004 const char *initrd_filename, const char *cpu_model)
1005 1005 {
1006   - sun4m_hw_init(&sun4m_hwdefs[2], RAM_size, boot_device, ds, kernel_filename,
  1006 + sun4m_hw_init(&sun4m_hwdefs[2], RAM_size, boot_device, kernel_filename,
1007 1007 kernel_cmdline, initrd_filename, cpu_model);
1008 1008 }
1009 1009  
1010 1010 /* SPARCstation 20 hardware initialisation */
1011 1011 static void ss20_init(ram_addr_t RAM_size, int vga_ram_size,
1012   - const char *boot_device, DisplayState *ds,
  1012 + const char *boot_device,
1013 1013 const char *kernel_filename, const char *kernel_cmdline,
1014 1014 const char *initrd_filename, const char *cpu_model)
1015 1015 {
1016   - sun4m_hw_init(&sun4m_hwdefs[3], RAM_size, boot_device, ds, kernel_filename,
  1016 + sun4m_hw_init(&sun4m_hwdefs[3], RAM_size, boot_device, kernel_filename,
1017 1017 kernel_cmdline, initrd_filename, cpu_model);
1018 1018 }
1019 1019  
1020 1020 /* SPARCstation Voyager hardware initialisation */
1021 1021 static void vger_init(ram_addr_t RAM_size, int vga_ram_size,
1022   - const char *boot_device, DisplayState *ds,
  1022 + const char *boot_device,
1023 1023 const char *kernel_filename, const char *kernel_cmdline,
1024 1024 const char *initrd_filename, const char *cpu_model)
1025 1025 {
1026   - sun4m_hw_init(&sun4m_hwdefs[4], RAM_size, boot_device, ds, kernel_filename,
  1026 + sun4m_hw_init(&sun4m_hwdefs[4], RAM_size, boot_device, kernel_filename,
1027 1027 kernel_cmdline, initrd_filename, cpu_model);
1028 1028 }
1029 1029  
1030 1030 /* SPARCstation LX hardware initialisation */
1031 1031 static void ss_lx_init(ram_addr_t RAM_size, int vga_ram_size,
1032   - const char *boot_device, DisplayState *ds,
  1032 + const char *boot_device,
1033 1033 const char *kernel_filename, const char *kernel_cmdline,
1034 1034 const char *initrd_filename, const char *cpu_model)
1035 1035 {
1036   - sun4m_hw_init(&sun4m_hwdefs[5], RAM_size, boot_device, ds, kernel_filename,
  1036 + sun4m_hw_init(&sun4m_hwdefs[5], RAM_size, boot_device, kernel_filename,
1037 1037 kernel_cmdline, initrd_filename, cpu_model);
1038 1038 }
1039 1039  
1040 1040 /* SPARCstation 4 hardware initialisation */
1041 1041 static void ss4_init(ram_addr_t RAM_size, int vga_ram_size,
1042   - const char *boot_device, DisplayState *ds,
  1042 + const char *boot_device,
1043 1043 const char *kernel_filename, const char *kernel_cmdline,
1044 1044 const char *initrd_filename, const char *cpu_model)
1045 1045 {
1046   - sun4m_hw_init(&sun4m_hwdefs[6], RAM_size, boot_device, ds, kernel_filename,
  1046 + sun4m_hw_init(&sun4m_hwdefs[6], RAM_size, boot_device, kernel_filename,
1047 1047 kernel_cmdline, initrd_filename, cpu_model);
1048 1048 }
1049 1049  
1050 1050 /* SPARCClassic hardware initialisation */
1051 1051 static void scls_init(ram_addr_t RAM_size, int vga_ram_size,
1052   - const char *boot_device, DisplayState *ds,
  1052 + const char *boot_device,
1053 1053 const char *kernel_filename, const char *kernel_cmdline,
1054 1054 const char *initrd_filename, const char *cpu_model)
1055 1055 {
1056   - sun4m_hw_init(&sun4m_hwdefs[7], RAM_size, boot_device, ds, kernel_filename,
  1056 + sun4m_hw_init(&sun4m_hwdefs[7], RAM_size, boot_device, kernel_filename,
1057 1057 kernel_cmdline, initrd_filename, cpu_model);
1058 1058 }
1059 1059  
1060 1060 /* SPARCbook hardware initialisation */
1061 1061 static void sbook_init(ram_addr_t RAM_size, int vga_ram_size,
1062   - const char *boot_device, DisplayState *ds,
  1062 + const char *boot_device,
1063 1063 const char *kernel_filename, const char *kernel_cmdline,
1064 1064 const char *initrd_filename, const char *cpu_model)
1065 1065 {
1066   - sun4m_hw_init(&sun4m_hwdefs[8], RAM_size, boot_device, ds, kernel_filename,
  1066 + sun4m_hw_init(&sun4m_hwdefs[8], RAM_size, boot_device, kernel_filename,
1067 1067 kernel_cmdline, initrd_filename, cpu_model);
1068 1068 }
1069 1069  
... ... @@ -1224,7 +1224,7 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = {
1224 1224  
1225 1225 static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
1226 1226 const char *boot_device,
1227   - DisplayState *ds, const char *kernel_filename,
  1227 + const char *kernel_filename,
1228 1228 const char *kernel_cmdline,
1229 1229 const char *initrd_filename, const char *cpu_model)
1230 1230 {
... ... @@ -1316,7 +1316,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
1316 1316 exit (1);
1317 1317 }
1318 1318 tcx_offset = qemu_ram_alloc(hwdef->vram_size);
1319   - tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
  1319 + tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
1320 1320 hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
1321 1321  
1322 1322 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
... ... @@ -1366,21 +1366,21 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
1366 1366  
1367 1367 /* SPARCserver 1000 hardware initialisation */
1368 1368 static void ss1000_init(ram_addr_t RAM_size, int vga_ram_size,
1369   - const char *boot_device, DisplayState *ds,
  1369 + const char *boot_device,
1370 1370 const char *kernel_filename, const char *kernel_cmdline,
1371 1371 const char *initrd_filename, const char *cpu_model)
1372 1372 {
1373   - sun4d_hw_init(&sun4d_hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
  1373 + sun4d_hw_init(&sun4d_hwdefs[0], RAM_size, boot_device, kernel_filename,
1374 1374 kernel_cmdline, initrd_filename, cpu_model);
1375 1375 }
1376 1376  
1377 1377 /* SPARCcenter 2000 hardware initialisation */
1378 1378 static void ss2000_init(ram_addr_t RAM_size, int vga_ram_size,
1379   - const char *boot_device, DisplayState *ds,
  1379 + const char *boot_device,
1380 1380 const char *kernel_filename, const char *kernel_cmdline,
1381 1381 const char *initrd_filename, const char *cpu_model)
1382 1382 {
1383   - sun4d_hw_init(&sun4d_hwdefs[1], RAM_size, boot_device, ds, kernel_filename,
  1383 + sun4d_hw_init(&sun4d_hwdefs[1], RAM_size, boot_device, kernel_filename,
1384 1384 kernel_cmdline, initrd_filename, cpu_model);
1385 1385 }
1386 1386  
... ... @@ -1439,7 +1439,7 @@ static const struct sun4c_hwdef sun4c_hwdefs[] = {
1439 1439  
1440 1440 static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
1441 1441 const char *boot_device,
1442   - DisplayState *ds, const char *kernel_filename,
  1442 + const char *kernel_filename,
1443 1443 const char *kernel_cmdline,
1444 1444 const char *initrd_filename, const char *cpu_model)
1445 1445 {
... ... @@ -1522,7 +1522,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
1522 1522 exit (1);
1523 1523 }
1524 1524 tcx_offset = qemu_ram_alloc(hwdef->vram_size);
1525   - tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
  1525 + tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
1526 1526 hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
1527 1527  
1528 1528 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
... ... @@ -1584,11 +1584,11 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
1584 1584  
1585 1585 /* SPARCstation 2 hardware initialisation */
1586 1586 static void ss2_init(ram_addr_t RAM_size, int vga_ram_size,
1587   - const char *boot_device, DisplayState *ds,
  1587 + const char *boot_device,
1588 1588 const char *kernel_filename, const char *kernel_cmdline,
1589 1589 const char *initrd_filename, const char *cpu_model)
1590 1590 {
1591   - sun4c_hw_init(&sun4c_hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
  1591 + sun4c_hw_init(&sun4c_hwdefs[0], RAM_size, boot_device, kernel_filename,
1592 1592 kernel_cmdline, initrd_filename, cpu_model);
1593 1593 }
1594 1594  
... ...
hw/sun4m.h
  View file @3023f33
... ... @@ -22,7 +22,7 @@ static inline void sparc_iommu_memory_write(void *opaque,
22 22 }
23 23  
24 24 /* tcx.c */
25   -void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
  25 +void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
26 26 unsigned long vram_offset, int vram_size, int width, int height,
27 27 int depth);
28 28  
... ...
hw/sun4u.c
  View file @3023f33
... ... @@ -387,7 +387,7 @@ pci_ebus_init(PCIBus *bus, int devfn)
387 387 }
388 388  
389 389 static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
390   - const char *boot_devices, DisplayState *ds,
  390 + const char *boot_devices,
391 391 const char *kernel_filename, const char *kernel_cmdline,
392 392 const char *initrd_filename, const char *cpu_model,
393 393 const struct hwdef *hwdef)
... ... @@ -508,7 +508,7 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
508 508 &pci_bus3);
509 509 isa_mem_base = VGA_BASE;
510 510 vga_ram_offset = qemu_ram_alloc(vga_ram_size);
511   - pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,
  511 + pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
512 512 vga_ram_offset, vga_ram_size,
513 513 0, 0);
514 514  
... ... @@ -612,31 +612,31 @@ static const struct hwdef hwdefs[] = {
612 612  
613 613 /* Sun4u hardware initialisation */
614 614 static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
615   - const char *boot_devices, DisplayState *ds,
  615 + const char *boot_devices,
616 616 const char *kernel_filename, const char *kernel_cmdline,
617 617 const char *initrd_filename, const char *cpu_model)
618 618 {
619   - sun4uv_init(RAM_size, vga_ram_size, boot_devices, ds, kernel_filename,
  619 + sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
620 620 kernel_cmdline, initrd_filename, cpu_model, &hwdefs[0]);
621 621 }
622 622  
623 623 /* Sun4v hardware initialisation */
624 624 static void sun4v_init(ram_addr_t RAM_size, int vga_ram_size,
625   - const char *boot_devices, DisplayState *ds,
  625 + const char *boot_devices,
626 626 const char *kernel_filename, const char *kernel_cmdline,
627 627 const char *initrd_filename, const char *cpu_model)
628 628 {
629   - sun4uv_init(RAM_size, vga_ram_size, boot_devices, ds, kernel_filename,
  629 + sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
630 630 kernel_cmdline, initrd_filename, cpu_model, &hwdefs[1]);
631 631 }
632 632  
633 633 /* Niagara hardware initialisation */
634 634 static void niagara_init(ram_addr_t RAM_size, int vga_ram_size,
635   - const char *boot_devices, DisplayState *ds,
  635 + const char *boot_devices,
636 636 const char *kernel_filename, const char *kernel_cmdline,
637 637 const char *initrd_filename, const char *cpu_model)
638 638 {
639   - sun4uv_init(RAM_size, vga_ram_size, boot_devices, ds, kernel_filename,
  639 + sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
640 640 kernel_cmdline, initrd_filename, cpu_model, &hwdefs[2]);
641 641 }
642 642  
... ...
hw/tc6393xb.c
  View file @3023f33
... ... @@ -122,7 +122,6 @@ struct tc6393xb_s {
122 122 struct ecc_state_s ecc;
123 123  
124 124 DisplayState *ds;
125   - QEMUConsole *console;
126 125 ram_addr_t vram_addr;
127 126 uint32_t scr_width, scr_height; /* in pixels */
128 127 qemu_irq l3v;
... ... @@ -485,7 +484,7 @@ static void tc6393xb_update_display(void *opaque)
485 484 full_update = 1;
486 485 }
487 486 if (s->scr_width != ds_get_width(s->ds) || s->scr_height != ds_get_height(s->ds)) {
488   - qemu_console_resize(s->console, s->scr_width, s->scr_height);
  487 + qemu_console_resize(s->ds, s->scr_width, s->scr_height);
489 488 full_update = 1;
490 489 }
491 490 if (s->blanked)
... ... @@ -563,7 +562,7 @@ static void tc6393xb_writel(void *opaque, target_phys_addr_t addr, uint32_t valu
563 562 tc6393xb_writeb(opaque, addr + 3, value >> 24);
564 563 }
565 564  
566   -struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds)
  565 +struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq)
567 566 {
568 567 int iomemtype;
569 568 struct tc6393xb_s *s;
... ... @@ -593,19 +592,15 @@ struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds)
593 592 tc6393xb_writefn, s);
594 593 cpu_register_physical_memory(base, 0x10000, iomemtype);
595 594  
596   - if (ds) {
597   - s->ds = ds;
598   - s->vram_addr = qemu_ram_alloc(0x100000);
599   - cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
600   - s->scr_width = 480;
601   - s->scr_height = 640;
602   - s->console = graphic_console_init(ds,
603   - tc6393xb_update_display,
604   - NULL, /* invalidate */
605   - NULL, /* screen_dump */
606   - NULL, /* text_update */
607   - s);
608   - }
  595 + s->vram_addr = qemu_ram_alloc(0x100000);
  596 + cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
  597 + s->scr_width = 480;
  598 + s->scr_height = 640;
  599 + s->ds = graphic_console_init(tc6393xb_update_display,
  600 + NULL, /* invalidate */
  601 + NULL, /* screen_dump */
  602 + NULL, /* text_update */
  603 + s);
609 604  
610 605 return s;
611 606 }
... ...
hw/tcx.c
  View file @3023f33
... ... @@ -36,7 +36,6 @@
36 36 typedef struct TCXState {
37 37 target_phys_addr_t addr;
38 38 DisplayState *ds;
39   - QEMUConsole *console;
40 39 uint8_t *vram;
41 40 uint32_t *vram24, *cplane;
42 41 ram_addr_t vram_offset, vram24_offset, cplane_offset;
... ... @@ -491,7 +490,7 @@ static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
491 490 tcx_dummy_writel,
492 491 };
493 492  
494   -void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
  493 +void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
495 494 unsigned long vram_offset, int vram_size, int width, int height,
496 495 int depth)
497 496 {
... ... @@ -502,7 +501,6 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
502 501 s = qemu_mallocz(sizeof(TCXState));
503 502 if (!s)
504 503 return;
505   - s->ds = ds;
506 504 s->addr = addr;
507 505 s->vram_offset = vram_offset;
508 506 s->width = width;
... ... @@ -538,15 +536,15 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
538 536 s->cplane = (uint32_t *)vram_base;
539 537 s->cplane_offset = vram_offset;
540 538 cpu_register_physical_memory(addr + 0x0a000000ULL, size, vram_offset);
541   - s->console = graphic_console_init(s->ds, tcx24_update_display,
542   - tcx24_invalidate_display,
543   - tcx24_screen_dump, NULL, s);
  539 + s->ds = graphic_console_init(tcx24_update_display,
  540 + tcx24_invalidate_display,
  541 + tcx24_screen_dump, NULL, s);
544 542 } else {
545 543 cpu_register_physical_memory(addr + 0x00300000ULL, TCX_THC_NREGS_8,
546 544 dummy_memory);
547   - s->console = graphic_console_init(s->ds, tcx_update_display,
548   - tcx_invalidate_display,
549   - tcx_screen_dump, NULL, s);
  545 + s->ds = graphic_console_init(tcx_update_display,
  546 + tcx_invalidate_display,
  547 + tcx_screen_dump, NULL, s);
550 548 }
551 549 // NetBSD writes here even with 8-bit display
552 550 cpu_register_physical_memory(addr + 0x00301000ULL, TCX_THC_NREGS_24,
... ... @@ -555,7 +553,7 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
555 553 register_savevm("tcx", addr, 4, tcx_save, tcx_load, s);
556 554 qemu_register_reset(tcx_reset, s);
557 555 tcx_reset(s);
558   - qemu_console_resize(s->console, width, height);
  556 + qemu_console_resize(s->ds, width, height);
559 557 }
560 558  
561 559 static void tcx_screen_dump(void *opaque, const char *filename)
... ...
hw/tosa.c
  View file @3023f33
... ... @@ -197,7 +197,7 @@ static struct arm_boot_info tosa_binfo = {
197 197 };
198 198  
199 199 static void tosa_init(ram_addr_t ram_size, int vga_ram_size,
200   - const char *boot_device, DisplayState *ds,
  200 + const char *boot_device,
201 201 const char *kernel_filename, const char *kernel_cmdline,
202 202 const char *initrd_filename, const char *cpu_model)
203 203 {
... ... @@ -214,14 +214,13 @@ static void tosa_init(ram_addr_t ram_size, int vga_ram_size,
214 214 if (!cpu_model)
215 215 cpu_model = "pxa255";
216 216  
217   - cpu = pxa255_init(tosa_binfo.ram_size, NULL);
  217 + cpu = pxa255_init(tosa_binfo.ram_size);
218 218  
219 219 cpu_register_physical_memory(0, TOSA_ROM,
220 220 qemu_ram_alloc(TOSA_ROM) | IO_MEM_ROM);
221 221  
222 222 tmio = tc6393xb_init(0x10000000,
223   - pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT],
224   - ds);
  223 + pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT]);
225 224  
226 225 scp0 = scoop_init(cpu, 0, 0x08800000);
227 226 scp1 = scoop_init(cpu, 1, 0x14800040);
... ...
hw/versatilepb.c
  View file @3023f33
... ... @@ -156,7 +156,7 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq)
156 156 static struct arm_boot_info versatile_binfo;
157 157  
158 158 static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
159   - const char *boot_device, DisplayState *ds,
  159 + const char *boot_device,
160 160 const char *kernel_filename, const char *kernel_cmdline,
161 161 const char *initrd_filename, const char *cpu_model,
162 162 int board_id)
... ... @@ -228,7 +228,7 @@ static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
228 228  
229 229 /* The versatile/PB actually has a modified Color LCD controller
230 230 that includes hardware cursor support from the PL111. */
231   - pl110_init(ds, 0x10120000, pic[16], 1);
  231 + pl110_init(0x10120000, pic[16], 1);
232 232  
233 233 index = drive_get_index(IF_SD, 0, 0);
234 234 if (index == -1) {
... ... @@ -290,23 +290,23 @@ static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
290 290 }
291 291  
292 292 static void vpb_init(ram_addr_t ram_size, int vga_ram_size,
293   - const char *boot_device, DisplayState *ds,
  293 + const char *boot_device,
294 294 const char *kernel_filename, const char *kernel_cmdline,
295 295 const char *initrd_filename, const char *cpu_model)
296 296 {
297 297 versatile_init(ram_size, vga_ram_size,
298   - boot_device, ds,
  298 + boot_device,
299 299 kernel_filename, kernel_cmdline,
300 300 initrd_filename, cpu_model, 0x183);
301 301 }
302 302  
303 303 static void vab_init(ram_addr_t ram_size, int vga_ram_size,
304   - const char *boot_device, DisplayState *ds,
  304 + const char *boot_device,
305 305 const char *kernel_filename, const char *kernel_cmdline,
306 306 const char *initrd_filename, const char *cpu_model)
307 307 {
308 308 versatile_init(ram_size, vga_ram_size,
309   - boot_device, ds,
  309 + boot_device,
310 310 kernel_filename, kernel_cmdline,
311 311 initrd_filename, cpu_model, 0x25e);
312 312 }
... ...
hw/vga.c
  View file @3023f33
... ... @@ -1307,7 +1307,7 @@ static void vga_draw_text(VGAState *s, int full_update)
1307 1307 cw != s->last_cw || cheight != s->last_ch || s->last_depth) {
1308 1308 s->last_scr_width = width * cw;
1309 1309 s->last_scr_height = height * cheight;
1310   - qemu_console_resize(s->console, s->last_scr_width, s->last_scr_height);
  1310 + qemu_console_resize(s->ds, s->last_scr_width, s->last_scr_height);
1311 1311 s->last_depth = 0;
1312 1312 s->last_width = width;
1313 1313 s->last_height = height;
... ... @@ -1682,10 +1682,10 @@ static void vga_draw_graphic(VGAState *s, int full_update)
1682 1682 s->vram_ptr + (s->start_addr * 4));
1683 1683 dpy_resize(s->ds);
1684 1684 } else {
1685   - qemu_console_resize(s->console, disp_width, height);
  1685 + qemu_console_resize(s->ds, disp_width, height);
1686 1686 }
1687 1687 } else {
1688   - qemu_console_resize(s->console, disp_width, height);
  1688 + qemu_console_resize(s->ds, disp_width, height);
1689 1689 }
1690 1690 s->last_scr_width = disp_width;
1691 1691 s->last_scr_height = height;
... ... @@ -2254,7 +2254,7 @@ static void vga_map(PCIDevice *pci_dev, int region_num,
2254 2254 vga_dirty_log_start(s);
2255 2255 }
2256 2256  
2257   -void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
  2257 +void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
2258 2258 ram_addr_t vga_ram_offset, int vga_ram_size)
2259 2259 {
2260 2260 int i, j, v, b;
... ... @@ -2285,7 +2285,6 @@ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
2285 2285 s->vram_ptr = vga_ram_base;
2286 2286 s->vram_offset = vga_ram_offset;
2287 2287 s->vram_size = vga_ram_size;
2288   - s->ds = ds;
2289 2288 s->get_bpp = vga_get_bpp;
2290 2289 s->get_offsets = vga_get_offsets;
2291 2290 s->get_resolution = vga_get_resolution;
... ... @@ -2434,7 +2433,7 @@ static void vga_mm_init(VGAState *s, target_phys_addr_t vram_base,
2434 2433 qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
2435 2434 }
2436 2435  
2437   -int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
  2436 +int isa_vga_init(uint8_t *vga_ram_base,
2438 2437 unsigned long vga_ram_offset, int vga_ram_size)
2439 2438 {
2440 2439 VGAState *s;
... ... @@ -2443,11 +2442,11 @@ int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
2443 2442 if (!s)
2444 2443 return -1;
2445 2444  
2446   - vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
  2445 + vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
2447 2446 vga_init(s);
2448 2447  
2449   - s->console = graphic_console_init(s->ds, s->update, s->invalidate,
2450   - s->screen_dump, s->text_update, s);
  2448 + s->ds = graphic_console_init(s->update, s->invalidate,
  2449 + s->screen_dump, s->text_update, s);
2451 2450  
2452 2451 #ifdef CONFIG_BOCHS_VBE
2453 2452 /* XXX: use optimized standard vga accesses */
... ... @@ -2457,7 +2456,7 @@ int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
2457 2456 return 0;
2458 2457 }
2459 2458  
2460   -int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
  2459 +int isa_vga_mm_init(uint8_t *vga_ram_base,
2461 2460 unsigned long vga_ram_offset, int vga_ram_size,
2462 2461 target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
2463 2462 int it_shift)
... ... @@ -2468,11 +2467,11 @@ int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
2468 2467 if (!s)
2469 2468 return -1;
2470 2469  
2471   - vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
  2470 + vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
2472 2471 vga_mm_init(s, vram_base, ctrl_base, it_shift);
2473 2472  
2474   - s->console = graphic_console_init(s->ds, s->update, s->invalidate,
2475   - s->screen_dump, s->text_update, s);
  2473 + s->ds = graphic_console_init(s->update, s->invalidate,
  2474 + s->screen_dump, s->text_update, s);
2476 2475  
2477 2476 #ifdef CONFIG_BOCHS_VBE
2478 2477 /* XXX: use optimized standard vga accesses */
... ... @@ -2482,7 +2481,7 @@ int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
2482 2481 return 0;
2483 2482 }
2484 2483  
2485   -int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
  2484 +int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
2486 2485 unsigned long vga_ram_offset, int vga_ram_size,
2487 2486 unsigned long vga_bios_offset, int vga_bios_size)
2488 2487 {
... ... @@ -2497,11 +2496,11 @@ int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
2497 2496 return -1;
2498 2497 s = &d->vga_state;
2499 2498  
2500   - vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
  2499 + vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
2501 2500 vga_init(s);
2502 2501  
2503   - s->console = graphic_console_init(s->ds, s->update, s->invalidate,
2504   - s->screen_dump, s->text_update, s);
  2502 + s->ds = graphic_console_init(s->update, s->invalidate,
  2503 + s->screen_dump, s->text_update, s);
2505 2504  
2506 2505 s->pci_dev = &d->dev;
2507 2506  
... ...
hw/vga_int.h
  View file @3023f33
... ... @@ -145,7 +145,6 @@ typedef void (* vga_update_retrace_info_fn)(struct VGAState *s);
145 145 VGA_STATE_COMMON_BOCHS_VBE \
146 146 /* display refresh support */ \
147 147 DisplayState *ds; \
148   - QEMUConsole *console; \
149 148 uint32_t font_offsets[2]; \
150 149 int graphic_mode; \
151 150 uint8_t shift_control; \
... ... @@ -192,7 +191,7 @@ static inline int c6_to_8(int v)
192 191 return (v << 2) | (b << 1) | b;
193 192 }
194 193  
195   -void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
  194 +void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
196 195 ram_addr_t vga_ram_offset, int vga_ram_size);
197 196 void vga_init(VGAState *s);
198 197 void vga_reset(void *s);
... ...
hw/vmware_vga.c
  View file @3023f33
... ... @@ -57,7 +57,6 @@ struct vmsvga_state_s {
57 57  
58 58 #ifndef EMBED_STDVGA
59 59 DisplayState *ds;
60   - QEMUConsole *console;
61 60 int vram_size;
62 61 ram_addr_t vram_offset;
63 62 #endif
... ... @@ -384,7 +383,7 @@ static inline void vmsvga_copy_rect(struct vmsvga_state_s *s,
384 383  
385 384 # ifdef DIRECT_VRAM
386 385 if (s->ds->dpy_copy)
387   - qemu_console_copy(s->console, x0, y0, x1, y1, w, h);
  386 + qemu_console_copy(s->ds, x0, y0, x1, y1, w, h);
388 387 else
389 388 # endif
390 389 {
... ... @@ -877,7 +876,7 @@ static inline void vmsvga_size(struct vmsvga_state_s *s)
877 876 if (s->new_width != s->width || s->new_height != s->height) {
878 877 s->width = s->new_width;
879 878 s->height = s->new_height;
880   - qemu_console_resize(s->console, s->width, s->height);
  879 + qemu_console_resize(s->ds, s->width, s->height);
881 880 s->invalidated = 1;
882 881 }
883 882 }
... ... @@ -915,7 +914,7 @@ static void vmsvga_reset(struct vmsvga_state_s *s)
915 914 s->width = -1;
916 915 s->height = -1;
917 916 s->svgaid = SVGA_ID;
918   - s->depth = ds_get_bits_per_pixel(s->ds) ? ds_get_bits_per_pixel(s->ds) : 24;
  917 + s->depth = 24;
919 918 s->bypp = (s->depth + 7) >> 3;
920 919 s->cursor.on = 0;
921 920 s->redraw_fifo_first = 0;
... ... @@ -1110,11 +1109,10 @@ static int vmsvga_load(struct vmsvga_state_s *s, QEMUFile *f)
1110 1109 return 0;
1111 1110 }
1112 1111  
1113   -static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
  1112 +static void vmsvga_init(struct vmsvga_state_s *s,
1114 1113 uint8_t *vga_ram_base, unsigned long vga_ram_offset,
1115 1114 int vga_ram_size)
1116 1115 {
1117   - s->ds = ds;
1118 1116 s->vram = vga_ram_base;
1119 1117 s->vram_size = vga_ram_size;
1120 1118 s->vram_offset = vga_ram_offset;
... ... @@ -1125,15 +1123,15 @@ static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
1125 1123 vmsvga_reset(s);
1126 1124  
1127 1125 #ifdef EMBED_STDVGA
1128   - vga_common_init((VGAState *) s, ds,
  1126 + vga_common_init((VGAState *) s,
1129 1127 vga_ram_base, vga_ram_offset, vga_ram_size);
1130 1128 vga_init((VGAState *) s);
1131 1129 #endif
1132 1130  
1133   - s->console = graphic_console_init(ds, vmsvga_update_display,
1134   - vmsvga_invalidate_display,
1135   - vmsvga_screen_dump,
1136   - vmsvga_text_update, s);
  1131 + s->ds = graphic_console_init(vmsvga_update_display,
  1132 + vmsvga_invalidate_display,
  1133 + vmsvga_screen_dump,
  1134 + vmsvga_text_update, s);
1137 1135  
1138 1136 #ifdef CONFIG_BOCHS_VBE
1139 1137 /* XXX: use optimized standard vga accesses */
... ... @@ -1213,7 +1211,7 @@ static void pci_vmsvga_map_mem(PCIDevice *pci_dev, int region_num,
1213 1211 #define PCI_CLASS_SUB_VGA 0x00
1214 1212 #define PCI_CLASS_HEADERTYPE_00h 0x00
1215 1213  
1216   -void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
  1214 +void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
1217 1215 unsigned long vga_ram_offset, int vga_ram_size)
1218 1216 {
1219 1217 struct pci_vmsvga_state_s *s;
... ... @@ -1243,7 +1241,7 @@ void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
1243 1241 pci_register_io_region(&s->card, 1, vga_ram_size,
1244 1242 PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
1245 1243  
1246   - vmsvga_init(&s->chip, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
  1244 + vmsvga_init(&s->chip, vga_ram_base, vga_ram_offset, vga_ram_size);
1247 1245  
1248 1246 register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);
1249 1247 }
... ...
qemu-char.c
  View file @3023f33
... ... @@ -2128,10 +2128,10 @@ CharDriverState *qemu_chr_open(const char *label, const char *filename)
2128 2128 CharDriverState *chr;
2129 2129  
2130 2130 if (!strcmp(filename, "vc")) {
2131   - chr = text_console_init(&display_state, 0);
  2131 + chr = text_console_init(get_displaystate(), 0);
2132 2132 } else
2133 2133 if (strstart(filename, "vc:", &p)) {
2134   - chr = text_console_init(&display_state, p);
  2134 + chr = text_console_init(get_displaystate(), p);
2135 2135 } else
2136 2136 if (!strcmp(filename, "null")) {
2137 2137 chr = qemu_chr_open_null();
... ...
sysemu.h
  View file @3023f33
... ... @@ -101,7 +101,6 @@ extern int no_quit;
101 101 extern int semihosting_enabled;
102 102 extern int old_param;
103 103 extern const char *bootp_filename;
104   -extern DisplayState display_state;
105 104  
106 105 #ifdef USE_KQEMU
107 106 extern int kqemu_allowed;
... ...
... ... @@ -187,7 +187,7 @@ DriveInfo drives_table[MAX_DRIVES+1];
187 187 int nb_drives;
188 188 static int vga_ram_size;
189 189 enum vga_retrace_method vga_retrace_method = VGA_RETRACE_DUMB;
190   -DisplayState display_state;
  190 +static DisplayState *display_state;
191 191 int nographic;
192 192 static int curses;
193 193 static int sdl;
... ... @@ -2756,6 +2756,23 @@ void pcmcia_info(void)
2756 2756 }
2757 2757  
2758 2758 /***********************************************************/
  2759 +/* register display */
  2760 +
  2761 +void register_displaystate(DisplayState *ds)
  2762 +{
  2763 + DisplayState **s;
  2764 + s = &display_state;
  2765 + while (*s != NULL)
  2766 + s = &(*s)->next;
  2767 + ds->next = NULL;
  2768 + *s = ds;
  2769 +}
  2770 +
  2771 +DisplayState *get_displaystate(void)
  2772 +{
  2773 + return display_state;
  2774 +}
  2775 +
2759 2776 /* dumb display */
2760 2777  
2761 2778 static void dumb_update(DisplayState *ds, int x, int y, int w, int h)
... ... @@ -4502,7 +4519,7 @@ int main(int argc, char **argv, char **envp)
4502 4519 const char *initrd_filename;
4503 4520 const char *kernel_filename, *kernel_cmdline;
4504 4521 const char *boot_devices = "";
4505   - DisplayState *ds = &display_state;
  4522 + DisplayState *ds;
4506 4523 DisplayChangeListener *dcl;
4507 4524 int cyls, heads, secs, translation;
4508 4525 const char *net_clients[MAX_NET_CLIENTS];
... ... @@ -5414,9 +5431,63 @@ int main(int argc, char **argv, char **envp)
5414 5431 register_savevm("timer", 0, 2, timer_save, timer_load, NULL);
5415 5432 register_savevm_live("ram", 0, 3, ram_save_live, NULL, ram_load, NULL);
5416 5433  
  5434 +#ifndef _WIN32
  5435 + /* must be after terminal init, SDL library changes signal handlers */
  5436 + termsig_setup();
  5437 +#endif
  5438 +
  5439 + /* Maintain compatibility with multiple stdio monitors */
  5440 + if (!strcmp(monitor_device,"stdio")) {
  5441 + for (i = 0; i < MAX_SERIAL_PORTS; i++) {
  5442 + const char *devname = serial_devices[i];
  5443 + if (devname && !strcmp(devname,"mon:stdio")) {
  5444 + monitor_device = NULL;
  5445 + break;
  5446 + } else if (devname && !strcmp(devname,"stdio")) {
  5447 + monitor_device = NULL;
  5448 + serial_devices[i] = "mon:stdio";
  5449 + break;
  5450 + }
  5451 + }
  5452 + }
  5453 +
  5454 + if (kvm_enabled()) {
  5455 + int ret;
  5456 +
  5457 + ret = kvm_init(smp_cpus);
  5458 + if (ret < 0) {
  5459 + fprintf(stderr, "failed to initialize KVM\n");
  5460 + exit(1);
  5461 + }
  5462 + }
  5463 +
  5464 + machine->init(ram_size, vga_ram_size, boot_devices,
  5465 + kernel_filename, kernel_cmdline, initrd_filename, cpu_model);
  5466 +
  5467 + /* Set KVM's vcpu state to qemu's initial CPUState. */
  5468 + if (kvm_enabled()) {
  5469 + int ret;
  5470 +
  5471 + ret = kvm_sync_vcpus();
  5472 + if (ret < 0) {
  5473 + fprintf(stderr, "failed to initialize vcpus\n");
  5474 + exit(1);
  5475 + }
  5476 + }
  5477 +
  5478 + /* init USB devices */
  5479 + if (usb_enabled) {
  5480 + for(i = 0; i < usb_devices_index; i++) {
  5481 + if (usb_device_add(usb_devices[i]) < 0) {
  5482 + fprintf(stderr, "Warning: could not add USB device %s\n",
  5483 + usb_devices[i]);
  5484 + }
  5485 + }
  5486 + }
  5487 +
  5488 + /* just use the first displaystate for the moment */
  5489 + ds = display_state;
5417 5490 /* terminal init */
5418   - memset(&display_state, 0, sizeof(display_state));
5419   - ds->surface = qemu_create_displaysurface(640, 480, 32, 640 * 4);
5420 5491 if (nographic) {
5421 5492 if (curses) {
5422 5493 fprintf(stderr, "fatal: -nographic can't be used with -curses\n");
... ... @@ -5448,25 +5519,16 @@ int main(int argc, char **argv, char **envp)
5448 5519 }
5449 5520 }
5450 5521 dpy_resize(ds);
5451   -#ifndef _WIN32
5452   - /* must be after terminal init, SDL library changes signal handlers */
5453   - termsig_setup();
5454   -#endif
5455 5522  
5456   - /* Maintain compatibility with multiple stdio monitors */
5457   - if (!strcmp(monitor_device,"stdio")) {
5458   - for (i = 0; i < MAX_SERIAL_PORTS; i++) {
5459   - const char *devname = serial_devices[i];
5460   - if (devname && !strcmp(devname,"mon:stdio")) {
5461   - monitor_device = NULL;
5462   - break;
5463   - } else if (devname && !strcmp(devname,"stdio")) {
5464   - monitor_device = NULL;
5465   - serial_devices[i] = "mon:stdio";
5466   - break;
5467   - }
  5523 + dcl = ds->listeners;
  5524 + while (dcl != NULL) {
  5525 + if (dcl->dpy_refresh != NULL) {
  5526 + ds->gui_timer = qemu_new_timer(rt_clock, gui_update, ds);
  5527 + qemu_mod_timer(ds->gui_timer, qemu_get_clock(rt_clock));
5468 5528 }
  5529 + dcl = dcl->next;
5469 5530 }
  5531 +
5470 5532 if (monitor_device) {
5471 5533 monitor_hd = qemu_chr_open("monitor", monitor_device);
5472 5534 if (!monitor_hd) {
... ... @@ -5524,48 +5586,6 @@ int main(int argc, char **argv, char **envp)
5524 5586 }
5525 5587 }
5526 5588  
5527   - if (kvm_enabled()) {
5528   - int ret;
5529   -
5530   - ret = kvm_init(smp_cpus);
5531   - if (ret < 0) {
5532   - fprintf(stderr, "failed to initialize KVM\n");
5533   - exit(1);
5534   - }
5535   - }
5536   -
5537   - machine->init(ram_size, vga_ram_size, boot_devices, ds,
5538   - kernel_filename, kernel_cmdline, initrd_filename, cpu_model);
5539   -
5540   - /* Set KVM's vcpu state to qemu's initial CPUState. */
5541   - if (kvm_enabled()) {
5542   - int ret;
5543   -
5544   - ret = kvm_sync_vcpus();
5545   - if (ret < 0) {
5546   - fprintf(stderr, "failed to initialize vcpus\n");
5547   - exit(1);
5548   - }
5549   - }
5550   -
5551   - /* init USB devices */
5552   - if (usb_enabled) {
5553   - for(i = 0; i < usb_devices_index; i++) {
5554   - if (usb_device_add(usb_devices[i]) < 0) {
5555   - fprintf(stderr, "Warning: could not add USB device %s\n",
5556   - usb_devices[i]);
5557   - }
5558   - }
5559   - }
5560   -
5561   - dcl = ds->listeners;
5562   - while (dcl != NULL) {
5563   - if (dcl->dpy_refresh != NULL) {
5564   - display_state.gui_timer = qemu_new_timer(rt_clock, gui_update, &display_state);
5565   - qemu_mod_timer(display_state.gui_timer, qemu_get_clock(rt_clock));
5566   - }
5567   - dcl = dcl->next;
5568   - }
5569 5589 #ifdef CONFIG_GDBSTUB
5570 5590 if (use_gdbstub) {
5571 5591 /* XXX: use standard host:port notation and modify options
... ...