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/*
* QEMU PC System Emulator
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*
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* Copyright ( c ) 2003 - 2004 Fabrice Bellard
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*
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* Permission is hereby granted , free of charge , to any person obtaining a copy
* of this software and associated documentation files ( the "Software" ), to deal
* in the Software without restriction , including without limitation the rights
* to use , copy , modify , merge , publish , distribute , sublicense , and / or sell
* copies of the Software , and to permit persons to whom the Software is
* furnished to do so , subject to the following conditions :
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software .
*
* THE SOFTWARE IS PROVIDED "AS IS" , WITHOUT WARRANTY OF ANY KIND , EXPRESS OR
* IMPLIED , INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY ,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT . IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM , DAMAGES OR OTHER
* LIABILITY , WHETHER IN AN ACTION OF CONTRACT , TORT OR OTHERWISE , ARISING FROM ,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE .
*/
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# include "hw.h"
# include "pc.h"
# include "fdc.h"
# include "pci.h"
# include "block.h"
# include "sysemu.h"
# include "audio/audio.h"
# include "net.h"
# include "smbus.h"
# include "boards.h"
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# include "monitor.h"
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# include "fw_cfg.h"
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# include "hpet_emul.h"
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# include "watchdog.h"
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# include "smbios.h"
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/* output Bochs bios info messages */
// # define DEBUG_BIOS
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# define BIOS_FILENAME "bios.bin"
# define VGABIOS_FILENAME "vgabios.bin"
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# define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
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# define PC_MAX_BIOS_SIZE ( 4 * 1024 * 1024 )
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/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
# define ACPI_DATA_SIZE 0x10000
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# define BIOS_CFG_IOPORT 0x510
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# define FW_CFG_ACPI_TABLES ( FW_CFG_ARCH_LOCAL + 0 )
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# define FW_CFG_SMBIOS_ENTRIES ( FW_CFG_ARCH_LOCAL + 1 )
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# define MAX_IDE_BUS 2
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static fdctrl_t * floppy_controller ;
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static RTCState * rtc_state ;
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static PITState * pit ;
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static IOAPICState * ioapic ;
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static PCIDevice * i440fx_state ;
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typedef struct rom_reset_data {
uint8_t * data ;
target_phys_addr_t addr ;
unsigned size ;
} RomResetData ;
static void option_rom_reset ( void * _rrd )
{
RomResetData * rrd = _rrd ;
cpu_physical_memory_write_rom ( rrd -> addr , rrd -> data , rrd -> size );
}
static void option_rom_setup_reset ( target_phys_addr_t addr , unsigned size )
{
RomResetData * rrd = qemu_malloc ( sizeof * rrd );
rrd -> data = qemu_malloc ( size );
cpu_physical_memory_read ( addr , rrd -> data , size );
rrd -> addr = addr ;
rrd -> size = size ;
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qemu_register_reset ( option_rom_reset , 0 , rrd );
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}
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static void ioport80_write ( void * opaque , uint32_t addr , uint32_t data )
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{
}
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/* MSDOS compatibility mode FPU exception support */
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static qemu_irq ferr_irq ;
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/* XXX: add IGNNE support */
void cpu_set_ferr ( CPUX86State * s )
{
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qemu_irq_raise ( ferr_irq );
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}
static void ioportF0_write ( void * opaque , uint32_t addr , uint32_t data )
{
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qemu_irq_lower ( ferr_irq );
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}
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/* TSC handling */
uint64_t cpu_get_tsc ( CPUX86State * env )
{
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/* Note : when using kqemu , it is more logical to return the host TSC
because kqemu does not trap the RDTSC instruction for
performance reasons */
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# ifdef CONFIG_KQEMU
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if ( env -> kqemu_enabled ) {
return cpu_get_real_ticks ();
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} else
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# endif
{
return cpu_get_ticks ();
}
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}
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/* SMM support */
void cpu_smm_update ( CPUState * env )
{
if ( i440fx_state && env == first_cpu )
i440fx_set_smm ( i440fx_state , ( env -> hflags >> HF_SMM_SHIFT ) & 1 );
}
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/* IRQ handling */
int cpu_get_pic_interrupt ( CPUState * env )
{
int intno ;
intno = apic_get_interrupt ( env );
if ( intno >= 0 ) {
/* set irq request if a PIC irq is still pending */
/* XXX: improve that */
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pic_update_irq ( isa_pic );
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return intno ;
}
/* read the irq from the PIC */
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if ( ! apic_accept_pic_intr ( env ))
return - 1 ;
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intno = pic_read_irq ( isa_pic );
return intno ;
}
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static void pic_irq_request ( void * opaque , int irq , int level )
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{
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CPUState * env = first_cpu ;
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if ( env -> apic_state ) {
while ( env ) {
if ( apic_accept_pic_intr ( env ))
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apic_deliver_pic_intr ( env , level );
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env = env -> next_cpu ;
}
} else {
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if ( level )
cpu_interrupt ( env , CPU_INTERRUPT_HARD );
else
cpu_reset_interrupt ( env , CPU_INTERRUPT_HARD );
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}
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}
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/* PC cmos mappings */
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# define REG_EQUIPMENT_BYTE 0x14
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static int cmos_get_fd_drive_type ( int fd0 )
{
int val ;
switch ( fd0 ) {
case 0 :
/* 1.44 Mb 3"5 drive */
val = 4 ;
break ;
case 1 :
/* 2.88 Mb 3"5 drive */
val = 5 ;
break ;
case 2 :
/* 1.2 Mb 5"5 drive */
val = 2 ;
break ;
default :
val = 0 ;
break ;
}
return val ;
}
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static void cmos_init_hd ( int type_ofs , int info_ofs , BlockDriverState * hd )
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{
RTCState * s = rtc_state ;
int cylinders , heads , sectors ;
bdrv_get_geometry_hint ( hd , & cylinders , & heads , & sectors );
rtc_set_memory ( s , type_ofs , 47 );
rtc_set_memory ( s , info_ofs , cylinders );
rtc_set_memory ( s , info_ofs + 1 , cylinders >> 8 );
rtc_set_memory ( s , info_ofs + 2 , heads );
rtc_set_memory ( s , info_ofs + 3 , 0xff );
rtc_set_memory ( s , info_ofs + 4 , 0xff );
rtc_set_memory ( s , info_ofs + 5 , 0xc0 | (( heads > 8 ) << 3 ));
rtc_set_memory ( s , info_ofs + 6 , cylinders );
rtc_set_memory ( s , info_ofs + 7 , cylinders >> 8 );
rtc_set_memory ( s , info_ofs + 8 , sectors );
}
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/* convert boot_device letter to something recognizable by the bios */
static int boot_device2nibble ( char boot_device )
{
switch ( boot_device ) {
case 'a' :
case 'b' :
return 0x01 ; /* floppy boot */
case 'c' :
return 0x02 ; /* hard drive boot */
case 'd' :
return 0x03 ; /* CD-ROM boot */
case 'n' :
return 0x04 ; /* Network boot */
}
return 0 ;
}
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/* copy / pasted from cmos_init , should be made a general function
and used there as well */
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static int pc_boot_set ( void * opaque , const char * boot_device )
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{
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Monitor * mon = cur_mon ;
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# define PC_MAX_BOOT_DEVICES 3
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RTCState * s = ( RTCState * ) opaque ;
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int nbds , bds [ 3 ] = { 0 , };
int i ;
nbds = strlen ( boot_device );
if ( nbds > PC_MAX_BOOT_DEVICES ) {
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monitor_printf ( mon , "Too many boot devices for PC \n " );
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return ( 1 );
}
for ( i = 0 ; i < nbds ; i ++ ) {
bds [ i ] = boot_device2nibble ( boot_device [ i ]);
if ( bds [ i ] == 0 ) {
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monitor_printf ( mon , "Invalid boot device for PC: '%c' \n " ,
boot_device [ i ]);
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return ( 1 );
}
}
rtc_set_memory ( s , 0x3d , ( bds [ 1 ] << 4 ) | bds [ 0 ]);
rtc_set_memory ( s , 0x38 , ( bds [ 2 ] << 4 ));
return ( 0 );
}
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/* hd_table must contain 4 block drivers */
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static void cmos_init ( ram_addr_t ram_size , ram_addr_t above_4g_mem_size ,
const char * boot_device , BlockDriverState ** hd_table )
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{
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RTCState * s = rtc_state ;
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int nbds , bds [ 3 ] = { 0 , };
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int val ;
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int fd0 , fd1 , nb ;
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int i ;
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/* various important CMOS locations needed by PC/Bochs bios */
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/* memory size */
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val = 640 ; /* base memory in K */
rtc_set_memory ( s , 0x15 , val );
rtc_set_memory ( s , 0x16 , val >> 8 );
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val = ( ram_size / 1024 ) - 1024 ;
if ( val > 65535 )
val = 65535 ;
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rtc_set_memory ( s , 0x17 , val );
rtc_set_memory ( s , 0x18 , val >> 8 );
rtc_set_memory ( s , 0x30 , val );
rtc_set_memory ( s , 0x31 , val >> 8 );
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if ( above_4g_mem_size ) {
rtc_set_memory ( s , 0x5b , ( unsigned int ) above_4g_mem_size >> 16 );
rtc_set_memory ( s , 0x5c , ( unsigned int ) above_4g_mem_size >> 24 );
rtc_set_memory ( s , 0x5d , ( uint64_t ) above_4g_mem_size >> 32 );
}
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if ( ram_size > ( 16 * 1024 * 1024 ))
val = ( ram_size / 65536 ) - (( 16 * 1024 * 1024 ) / 65536 );
else
val = 0 ;
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if ( val > 65535 )
val = 65535 ;
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rtc_set_memory ( s , 0x34 , val );
rtc_set_memory ( s , 0x35 , val >> 8 );
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/* set the number of CPU */
rtc_set_memory ( s , 0x5f , smp_cpus - 1 );
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/* set boot devices, and disable floppy signature check if requested */
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# define PC_MAX_BOOT_DEVICES 3
nbds = strlen ( boot_device );
if ( nbds > PC_MAX_BOOT_DEVICES ) {
fprintf ( stderr , "Too many boot devices for PC \n " );
exit ( 1 );
}
for ( i = 0 ; i < nbds ; i ++ ) {
bds [ i ] = boot_device2nibble ( boot_device [ i ]);
if ( bds [ i ] == 0 ) {
fprintf ( stderr , "Invalid boot device for PC: '%c' \n " ,
boot_device [ i ]);
exit ( 1 );
}
}
rtc_set_memory ( s , 0x3d , ( bds [ 1 ] << 4 ) | bds [ 0 ]);
rtc_set_memory ( s , 0x38 , ( bds [ 2 ] << 4 ) | ( fd_bootchk ? 0x0 : 0x1 ));
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/* floppy type */
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fd0 = fdctrl_get_drive_type ( floppy_controller , 0 );
fd1 = fdctrl_get_drive_type ( floppy_controller , 1 );
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val = ( cmos_get_fd_drive_type ( fd0 ) << 4 ) | cmos_get_fd_drive_type ( fd1 );
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rtc_set_memory ( s , 0x10 , val );
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val = 0 ;
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nb = 0 ;
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if ( fd0 < 3 )
nb ++ ;
if ( fd1 < 3 )
nb ++ ;
switch ( nb ) {
case 0 :
break ;
case 1 :
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val |= 0x01 ; /* 1 drive, ready for boot */
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break ;
case 2 :
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val |= 0x41 ; /* 2 drives, ready for boot */
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break ;
}
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val |= 0x02 ; /* FPU is there */
val |= 0x04 ; /* PS/2 mouse installed */
rtc_set_memory ( s , REG_EQUIPMENT_BYTE , val );
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/* hard drives */
rtc_set_memory ( s , 0x12 , ( hd_table [ 0 ] ? 0xf0 : 0 ) | ( hd_table [ 1 ] ? 0x0f : 0 ));
if ( hd_table [ 0 ])
cmos_init_hd ( 0x19 , 0x1b , hd_table [ 0 ]);
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if ( hd_table [ 1 ])
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cmos_init_hd ( 0x1a , 0x24 , hd_table [ 1 ]);
val = 0 ;
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for ( i = 0 ; i < 4 ; i ++ ) {
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if ( hd_table [ i ]) {
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int cylinders , heads , sectors , translation ;
/* NOTE : bdrv_get_geometry_hint () returns the physical
geometry . It is always such that : 1 <= sects <= 63 , 1
<= heads <= 16 , 1 <= cylinders <= 16383 . The BIOS
geometry can be different if a translation is done . */
translation = bdrv_get_translation_hint ( hd_table [ i ]);
if ( translation == BIOS_ATA_TRANSLATION_AUTO ) {
bdrv_get_geometry_hint ( hd_table [ i ], & cylinders , & heads , & sectors );
if ( cylinders <= 1024 && heads <= 16 && sectors <= 63 ) {
/* No translation. */
translation = 0 ;
} else {
/* LBA translation. */
translation = 1 ;
}
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} else {
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translation -- ;
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}
val |= translation << ( i * 2 );
}
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}
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rtc_set_memory ( s , 0x39 , val );
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}
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void ioport_set_a20 ( int enable )
{
/* XXX: send to all CPUs ? */
cpu_x86_set_a20 ( first_cpu , enable );
}
int ioport_get_a20 ( void )
{
return (( first_cpu -> a20_mask >> 20 ) & 1 );
}
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static void ioport92_write ( void * opaque , uint32_t addr , uint32_t val )
{
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ioport_set_a20 (( val >> 1 ) & 1 );
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/* XXX: bit 0 is fast reset */
}
static uint32_t ioport92_read ( void * opaque , uint32_t addr )
{
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return ioport_get_a20 () << 1 ;
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}
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/***********************************************************/
/* Bochs BIOS debug ports */
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static void bochs_bios_write ( void * opaque , uint32_t addr , uint32_t val )
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{
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static const char shutdown_str [ 8 ] = "Shutdown" ;
static int shutdown_index = 0 ;
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switch ( addr ) {
/* Bochs BIOS messages */
case 0x400 :
case 0x401 :
fprintf ( stderr , "BIOS panic at rombios.c, line %d \n " , val );
exit ( 1 );
case 0x402 :
case 0x403 :
# ifdef DEBUG_BIOS
fprintf ( stderr , "%c" , val );
# endif
break ;
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case 0x8900 :
/* same as Bochs power off */
if ( val == shutdown_str [ shutdown_index ]) {
shutdown_index ++ ;
if ( shutdown_index == 8 ) {
shutdown_index = 0 ;
qemu_system_shutdown_request ();
}
} else {
shutdown_index = 0 ;
}
break ;
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/* LGPL'ed VGA BIOS messages */
case 0x501 :
case 0x502 :
fprintf ( stderr , "VGA BIOS panic, line %d \n " , val );
exit ( 1 );
case 0x500 :
case 0x503 :
# ifdef DEBUG_BIOS
fprintf ( stderr , "%c" , val );
# endif
break ;
}
}
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extern uint64_t node_cpumask [ MAX_NODES ];
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static void bochs_bios_init ( void )
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{
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void * fw_cfg ;
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uint8_t * smbios_table ;
size_t smbios_len ;
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uint64_t * numa_fw_cfg ;
int i , j ;
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register_ioport_write ( 0x400 , 1 , 2 , bochs_bios_write , NULL );
register_ioport_write ( 0x401 , 1 , 2 , bochs_bios_write , NULL );
register_ioport_write ( 0x402 , 1 , 1 , bochs_bios_write , NULL );
register_ioport_write ( 0x403 , 1 , 1 , bochs_bios_write , NULL );
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register_ioport_write ( 0x8900 , 1 , 1 , bochs_bios_write , NULL );
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register_ioport_write ( 0x501 , 1 , 2 , bochs_bios_write , NULL );
register_ioport_write ( 0x502 , 1 , 2 , bochs_bios_write , NULL );
register_ioport_write ( 0x500 , 1 , 1 , bochs_bios_write , NULL );
register_ioport_write ( 0x503 , 1 , 1 , bochs_bios_write , NULL );
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fw_cfg = fw_cfg_init ( BIOS_CFG_IOPORT , BIOS_CFG_IOPORT + 1 , 0 , 0 );
fw_cfg_add_i32 ( fw_cfg , FW_CFG_ID , 1 );
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fw_cfg_add_i64 ( fw_cfg , FW_CFG_RAM_SIZE , ( uint64_t ) ram_size );
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fw_cfg_add_bytes ( fw_cfg , FW_CFG_ACPI_TABLES , ( uint8_t * ) acpi_tables ,
acpi_tables_len );
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smbios_table = smbios_get_table ( & smbios_len );
if ( smbios_table )
fw_cfg_add_bytes ( fw_cfg , FW_CFG_SMBIOS_ENTRIES ,
smbios_table , smbios_len );
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/* allocate memory for the NUMA channel : one ( 64 bit ) word for the number
* of nodes , one word for each VCPU -> node and one word for each node to
* hold the amount of memory .
*/
numa_fw_cfg = qemu_mallocz (( 1 + smp_cpus + nb_numa_nodes ) * 8 );
numa_fw_cfg [ 0 ] = cpu_to_le64 ( nb_numa_nodes );
for ( i = 0 ; i < smp_cpus ; i ++ ) {
for ( j = 0 ; j < nb_numa_nodes ; j ++ ) {
if ( node_cpumask [ j ] & ( 1 << i )) {
numa_fw_cfg [ i + 1 ] = cpu_to_le64 ( j );
break ;
}
}
}
for ( i = 0 ; i < nb_numa_nodes ; i ++ ) {
numa_fw_cfg [ smp_cpus + 1 + i ] = cpu_to_le64 ( node_mem [ i ]);
}
fw_cfg_add_bytes ( fw_cfg , FW_CFG_NUMA , ( uint8_t * ) numa_fw_cfg ,
( 1 + smp_cpus + nb_numa_nodes ) * 8 );
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}
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/* Generate an initial boot sector which sets state and jump to
a specified vector */
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static void generate_bootsect ( target_phys_addr_t option_rom ,
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uint32_t gpr [ 8 ], uint16_t segs [ 6 ], uint16_t ip )
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{
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uint8_t rom [ 512 ], * p , * reloc ;
uint8_t sum ;
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int i ;
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memset ( rom , 0 , sizeof ( rom ));
p = rom ;
/* Make sure we have an option rom signature */
* p ++ = 0x55 ;
* p ++ = 0xaa ;
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/* ROM size in sectors*/
* p ++ = 1 ;
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/* Hook int19 */
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* p ++ = 0x50 ; /* push ax */
* p ++ = 0x1e ; /* push ds */
* p ++ = 0x31 ; * p ++ = 0xc0 ; /* xor ax, ax */
* p ++ = 0x8e ; * p ++ = 0xd8 ; /* mov ax, ds */
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* p ++ = 0xc7 ; * p ++ = 0x06 ; /* movvw _start,0x64 */
* p ++ = 0x64 ; * p ++ = 0x00 ;
reloc = p ;
* p ++ = 0x00 ; * p ++ = 0x00 ;
* p ++ = 0x8c ; * p ++ = 0x0e ; /* mov cs,0x66 */
* p ++ = 0x66 ; * p ++ = 0x00 ;
* p ++ = 0x1f ; /* pop ds */
* p ++ = 0x58 ; /* pop ax */
* p ++ = 0xcb ; /* lret */
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/* Actual code */
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* reloc = ( p - rom );
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* p ++ = 0xfa ; /* CLI */
* p ++ = 0xfc ; /* CLD */
for ( i = 0 ; i < 6 ; i ++ ) {
if ( i == 1 ) /* Skip CS */
continue ;
* p ++ = 0xb8 ; /* MOV AX,imm16 */
* p ++ = segs [ i ];
* p ++ = segs [ i ] >> 8 ;
* p ++ = 0x8e ; /* MOV <seg>,AX */
* p ++ = 0xc0 + ( i << 3 );
}
for ( i = 0 ; i < 8 ; i ++ ) {
* p ++ = 0x66 ; /* 32-bit operand size */
* p ++ = 0xb8 + i ; /* MOV <reg>,imm32 */
* p ++ = gpr [ i ];
* p ++ = gpr [ i ] >> 8 ;
* p ++ = gpr [ i ] >> 16 ;
* p ++ = gpr [ i ] >> 24 ;
}
* p ++ = 0xea ; /* JMP FAR */
* p ++ = ip ; /* IP */
* p ++ = ip >> 8 ;
* p ++ = segs [ 1 ]; /* CS */
* p ++ = segs [ 1 ] >> 8 ;
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/* sign rom */
sum = 0 ;
for ( i = 0 ; i < ( sizeof ( rom ) - 1 ); i ++ )
sum += rom [ i ];
rom [ sizeof ( rom ) - 1 ] = - sum ;
578
cpu_physical_memory_write_rom ( option_rom , rom , sizeof ( rom ));
579
option_rom_setup_reset ( option_rom , sizeof ( rom ));
ths
authored
18 years ago
580
}
581
ths
authored
18 years ago
582
583
584
585
586
587
588
589
590
591
592
593
594
595
static long get_file_size ( FILE * f )
{
long where , size ;
/* XXX: on Unix systems, using fstat() probably makes more sense */
where = ftell ( f );
fseek ( f , 0 , SEEK_END );
size = ftell ( f );
fseek ( f , where , SEEK_SET );
return size ;
}
596
static void load_linux ( target_phys_addr_t option_rom ,
597
const char * kernel_filename ,
ths
authored
18 years ago
598
const char * initrd_filename ,
599
600
const char * kernel_cmdline ,
target_phys_addr_t max_ram_size )
ths
authored
18 years ago
601
602
603
604
605
{
uint16_t protocol ;
uint32_t gpr [ 8 ];
uint16_t seg [ 6 ];
uint16_t real_seg ;
606
int setup_size , kernel_size , initrd_size = 0 , cmdline_size ;
ths
authored
18 years ago
607
608
uint32_t initrd_max ;
uint8_t header [ 1024 ];
609
target_phys_addr_t real_addr , prot_addr , cmdline_addr , initrd_addr = 0 ;
ths
authored
18 years ago
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
FILE * f , * fi ;
/* Align to 16 bytes as a paranoia measure */
cmdline_size = ( strlen ( kernel_cmdline ) + 16 ) & ~ 15 ;
/* load the kernel header */
f = fopen ( kernel_filename , "rb" );
if ( ! f || ! ( kernel_size = get_file_size ( f )) ||
fread ( header , 1 , 1024 , f ) != 1024 ) {
fprintf ( stderr , "qemu: could not load kernel '%s' \n " ,
kernel_filename );
exit ( 1 );
}
/* kernel protocol version */
625
# if 0
ths
authored
18 years ago
626
fprintf ( stderr , "header magic: %#x \n " , ldl_p ( header + 0x202 ));
627
# endif
ths
authored
18 years ago
628
629
630
631
632
633
634
if ( ldl_p ( header + 0x202 ) == 0x53726448 )
protocol = lduw_p ( header + 0x206 );
else
protocol = 0 ;
if ( protocol < 0x200 || ! ( header [ 0x211 ] & 0x01 )) {
/* Low kernel */
635
636
637
real_addr = 0x90000 ;
cmdline_addr = 0x9a000 - cmdline_size ;
prot_addr = 0x10000 ;
ths
authored
18 years ago
638
639
} else if ( protocol < 0x202 ) {
/* High but ancient kernel */
640
641
642
real_addr = 0x90000 ;
cmdline_addr = 0x9a000 - cmdline_size ;
prot_addr = 0x100000 ;
ths
authored
18 years ago
643
644
} else {
/* High and recent kernel */
645
646
647
real_addr = 0x10000 ;
cmdline_addr = 0x20000 ;
prot_addr = 0x100000 ;
ths
authored
18 years ago
648
649
}
650
# if 0
ths
authored
18 years ago
651
fprintf ( stderr ,
652
653
654
"qemu: real_addr = 0x" TARGET_FMT_plx " \n "
"qemu: cmdline_addr = 0x" TARGET_FMT_plx " \n "
"qemu: prot_addr = 0x" TARGET_FMT_plx " \n " ,
655
656
657
real_addr ,
cmdline_addr ,
prot_addr );
658
# endif
ths
authored
18 years ago
659
660
661
662
663
664
665
/* highest address for loading the initrd */
if ( protocol >= 0x203 )
initrd_max = ldl_p ( header + 0x22c );
else
initrd_max = 0x37ffffff ;
666
667
if ( initrd_max >= max_ram_size - ACPI_DATA_SIZE )
initrd_max = max_ram_size - ACPI_DATA_SIZE - 1 ;
ths
authored
18 years ago
668
669
/* kernel command line */
670
pstrcpy_targphys ( cmdline_addr , 4096 , kernel_cmdline );
ths
authored
18 years ago
671
672
if ( protocol >= 0x202 ) {
673
stl_p ( header + 0x228 , cmdline_addr );
ths
authored
18 years ago
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
} else {
stw_p ( header + 0x20 , 0xA33F );
stw_p ( header + 0x22 , cmdline_addr - real_addr );
}
/* loader type */
/* High nybble = B reserved for Qemu ; low nybble is revision number .
If this code is substantially changed , you may want to consider
incrementing the revision . */
if ( protocol >= 0x200 )
header [ 0x210 ] = 0xB0 ;
/* heap */
if ( protocol >= 0x201 ) {
header [ 0x211 ] |= 0x80 ; /* CAN_USE_HEAP */
stw_p ( header + 0x224 , cmdline_addr - real_addr - 0x200 );
}
/* load initrd */
if ( initrd_filename ) {
if ( protocol < 0x200 ) {
fprintf ( stderr , "qemu: linux kernel too old to load a ram disk \n " );
exit ( 1 );
}
fi = fopen ( initrd_filename , "rb" );
if ( ! fi ) {
fprintf ( stderr , "qemu: could not load initial ram disk '%s' \n " ,
initrd_filename );
exit ( 1 );
}
initrd_size = get_file_size ( fi );
707
initrd_addr = ( initrd_max - initrd_size ) & ~ 4095 ;
ths
authored
18 years ago
708
709
if ( ! fread_targphys_ok ( initrd_addr , initrd_size , fi )) {
ths
authored
18 years ago
710
711
712
713
714
715
fprintf ( stderr , "qemu: read error on initial ram disk '%s' \n " ,
initrd_filename );
exit ( 1 );
}
fclose ( fi );
716
stl_p ( header + 0x218 , initrd_addr );
ths
authored
18 years ago
717
718
719
720
stl_p ( header + 0x21c , initrd_size );
}
/* store the finalized header and load the rest of the kernel */
721
cpu_physical_memory_write ( real_addr , header , 1024 );
ths
authored
18 years ago
722
723
724
725
726
727
728
729
setup_size = header [ 0x1f1 ];
if ( setup_size == 0 )
setup_size = 4 ;
setup_size = ( setup_size + 1 ) * 512 ;
kernel_size -= setup_size ; /* Size of protected-mode code */
730
731
if ( ! fread_targphys_ok ( real_addr + 1024 , setup_size - 1024 , f ) ||
! fread_targphys_ok ( prot_addr , kernel_size , f )) {
ths
authored
18 years ago
732
733
734
735
736
737
738
fprintf ( stderr , "qemu: read error on kernel '%s' \n " ,
kernel_filename );
exit ( 1 );
}
fclose ( f );
/* generate bootsector to set up the initial register state */
739
real_seg = real_addr >> 4 ;
ths
authored
18 years ago
740
741
742
743
744
seg [ 0 ] = seg [ 2 ] = seg [ 3 ] = seg [ 4 ] = seg [ 4 ] = real_seg ;
seg [ 1 ] = real_seg + 0x20 ; /* CS */
memset ( gpr , 0 , sizeof gpr );
gpr [ 4 ] = cmdline_addr - real_addr - 16 ; /* SP (-16 is paranoia) */
745
746
747
748
749
750
option_rom_setup_reset ( real_addr , setup_size );
option_rom_setup_reset ( prot_addr , kernel_size );
option_rom_setup_reset ( cmdline_addr , cmdline_size );
if ( initrd_filename )
option_rom_setup_reset ( initrd_addr , initrd_size );
751
generate_bootsect ( option_rom , gpr , seg , 0 );
ths
authored
18 years ago
752
753
}
754
755
756
757
758
759
static const int ide_iobase [ 2 ] = { 0x1f0 , 0x170 };
static const int ide_iobase2 [ 2 ] = { 0x3f6 , 0x376 };
static const int ide_irq [ 2 ] = { 14 , 15 };
# define NE2000_NB_MAX 6
760
static int ne2000_io [ NE2000_NB_MAX ] = { 0x300 , 0x320 , 0x340 , 0x360 , 0x280 , 0x380 };
761
762
static int ne2000_irq [ NE2000_NB_MAX ] = { 9 , 10 , 11 , 3 , 4 , 5 };
763
764
765
static int serial_io [ MAX_SERIAL_PORTS ] = { 0x3f8 , 0x2f8 , 0x3e8 , 0x2e8 };
static int serial_irq [ MAX_SERIAL_PORTS ] = { 4 , 3 , 4 , 3 };
766
767
768
static int parallel_io [ MAX_PARALLEL_PORTS ] = { 0x378 , 0x278 , 0x3bc };
static int parallel_irq [ MAX_PARALLEL_PORTS ] = { 7 , 7 , 7 };
769
# ifdef HAS_AUDIO
770
static void audio_init ( PCIBus * pci_bus , qemu_irq * pic )
771
772
773
{
struct soundhw * c ;
malc
authored
16 years ago
774
775
776
777
778
779
780
for ( c = soundhw ; c -> name ; ++ c ) {
if ( c -> enabled ) {
if ( c -> isa ) {
c -> init . init_isa ( pic );
} else {
if ( pci_bus ) {
c -> init . init_pci ( pci_bus );
781
782
783
784
785
786
787
}
}
}
}
}
# endif
788
static void pc_init_ne2k_isa ( NICInfo * nd , qemu_irq * pic )
789
790
791
792
793
{
static int nb_ne2k = 0 ;
if ( nb_ne2k == NE2000_NB_MAX )
return ;
794
isa_ne2000_init ( ne2000_io [ nb_ne2k ], pic [ ne2000_irq [ nb_ne2k ]], nd );
795
796
797
nb_ne2k ++ ;
}
798
799
800
801
static int load_option_rom ( const char * oprom , target_phys_addr_t start ,
target_phys_addr_t end )
{
int size ;
802
803
804
805
806
807
808
809
810
811
812
813
814
815
char * filename ;
filename = qemu_find_file ( QEMU_FILE_TYPE_BIOS , oprom );
if ( filename ) {
size = get_image_size ( filename );
if ( size > 0 && start + size > end ) {
fprintf ( stderr , "Not enough space to load option rom '%s' \n " ,
oprom );
exit ( 1 );
}
size = load_image_targphys ( filename , start , end - start );
qemu_free ( filename );
} else {
size = - 1 ;
816
817
818
819
820
821
822
}
if ( size < 0 ) {
fprintf ( stderr , "Could not load option rom '%s' \n " , oprom );
exit ( 1 );
}
/* Round up optiom rom size to the next 2k boundary */
size = ( size + 2047 ) & ~ 2047 ;
823
option_rom_setup_reset ( start , size );
824
825
826
return size ;
}
827
828
829
830
831
int cpu_is_bsp ( CPUState * env )
{
return env -> cpuid_apic_id == 0 ;
}
832
/* PC hardware initialisation */
833
static void pc_init1 ( ram_addr_t ram_size ,
834
const char * boot_device ,
835
const char * kernel_filename , const char * kernel_cmdline ,
836
const char * initrd_filename ,
837
int pci_enabled , const char * cpu_model )
838
{
839
char * filename ;
ths
authored
18 years ago
840
int ret , linux_boot , i ;
841
ram_addr_t ram_addr , bios_offset , option_rom_offset ;
842
ram_addr_t below_4g_mem_size , above_4g_mem_size = 0 ;
843
int bios_size , isa_bios_size , oprom_area_size ;
844
PCIBus * pci_bus ;
845
PCIDevice * pci_dev ;
846
int piix3_devfn = - 1 ;
847
CPUState * env ;
848
849
qemu_irq * cpu_irq ;
qemu_irq * i8259 ;
ths
authored
17 years ago
850
851
852
int index ;
BlockDriverState * hd [ MAX_IDE_BUS * MAX_IDE_DEVS ];
BlockDriverState * fd [ MAX_FD ];
853
int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled ;
854
855
856
857
858
859
860
861
if ( ram_size >= 0xe0000000 ) {
above_4g_mem_size = ram_size - 0xe0000000 ;
below_4g_mem_size = 0xe0000000 ;
} else {
below_4g_mem_size = ram_size ;
}
862
863
linux_boot = ( kernel_filename != NULL );
864
/* init CPUs */
865
866
867
868
869
870
871
872
if ( cpu_model == NULL ) {
# ifdef TARGET_X86_64
cpu_model = "qemu64" ;
# else
cpu_model = "qemu32" ;
# endif
}
873
for ( i = 0 ; i < smp_cpus ; i ++ ) {
874
875
876
877
878
env = cpu_init ( cpu_model );
if ( ! env ) {
fprintf ( stderr , "Unable to find x86 CPU definition \n " );
exit ( 1 );
}
879
if (( env -> cpuid_features & CPUID_APIC ) || smp_cpus > 1 ) {
880
env -> cpuid_apic_id = env -> cpu_index ;
881
/* APIC reset callback resets cpu */
882
apic_init ( env );
883
884
} else {
qemu_register_reset (( QEMUResetHandler * ) cpu_reset , 0 , env );
885
886
887
}
}
888
889
vmport_init ();
890
/* allocate RAM */
891
892
893
894
895
896
897
898
899
900
901
902
ram_addr = qemu_ram_alloc ( 0xa0000 );
cpu_register_physical_memory ( 0 , 0xa0000 , ram_addr );
/* Allocate , even though we won ' t register , so we don ' t break the
* phys_ram_base + PA assumption . This range includes vga ( 0xa0000 - 0xc0000 ),
* and some bios areas , which will be registered later
*/
ram_addr = qemu_ram_alloc ( 0x100000 - 0xa0000 );
ram_addr = qemu_ram_alloc ( below_4g_mem_size - 0x100000 );
cpu_register_physical_memory ( 0x100000 ,
below_4g_mem_size - 0x100000 ,
ram_addr );
903
904
905
/* above 4giga memory allocation */
if ( above_4g_mem_size > 0 ) {
906
907
908
# if TARGET_PHYS_ADDR_BITS == 32
hw_error ( "To much RAM for 32-bit physical address" );
# else
909
910
ram_addr = qemu_ram_alloc ( above_4g_mem_size );
cpu_register_physical_memory ( 0x100000000ULL ,
911
above_4g_mem_size ,
912
ram_addr );
913
# endif
914
}
915
916
917
/* BIOS load */
918
919
if ( bios_name == NULL )
bios_name = BIOS_FILENAME ;
920
921
922
923
924
925
filename = qemu_find_file ( QEMU_FILE_TYPE_BIOS , bios_name );
if ( filename ) {
bios_size = get_image_size ( filename );
} else {
bios_size = - 1 ;
}
ths
authored
18 years ago
926
if ( bios_size <= 0 ||
927
( bios_size % 65536 ) != 0 ) {
928
929
goto bios_error ;
}
930
bios_offset = qemu_ram_alloc ( bios_size );
931
ret = load_image ( filename , qemu_get_ram_ptr ( bios_offset ));
932
933
if ( ret != bios_size ) {
bios_error :
934
fprintf ( stderr , "qemu: could not load PC BIOS '%s' \n " , bios_name );
935
936
exit ( 1 );
}
937
938
939
if ( filename ) {
qemu_free ( filename );
}
940
941
942
943
/* map the last 128KB of the BIOS in ISA space */
isa_bios_size = bios_size ;
if ( isa_bios_size > ( 128 * 1024 ))
isa_bios_size = 128 * 1024 ;
ths
authored
18 years ago
944
945
cpu_register_physical_memory ( 0x100000 - isa_bios_size ,
isa_bios_size ,
946
( bios_offset + bios_size - isa_bios_size ) | IO_MEM_ROM );
ths
authored
18 years ago
947
948
949
950
951
option_rom_offset = qemu_ram_alloc ( 0x20000 );
oprom_area_size = 0 ;
952
cpu_register_physical_memory ( 0xc0000 , 0x20000 , option_rom_offset );
953
954
if ( using_vga ) {
955
const char * vgabios_filename ;
956
957
/* VGA BIOS load */
if ( cirrus_vga_enabled ) {
958
vgabios_filename = VGABIOS_CIRRUS_FILENAME ;
959
} else {
960
vgabios_filename = VGABIOS_FILENAME ;
961
}
962
oprom_area_size = load_option_rom ( vgabios_filename , 0xc0000 , 0xe0000 );
963
964
965
966
967
968
969
970
}
/* Although video roms can grow larger than 0x8000 , the area between
* 0xc0000 - 0xc8000 is reserved for them . It means we won ' t be looking
* for any other kind of option rom inside this area */
if ( oprom_area_size < 0x8000 )
oprom_area_size = 0x8000 ;
if ( linux_boot ) {
971
load_linux ( 0xc0000 + oprom_area_size ,
972
kernel_filename , initrd_filename , kernel_cmdline , below_4g_mem_size );
973
974
975
976
oprom_area_size += 2048 ;
}
for ( i = 0 ; i < nb_option_roms ; i ++ ) {
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
oprom_area_size += load_option_rom ( option_rom [ i ], 0xc0000 + oprom_area_size ,
0xe0000 );
}
for ( i = 0 ; i < nb_nics ; i ++ ) {
char nic_oprom [ 1024 ];
const char * model = nd_table [ i ]. model ;
if ( ! nd_table [ i ]. bootable )
continue ;
if ( model == NULL )
model = "ne2k_pci" ;
snprintf ( nic_oprom , sizeof ( nic_oprom ), "pxe-%s.bin" , model );
oprom_area_size += load_option_rom ( nic_oprom , 0xc0000 + oprom_area_size ,
0xe0000 );
ths
authored
18 years ago
994
995
}
996
/* map all the bios at the top of memory */
ths
authored
18 years ago
997
cpu_register_physical_memory (( uint32_t )( - bios_size ),
998
bios_size , bios_offset | IO_MEM_ROM );
ths
authored
18 years ago
999
1000
1001
bochs_bios_init ();
1002
cpu_irq = qemu_allocate_irqs ( pic_irq_request , NULL , 1 );
1003
1004
1005
i8259 = i8259_init ( cpu_irq [ 0 ]);
ferr_irq = i8259 [ 13 ];
1006
if ( pci_enabled ) {
1007
pci_bus = i440fx_init ( & i440fx_state , i8259 );
ths
authored
18 years ago
1008
piix3_devfn = piix3_init ( pci_bus , - 1 );
1009
1010
} else {
pci_bus = NULL ;
1011
1012
}
1013
/* init basic PC hardware */
1014
register_ioport_write ( 0x80 , 1 , 1 , ioport80_write , NULL );
1015
1016
1017
register_ioport_write ( 0xf0 , 1 , 1 , ioportF0_write , NULL );
1018
1019
if ( cirrus_vga_enabled ) {
if ( pci_enabled ) {
1020
pci_cirrus_vga_init ( pci_bus );
1021
} else {
1022
isa_cirrus_vga_init ();
1023
}
ths
authored
18 years ago
1024
1025
} else if ( vmsvga_enabled ) {
if ( pci_enabled )
1026
pci_vmsvga_init ( pci_bus );
ths
authored
18 years ago
1027
1028
else
fprintf ( stderr , "%s: vmware_vga: no PCI bus \n " , __FUNCTION__ );
1029
} else if ( std_vga_enabled ) {
1030
if ( pci_enabled ) {
1031
pci_vga_init ( pci_bus , 0 , 0 );
1032
} else {
1033
isa_vga_init ();
1034
}
1035
}
1036
1037
rtc_state = rtc_init ( 0x70 , i8259 [ 8 ], 2000 );
1038
1039
1040
qemu_register_boot_set ( pc_boot_set , rtc_state );
1041
1042
1043
register_ioport_read ( 0x92 , 1 , 1 , ioport92_read , NULL );
register_ioport_write ( 0x92 , 1 , 1 , ioport92_write , NULL );
1044
1045
1046
if ( pci_enabled ) {
ioapic = ioapic_init ();
}
1047
pit = pit_init ( 0x40 , i8259 [ 0 ]);
1048
pcspk_init ( pit );
1049
1050
1051
if ( ! no_hpet ) {
hpet_init ( i8259 );
}
1052
1053
1054
if ( pci_enabled ) {
pic_set_alt_irq_func ( isa_pic , ioapic_set_irq , ioapic );
}
1055
1056
1057
for ( i = 0 ; i < MAX_SERIAL_PORTS ; i ++ ) {
if ( serial_hds [ i ]) {
1058
1059
serial_init ( serial_io [ i ], i8259 [ serial_irq [ i ]], 115200 ,
serial_hds [ i ]);
1060
1061
}
}
1062
1063
1064
for ( i = 0 ; i < MAX_PARALLEL_PORTS ; i ++ ) {
if ( parallel_hds [ i ]) {
1065
1066
parallel_init ( parallel_io [ i ], i8259 [ parallel_irq [ i ]],
parallel_hds [ i ]);
1067
1068
1069
}
}
1070
1071
watchdog_pc_init ( pci_bus );
1072
for ( i = 0 ; i < nb_nics ; i ++ ) {
1073
1074
1075
NICInfo * nd = & nd_table [ i ];
if ( ! pci_enabled || ( nd -> model && strcmp ( nd -> model , "ne2k_isa" ) == 0 ))
1076
pc_init_ne2k_isa ( nd , i8259 );
1077
else
1078
pci_nic_init ( nd , "ne2k_pci" , NULL );
1079
}
1080
1081
piix4_acpi_system_hot_add_init ();
1082
ths
authored
17 years ago
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
if ( drive_get_max_bus ( IF_IDE ) >= MAX_IDE_BUS ) {
fprintf ( stderr , "qemu: too many IDE bus \n " );
exit ( 1 );
}
for ( i = 0 ; i < MAX_IDE_BUS * MAX_IDE_DEVS ; i ++ ) {
index = drive_get_index ( IF_IDE , i / MAX_IDE_DEVS , i % MAX_IDE_DEVS );
if ( index != - 1 )
hd [ i ] = drives_table [ index ]. bdrv ;
else
hd [ i ] = NULL ;
}
1096
if ( pci_enabled ) {
ths
authored
17 years ago
1097
pci_piix3_ide_init ( pci_bus , hd , piix3_devfn + 1 , i8259 );
1098
} else {
ths
authored
17 years ago
1099
for ( i = 0 ; i < MAX_IDE_BUS ; i ++ ) {
1100
isa_ide_init ( ide_iobase [ i ], ide_iobase2 [ i ], i8259 [ ide_irq [ i ]],
ths
authored
17 years ago
1101
hd [ MAX_IDE_DEVS * i ], hd [ MAX_IDE_DEVS * i + 1 ]);
1102
}
1103
}
1104
1105
i8042_init ( i8259 [ 1 ], i8259 [ 12 ], 0x60 );
1106
DMA_init ( 0 );
1107
# ifdef HAS_AUDIO
1108
audio_init ( pci_enabled ? pci_bus : NULL , i8259 );
1109
# endif
1110
ths
authored
17 years ago
1111
1112
1113
1114
1115
1116
1117
1118
for ( i = 0 ; i < MAX_FD ; i ++ ) {
index = drive_get_index ( IF_FLOPPY , 0 , i );
if ( index != - 1 )
fd [ i ] = drives_table [ index ]. bdrv ;
else
fd [ i ] = NULL ;
}
floppy_controller = fdctrl_init ( i8259 [ 6 ], 2 , 0 , 0x3f0 , fd );
1119
1120
cmos_init ( below_4g_mem_size , above_4g_mem_size , boot_device , hd );
1121
1122
if ( pci_enabled && usb_enabled ) {
ths
authored
18 years ago
1123
usb_uhci_piix3_init ( pci_bus , piix3_devfn + 2 );
1124
1125
}
1126
if ( pci_enabled && acpi_enabled ) {
ths
authored
18 years ago
1127
uint8_t * eeprom_buf = qemu_mallocz ( 8 * 256 ); /* XXX: make this persistent */
1128
1129
1130
i2c_bus * smbus ;
/* TODO: Populate SPD eeprom data. */
1131
smbus = piix4_pm_init ( pci_bus , piix3_devfn + 3 , 0xb100 , i8259 [ 9 ]);
ths
authored
18 years ago
1132
for ( i = 0 ; i < 8 ; i ++ ) {
1133
DeviceState * eeprom ;
1134
eeprom = qdev_create (( BusState * ) smbus , "smbus-eeprom" );
1135
1136
1137
qdev_set_prop_int ( eeprom , "address" , 0x50 + i );
qdev_set_prop_ptr ( eeprom , "data" , eeprom_buf + ( i * 256 ));
qdev_init ( eeprom );
ths
authored
18 years ago
1138
}
1139
}
ths
authored
18 years ago
1140
1141
1142
1143
if ( i440fx_state ) {
i440fx_init_memory_mappings ( i440fx_state );
}
ths
authored
17 years ago
1144
1145
if ( pci_enabled ) {
ths
authored
17 years ago
1146
int max_bus ;
1147
int bus ;
ths
authored
18 years ago
1148
ths
authored
17 years ago
1149
1150
max_bus = drive_get_max_bus ( IF_SCSI );
for ( bus = 0 ; bus <= max_bus ; bus ++ ) {
1151
pci_create_simple ( pci_bus , - 1 , "lsi53c895a" );
ths
authored
17 years ago
1152
}
1153
}
1154
1155
1156
1157
1158
1159
1160
/* Add virtio block devices */
if ( pci_enabled ) {
int index ;
int unit_id = 0 ;
while (( index = drive_get_index ( IF_VIRTIO , 0 , unit_id )) != - 1 ) {
1161
1162
1163
pci_dev = pci_create ( "virtio-blk-pci" ,
drives_table [ index ]. devaddr );
qdev_init ( & pci_dev -> qdev );
1164
1165
1166
unit_id ++ ;
}
}
1167
1168
/* Add virtio balloon device */
1169
if ( pci_enabled && ! no_virtio_balloon ) {
1170
pci_create_simple ( pci_bus , - 1 , "virtio-balloon-pci" );
1171
}
1172
1173
1174
1175
/* Add virtio console devices */
if ( pci_enabled ) {
for ( i = 0 ; i < MAX_VIRTIO_CONSOLES ; i ++ ) {
1176
if ( virtcon_hds [ i ]) {
1177
pci_create_simple ( pci_bus , - 1 , "virtio-console-pci" );
1178
}
1179
1180
}
}
1181
}
1182
1183
static void pc_init_pci ( ram_addr_t ram_size ,
1184
const char * boot_device ,
ths
authored
18 years ago
1185
const char * kernel_filename ,
1186
const char * kernel_cmdline ,
1187
1188
const char * initrd_filename ,
const char * cpu_model )
1189
{
1190
pc_init1 ( ram_size , boot_device ,
1191
kernel_filename , kernel_cmdline ,
1192
initrd_filename , 1 , cpu_model );
1193
1194
}
1195
static void pc_init_isa ( ram_addr_t ram_size ,
1196
const char * boot_device ,
ths
authored
18 years ago
1197
const char * kernel_filename ,
1198
const char * kernel_cmdline ,
1199
1200
const char * initrd_filename ,
const char * cpu_model )
1201
{
1202
pc_init1 ( ram_size , boot_device ,
1203
kernel_filename , kernel_cmdline ,
1204
initrd_filename , 0 , cpu_model );
1205
1206
}
1207
1208
1209
1210
1211
1212
1213
1214
/* set CMOS shutdown status register ( index 0xF ) as S3_resume ( 0xFE )
BIOS will read it and start S3 resume at POST Entry */
void cmos_set_s3_resume ( void )
{
if ( rtc_state )
rtc_set_memory ( rtc_state , 0xF , 0xFE );
}
1215
static QEMUMachine pc_machine = {
1216
1217
1218
. name = "pc" ,
. desc = "Standard PC" ,
. init = pc_init_pci ,
1219
. max_cpus = 255 ,
1220
. is_default = 1 ,
1221
1222
};
1223
static QEMUMachine isapc_machine = {
1224
1225
1226
. name = "isapc" ,
. desc = "ISA-only PC" ,
. init = pc_init_isa ,
1227
. max_cpus = 1 ,
1228
};
1229
1230
1231
1232
1233
1234
1235
1236
static void pc_machine_init ( void )
{
qemu_register_machine ( & pc_machine );
qemu_register_machine ( & isapc_machine );
}
machine_init ( pc_machine_init );