gwj / at91sam9263 · Commits

Commit 46e50e9d58aa0fd6ab8f5cadceb8b55ee7e1d806

Authored by bellard
1 parent 7c29d0c0

added PCI bus 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@961 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 9 changed files with 70 additions and 64 deletions
hw/cirrus_vga.c
  View file @46e50e9
... ... @@ -2891,7 +2891,7 @@ static void cirrus_pci_mmio_map(PCIDevice *d, int region_num,
2891 2891 s->cirrus_mmio_io_addr);
2892 2892 }
2893 2893  
2894   -void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
  2894 +void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
2895 2895 unsigned long vga_ram_offset, int vga_ram_size)
2896 2896 {
2897 2897 PCICirrusVGAState *d;
... ... @@ -2902,9 +2902,9 @@ void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
2902 2902 device_id = CIRRUS_ID_CLGD5446;
2903 2903  
2904 2904 /* setup PCI configuration registers */
2905   - d = (PCICirrusVGAState *)pci_register_device("Cirrus VGA",
  2905 + d = (PCICirrusVGAState *)pci_register_device(bus, "Cirrus VGA",
2906 2906 sizeof(PCICirrusVGAState),
2907   - 0, -1, NULL, NULL);
  2907 + -1, NULL, NULL);
2908 2908 pci_conf = d->dev.config;
2909 2909 pci_conf[0x00] = (uint8_t) (PCI_VENDOR_CIRRUS & 0xff);
2910 2910 pci_conf[0x01] = (uint8_t) (PCI_VENDOR_CIRRUS >> 8);
... ...
hw/ide.c
  View file @46e50e9
... ... @@ -1579,14 +1579,14 @@ static void ide_map(PCIDevice *pci_dev, int region_num,
1579 1579 }
1580 1580  
1581 1581 /* hd_table must contain 4 block drivers */
1582   -void pci_ide_init(BlockDriverState **hd_table)
  1582 +void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
1583 1583 {
1584 1584 PCIIDEState *d;
1585 1585 uint8_t *pci_conf;
1586 1586 int i;
1587 1587  
1588   - d = (PCIIDEState *)pci_register_device("IDE", sizeof(PCIIDEState),
1589   - 0, -1,
  1588 + d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
  1589 + -1,
1590 1590 NULL, NULL);
1591 1591 pci_conf = d->dev.config;
1592 1592 pci_conf[0x00] = 0x86; // Intel
... ... @@ -1621,14 +1621,15 @@ void pci_ide_init(BlockDriverState **hd_table)
1621 1621  
1622 1622 /* hd_table must contain 4 block drivers */
1623 1623 /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
1624   -void pci_piix3_ide_init(BlockDriverState **hd_table)
  1624 +void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
1625 1625 {
1626 1626 PCIIDEState *d;
1627 1627 uint8_t *pci_conf;
1628 1628  
1629 1629 /* register a function 1 of PIIX3 */
1630   - d = (PCIIDEState *)pci_register_device("PIIX3 IDE", sizeof(PCIIDEState),
1631   - 0, ((PCIDevice *)piix3_state)->devfn + 1,
  1630 + d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
  1631 + sizeof(PCIIDEState),
  1632 + ((PCIDevice *)piix3_state)->devfn + 1,
1632 1633 NULL, NULL);
1633 1634 pci_conf = d->dev.config;
1634 1635 pci_conf[0x00] = 0x86; // Intel
... ...
hw/ne2000.c
  View file @46e50e9
... ... @@ -613,14 +613,15 @@ static void ne2000_map(PCIDevice *pci_dev, int region_num,
613 613 register_ioport_read(addr + 0x1f, 1, 1, ne2000_reset_ioport_read, s);
614 614 }
615 615  
616   -void pci_ne2000_init(NetDriverState *nd)
  616 +void pci_ne2000_init(PCIBus *bus, NetDriverState *nd)
617 617 {
618 618 PCINE2000State *d;
619 619 NE2000State *s;
620 620 uint8_t *pci_conf;
621 621  
622   - d = (PCINE2000State *)pci_register_device("NE2000", sizeof(PCINE2000State),
623   - 0, -1,
  622 + d = (PCINE2000State *)pci_register_device(bus,
  623 + "NE2000", sizeof(PCINE2000State),
  624 + -1,
624 625 NULL, NULL);
625 626 pci_conf = d->dev.config;
626 627 pci_conf[0x00] = 0xec; // Realtek 8029
... ...
hw/openpic.c
  View file @46e50e9
... ... @@ -964,7 +964,8 @@ static void openpic_map(PCIDevice *pci_dev, int region_num,
964 964 #endif
965 965 }
966 966  
967   -openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus)
  967 +openpic_t *openpic_init (PCIBus *bus,
  968 + uint32_t isu_base, uint32_t idu_base, int nb_cpus)
968 969 {
969 970 openpic_t *opp;
970 971 uint8_t *pci_conf;
... ... @@ -973,8 +974,8 @@ openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus)
973 974 /* XXX: for now, only one CPU is supported */
974 975 if (nb_cpus != 1)
975 976 return NULL;
976   - opp = (openpic_t *)pci_register_device("OpenPIC", sizeof(openpic_t),
977   - 0, -1, NULL, NULL);
  977 + opp = (openpic_t *)pci_register_device(bus, "OpenPIC", sizeof(openpic_t),
  978 + -1, NULL, NULL);
978 979 if (opp == NULL)
979 980 return NULL;
980 981 pci_conf = opp->pci_dev.config;
... ...
... ... @@ -324,7 +324,8 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
324 324 int ret, linux_boot, initrd_size, i, nb_nics1, fd;
325 325 unsigned long bios_offset, vga_bios_offset;
326 326 int bios_size, isa_bios_size;
327   -
  327 + PCIBus *pci_bus;
  328 +
328 329 linux_boot = (kernel_filename != NULL);
329 330  
330 331 /* allocate RAM */
... ... @@ -432,8 +433,10 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
432 433 }
433 434  
434 435 if (pci_enabled) {
435   - i440fx_init();
436   - piix3_init();
  436 + pci_bus = i440fx_init();
  437 + piix3_init(pci_bus);
  438 + } else {
  439 + pci_bus = NULL;
437 440 }
438 441  
439 442 /* init basic PC hardware */
... ... @@ -443,15 +446,16 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
443 446  
444 447 if (cirrus_vga_enabled) {
445 448 if (pci_enabled) {
446   - pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
  449 + pci_cirrus_vga_init(pci_bus,
  450 + ds, phys_ram_base + ram_size, ram_size,
447 451 vga_ram_size);
448 452 } else {
449 453 isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
450 454 vga_ram_size);
451 455 }
452 456 } else {
453   - vga_initialize(ds, phys_ram_base + ram_size, ram_size,
454   - vga_ram_size, pci_enabled);
  457 + vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
  458 + vga_ram_size);
455 459 }
456 460  
457 461 rtc_state = rtc_init(0x70, 8);
... ... @@ -469,9 +473,9 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
469 473  
470 474 if (pci_enabled) {
471 475 for(i = 0; i < nb_nics; i++) {
472   - pci_ne2000_init(&nd_table[i]);
  476 + pci_ne2000_init(pci_bus, &nd_table[i]);
473 477 }
474   - pci_piix3_ide_init(bs_table);
  478 + pci_piix3_ide_init(pci_bus, bs_table);
475 479 } else {
476 480 nb_nics1 = nb_nics;
477 481 if (nb_nics1 > NE2000_NB_MAX)
... ...
hw/ppc_chrp.c
  View file @46e50e9
... ... @@ -89,13 +89,12 @@ static void macio_map(PCIDevice *pci_dev, int region_num,
89 89 cpu_register_physical_memory(addr + 0x20000, 0x1000, ide1_mem_index);
90 90 }
91 91  
92   -static void macio_init(void)
  92 +static void macio_init(PCIBus *bus)
93 93 {
94 94 PCIDevice *d;
95 95  
96   - d = pci_register_device("macio", sizeof(PCIDevice),
97   - 0, -1,
98   - NULL, NULL);
  96 + d = pci_register_device(bus, "macio", sizeof(PCIDevice),
  97 + -1, NULL, NULL);
99 98 /* Note: this code is strongly inspirated from the corresponding code
100 99 in PearPC */
101 100 d->config[0x00] = 0x6b; // vendor_id
... ... @@ -128,7 +127,8 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
128 127 int ret, linux_boot, i, fd;
129 128 unsigned long bios_offset;
130 129 uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
131   -
  130 + PCIBus *pci_bus;
  131 +
132 132 linux_boot = (kernel_filename != NULL);
133 133  
134 134 /* allocate RAM */
... ... @@ -182,17 +182,18 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
182 182 cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
183 183  
184 184 isa_mem_base = 0x80000000;
185   - pci_pmac_init();
  185 + pci_bus = pci_pmac_init();
186 186  
187 187 /* Register 8 MB of ISA IO space */
188 188 PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
189 189 cpu_register_physical_memory(0xF2000000, 0x00800000, PPC_io_memory);
190 190  
191 191 /* init basic PC hardware */
192   - vga_initialize(ds, phys_ram_base + ram_size, ram_size,
193   - vga_ram_size, 1);
194   - openpic = openpic_init(0x00000000, 0xF0000000, 1);
195   -
  192 + vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
  193 + vga_ram_size);
  194 + openpic = openpic_init(pci_bus, 0x00000000, 0xF0000000, 1);
  195 + pci_pmac_set_openpic(pci_bus, openpic);
  196 +
196 197 /* XXX: suppress that */
197 198 pic_init();
198 199  
... ... @@ -201,7 +202,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
201 202 serial_init(0x3f8, 4, fd);
202 203  
203 204 for(i = 0; i < nb_nics; i++) {
204   - pci_ne2000_init(&nd_table[i]);
  205 + pci_ne2000_init(pci_bus, &nd_table[i]);
205 206 }
206 207  
207 208 ide0_mem_index = pmac_ide_init(&bs_table[0], openpic, 0x13);
... ... @@ -213,7 +214,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
213 214 adb_kbd_init(&adb_bus);
214 215 adb_mouse_init(&adb_bus);
215 216  
216   - macio_init();
  217 + macio_init(pci_bus);
217 218  
218 219 nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE);
219 220  
... ...
hw/ppc_prep.c
  View file @46e50e9
... ... @@ -418,6 +418,7 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
418 418 int ret, linux_boot, i, nb_nics1, fd;
419 419 unsigned long bios_offset;
420 420 uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
  421 + PCIBus *pci_bus;
421 422  
422 423 sysctrl = qemu_mallocz(sizeof(sysctrl_t));
423 424 if (sysctrl == NULL)
... ... @@ -477,14 +478,14 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
477 478 cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
478 479  
479 480 isa_mem_base = 0xc0000000;
480   - pci_prep_init();
  481 + pci_bus = pci_prep_init();
481 482 /* Register 64 KB of ISA IO space */
482 483 PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
483 484 cpu_register_physical_memory(0x80000000, 0x00010000, PPC_io_memory);
484 485  
485 486 /* init basic PC hardware */
486   - vga_initialize(ds, phys_ram_base + ram_size, ram_size,
487   - vga_ram_size, 1);
  487 + vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
  488 + vga_ram_size);
488 489 rtc_init(0x70, 8);
489 490 // openpic = openpic_init(0x00000000, 0xF0000000, 1);
490 491 // pic_init(openpic);
... ... @@ -545,6 +546,4 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
545 546 /* XXX: need an option to load a NVRAM image */
546 547 0,
547 548 graphic_width, graphic_height, graphic_depth);
548   -
549   - pci_ppc_bios_init();
550 549 }
... ...
hw/vga.c
  View file @46e50e9
... ... @@ -1747,9 +1747,8 @@ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
1747 1747 }
1748 1748  
1749 1749  
1750   -int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
1751   - unsigned long vga_ram_offset, int vga_ram_size,
1752   - int is_pci)
  1750 +int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
  1751 + unsigned long vga_ram_offset, int vga_ram_size)
1753 1752 {
1754 1753 VGAState *s;
1755 1754  
... ... @@ -1805,14 +1804,13 @@ int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
1805 1804 cpu_register_physical_memory(isa_mem_base + 0x000a0000, 0x20000,
1806 1805 vga_io_memory);
1807 1806  
1808   - if (is_pci) {
  1807 + if (bus) {
1809 1808 PCIDevice *d;
1810 1809 uint8_t *pci_conf;
1811 1810  
1812   - d = pci_register_device("VGA",
  1811 + d = pci_register_device(bus, "VGA",
1813 1812 sizeof(PCIDevice),
1814   - 0, -1,
1815   - NULL, NULL);
  1813 + -1, NULL, NULL);
1816 1814 pci_conf = d->config;
1817 1815 pci_conf[0x00] = 0x34; // dummy VGA (same as Bochs ID)
1818 1816 pci_conf[0x01] = 0x12;
... ...
... ... @@ -457,6 +457,7 @@ extern int pci_enabled;
457 457  
458 458 extern target_phys_addr_t pci_mem_base;
459 459  
  460 +typedef struct PCIBus PCIBus;
460 461 typedef struct PCIDevice PCIDevice;
461 462  
462 463 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
... ... @@ -484,7 +485,7 @@ struct PCIDevice {
484 485 uint8_t config[256];
485 486  
486 487 /* the following fields are read only */
487   - int bus_num;
  488 + PCIBus *bus;
488 489 int devfn;
489 490 char name[64];
490 491 PCIIORegion io_regions[PCI_NUM_REGIONS];
... ... @@ -495,8 +496,8 @@ struct PCIDevice {
495 496 int irq_index;
496 497 };
497 498  
498   -PCIDevice *pci_register_device(const char *name, int instance_size,
499   - int bus_num, int devfn,
  499 +PCIDevice *pci_register_device(PCIBus *bus, const char *name,
  500 + int instance_size, int devfn,
500 501 PCIConfigReadFunc *config_read,
501 502 PCIConfigWriteFunc *config_write);
502 503  
... ... @@ -513,20 +514,22 @@ void pci_default_write_config(PCIDevice *d,
513 514  
514 515 extern struct PIIX3State *piix3_state;
515 516  
516   -void i440fx_init(void);
517   -void piix3_init(void);
  517 +PCIBus *i440fx_init(void);
  518 +void piix3_init(PCIBus *bus);
518 519 void pci_bios_init(void);
519 520 void pci_info(void);
520 521  
521 522 /* temporary: will be moved in platform specific file */
522   -void pci_prep_init(void);
523   -void pci_pmac_init(void);
524   -void pci_ppc_bios_init(void);
  523 +PCIBus *pci_prep_init(void);
  524 +struct openpic_t;
  525 +void pci_pmac_set_openpic(PCIBus *bus, struct openpic_t *openpic);
  526 +PCIBus *pci_pmac_init(void);
525 527  
526 528 /* openpic.c */
527 529 typedef struct openpic_t openpic_t;
528 530 void openpic_set_irq (openpic_t *opp, int n_IRQ, int level);
529   -openpic_t *openpic_init (uint32_t isu_base, uint32_t idu_base, int nb_cpus);
  531 +openpic_t *openpic_init (PCIBus *bus,
  532 + uint32_t isu_base, uint32_t idu_base, int nb_cpus);
530 533  
531 534 /* vga.c */
532 535  
... ... @@ -551,17 +554,15 @@ static inline void dpy_resize(DisplayState *s, int w, int h)
551 554 s->dpy_resize(s, w, h);
552 555 }
553 556  
554   -int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
555   - unsigned long vga_ram_offset, int vga_ram_size,
556   - int is_pci);
  557 +int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
  558 + unsigned long vga_ram_offset, int vga_ram_size);
557 559 void vga_update_display(void);
558 560 void vga_invalidate_display(void);
559 561 void vga_screen_dump(const char *filename);
560 562  
561 563 /* cirrus_vga.c */
562   -void pci_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
  564 +void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
563 565 unsigned long vga_ram_offset, int vga_ram_size);
564   -
565 566 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
566 567 unsigned long vga_ram_offset, int vga_ram_size);
567 568  
... ... @@ -575,8 +576,8 @@ extern BlockDriverState *bs_table[MAX_DISKS];
575 576  
576 577 void isa_ide_init(int iobase, int iobase2, int irq,
577 578 BlockDriverState *hd0, BlockDriverState *hd1);
578   -void pci_ide_init(BlockDriverState **hd_table);
579   -void pci_piix3_ide_init(BlockDriverState **hd_table);
  579 +void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table);
  580 +void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
580 581 int pmac_ide_init (BlockDriverState **hd_table,
581 582 openpic_t *openpic, int irq);
582 583  
... ... @@ -627,7 +628,7 @@ int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
627 628 /* ne2000.c */
628 629  
629 630 void isa_ne2000_init(int base, int irq, NetDriverState *nd);
630   -void pci_ne2000_init(NetDriverState *nd);
  631 +void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
631 632  
632 633 /* pckbd.c */
633 634  
... ...