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/*
* gdb server stub
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authored
18 years ago
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*
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* Copyright ( c ) 2003 - 2005 Fabrice Bellard
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*
* This library is free software ; you can redistribute it and / or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation ; either
* version 2 of the License , or ( at your option ) any later version .
*
* This library is distributed in the hope that it will be useful ,
* but WITHOUT ANY WARRANTY ; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE . See the GNU
* Lesser General Public License for more details .
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library ; if not , write to the Free Software
* Foundation , Inc ., 59 Temple Place , Suite 330 , Boston , MA 02111 - 1307 USA
*/
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# include "config.h"
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# include "qemu-common.h"
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# ifdef CONFIG_USER_ONLY
# include < stdlib . h >
# include < stdio . h >
# include < stdarg . h >
# include < string . h >
# include < errno . h >
# include < unistd . h >
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# include < fcntl . h >
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# include "qemu.h"
# else
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# include "qemu-char.h"
# include "sysemu.h"
# include "gdbstub.h"
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# endif
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# define MAX_PACKET_LENGTH 4096
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# include "qemu_socket.h"
# ifdef _WIN32
/* XXX: these constants may be independent of the host ones even for Unix */
# ifndef SIGTRAP
# define SIGTRAP 5
# endif
# ifndef SIGINT
# define SIGINT 2
# endif
# else
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# include < signal . h >
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# endif
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// # define DEBUG_GDB
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typedef struct GDBRegisterState {
int base_reg ;
int num_regs ;
gdb_reg_cb get_reg ;
gdb_reg_cb set_reg ;
const char * xml ;
struct GDBRegisterState * next ;
} GDBRegisterState ;
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enum RSState {
RS_IDLE ,
RS_GETLINE ,
RS_CHKSUM1 ,
RS_CHKSUM2 ,
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RS_SYSCALL ,
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};
typedef struct GDBState {
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CPUState * env ; /* current CPU */
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enum RSState state ; /* parsing state */
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char line_buf [ MAX_PACKET_LENGTH ];
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int line_buf_index ;
int line_csum ;
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uint8_t last_packet [ MAX_PACKET_LENGTH + 4 ];
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int last_packet_len ;
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int signal ;
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# ifdef CONFIG_USER_ONLY
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int fd ;
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int running_state ;
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# else
CharDriverState * chr ;
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# endif
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} GDBState ;
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/* By default use no IRQs and no timers while single stepping so as to
* make single stepping like an ICE HW step .
*/
static int sstep_flags = SSTEP_ENABLE | SSTEP_NOIRQ | SSTEP_NOTIMER ;
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/* This is an ugly hack to cope with both new and old gdb .
If gdb sends qXfer : features : read then assume we ' re talking to a newish
gdb that understands target descriptions . */
static int gdb_has_xml ;
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# ifdef CONFIG_USER_ONLY
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/* XXX: This is not thread safe. Do we care? */
static int gdbserver_fd = - 1 ;
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/* XXX: remove this hack. */
static GDBState gdbserver_state ;
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static int get_char ( GDBState * s )
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{
uint8_t ch ;
int ret ;
for (;;) {
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ret = recv ( s -> fd , & ch , 1 , 0 );
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if ( ret < 0 ) {
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if ( errno == ECONNRESET )
s -> fd = - 1 ;
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if ( errno != EINTR && errno != EAGAIN )
return - 1 ;
} else if ( ret == 0 ) {
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close ( s -> fd );
s -> fd = - 1 ;
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return - 1 ;
} else {
break ;
}
}
return ch ;
}
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# endif
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/* GDB stub state for use by semihosting syscalls. */
static GDBState * gdb_syscall_state ;
static gdb_syscall_complete_cb gdb_current_syscall_cb ;
enum {
GDB_SYS_UNKNOWN ,
GDB_SYS_ENABLED ,
GDB_SYS_DISABLED ,
} gdb_syscall_mode ;
/* If gdb is connected when the first semihosting syscall occurs then use
remote gdb syscalls . Otherwise use native file IO . */
int use_gdb_syscalls ( void )
{
if ( gdb_syscall_mode == GDB_SYS_UNKNOWN ) {
gdb_syscall_mode = ( gdb_syscall_state ? GDB_SYS_ENABLED
: GDB_SYS_DISABLED );
}
return gdb_syscall_mode == GDB_SYS_ENABLED ;
}
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/* Resume execution. */
static inline void gdb_continue ( GDBState * s )
{
# ifdef CONFIG_USER_ONLY
s -> running_state = 1 ;
# else
vm_start ();
# endif
}
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static void put_buffer ( GDBState * s , const uint8_t * buf , int len )
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{
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# ifdef CONFIG_USER_ONLY
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int ret ;
while ( len > 0 ) {
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ret = send ( s -> fd , buf , len , 0 );
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if ( ret < 0 ) {
if ( errno != EINTR && errno != EAGAIN )
return ;
} else {
buf += ret ;
len -= ret ;
}
}
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# else
qemu_chr_write ( s -> chr , buf , len );
# endif
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}
static inline int fromhex ( int v )
{
if ( v >= '0' && v <= '9' )
return v - '0' ;
else if ( v >= 'A' && v <= 'F' )
return v - 'A' + 10 ;
else if ( v >= 'a' && v <= 'f' )
return v - 'a' + 10 ;
else
return 0 ;
}
static inline int tohex ( int v )
{
if ( v < 10 )
return v + '0' ;
else
return v - 10 + 'a' ;
}
static void memtohex ( char * buf , const uint8_t * mem , int len )
{
int i , c ;
char * q ;
q = buf ;
for ( i = 0 ; i < len ; i ++ ) {
c = mem [ i ];
* q ++ = tohex ( c >> 4 );
* q ++ = tohex ( c & 0xf );
}
* q = '\0' ;
}
static void hextomem ( uint8_t * mem , const char * buf , int len )
{
int i ;
for ( i = 0 ; i < len ; i ++ ) {
mem [ i ] = ( fromhex ( buf [ 0 ]) << 4 ) | fromhex ( buf [ 1 ]);
buf += 2 ;
}
}
/* return -1 if error, 0 if OK */
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static int put_packet_binary ( GDBState * s , const char * buf , int len )
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{
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int csum , i ;
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uint8_t * p ;
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for (;;) {
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p = s -> last_packet ;
* ( p ++ ) = '$' ;
memcpy ( p , buf , len );
p += len ;
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csum = 0 ;
for ( i = 0 ; i < len ; i ++ ) {
csum += buf [ i ];
}
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* ( p ++ ) = '#' ;
* ( p ++ ) = tohex (( csum >> 4 ) & 0xf );
* ( p ++ ) = tohex (( csum ) & 0xf );
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s -> last_packet_len = p - s -> last_packet ;
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put_buffer ( s , ( uint8_t * ) s -> last_packet , s -> last_packet_len );
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# ifdef CONFIG_USER_ONLY
i = get_char ( s );
if ( i < 0 )
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return - 1 ;
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if ( i == '+' )
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break ;
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# else
break ;
# endif
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}
return 0 ;
}
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/* return -1 if error, 0 if OK */
static int put_packet ( GDBState * s , const char * buf )
{
# ifdef DEBUG_GDB
printf ( "reply='%s' \n " , buf );
# endif
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return put_packet_binary ( s , buf , strlen ( buf ));
}
/* The GDB remote protocol transfers values in target byte order . This means
we can use the raw memory access routines to access the value buffer .
Conveniently , these also handle the case where the buffer is mis - aligned .
*/
# define GET_REG8 ( val ) do { \
stb_p ( mem_buf , val ) ; \
return 1 ; \
} while ( 0 )
# define GET_REG16 ( val ) do { \
stw_p ( mem_buf , val ) ; \
return 2 ; \
} while ( 0 )
# define GET_REG32 ( val ) do { \
stl_p ( mem_buf , val ) ; \
return 4 ; \
} while ( 0 )
# define GET_REG64 ( val ) do { \
stq_p ( mem_buf , val ) ; \
return 8 ; \
} while ( 0 )
# if TARGET_LONG_BITS == 64
# define GET_REGL ( val ) GET_REG64 ( val )
# define ldtul_p ( addr ) ldq_p ( addr )
# else
# define GET_REGL ( val ) GET_REG32 ( val )
# define ldtul_p ( addr ) ldl_p ( addr )
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# endif
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# if defined ( TARGET_I386 )
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# ifdef TARGET_X86_64
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static const int gpr_map [ 16 ] = {
R_EAX , R_EBX , R_ECX , R_EDX , R_ESI , R_EDI , R_EBP , R_ESP ,
8 , 9 , 10 , 11 , 12 , 13 , 14 , 15
};
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# else
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static const int gpr_map [ 8 ] = { 0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 };
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# endif
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# define NUM_CORE_REGS ( CPU_NB_REGS * 2 + 25 )
static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
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{
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if ( n < CPU_NB_REGS ) {
GET_REGL ( env -> regs [ gpr_map [ n ]]) ;
} else if ( n >= CPU_NB_REGS + 8 && n < CPU_NB_REGS + 16 ) {
/* FIXME: byteswap float values. */
# ifdef USE_X86LDOUBLE
memcpy ( mem_buf , & env -> fpregs [ n - ( CPU_NB_REGS + 8 )], 10 ) ;
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# else
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memset ( mem_buf , 0 , 10 ) ;
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# endif
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return 10 ;
} else if ( n >= CPU_NB_REGS + 24 ) {
n -= CPU_NB_REGS + 24 ;
if ( n < CPU_NB_REGS ) {
stq_p ( mem_buf , env -> xmm_regs [ n ]. XMM_Q ( 0 )) ;
stq_p ( mem_buf + 8 , env -> xmm_regs [ n ]. XMM_Q ( 1 )) ;
return 16 ;
} else if ( n == CPU_NB_REGS ) {
GET_REG32 ( env -> mxcsr ) ;
}
} else {
n -= CPU_NB_REGS ;
switch ( n ) {
case 0 : GET_REGL ( env -> eip ) ;
case 1 : GET_REG32 ( env -> eflags ) ;
case 2 : GET_REG32 ( env -> segs [ R_CS ]. selector ) ;
case 3 : GET_REG32 ( env -> segs [ R_SS ]. selector ) ;
case 4 : GET_REG32 ( env -> segs [ R_DS ]. selector ) ;
case 5 : GET_REG32 ( env -> segs [ R_ES ]. selector ) ;
case 6 : GET_REG32 ( env -> segs [ R_FS ]. selector ) ;
case 7 : GET_REG32 ( env -> segs [ R_GS ]. selector ) ;
/* 8...15 x87 regs. */
case 16 : GET_REG32 ( env -> fpuc ) ;
case 17 : GET_REG32 (( env -> fpus & ~ 0x3800 ) | ( env -> fpstt & 0x7 ) << 11 ) ;
case 18 : GET_REG32 ( 0 ) ; /* ftag */
case 19 : GET_REG32 ( 0 ) ; /* fiseg */
case 20 : GET_REG32 ( 0 ) ; /* fioff */
case 21 : GET_REG32 ( 0 ) ; /* foseg */
case 22 : GET_REG32 ( 0 ) ; /* fooff */
case 23 : GET_REG32 ( 0 ) ; /* fop */
/* 24+ xmm regs. */
}
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}
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return 0 ;
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}
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static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int i )
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{
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uint32_t tmp ;
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if ( i < CPU_NB_REGS ) {
env -> regs [ gpr_map [ i ]] = ldtul_p ( mem_buf ) ;
return sizeof ( target_ulong ) ;
} else if ( i >= CPU_NB_REGS + 8 && i < CPU_NB_REGS + 16 ) {
i -= CPU_NB_REGS + 8 ;
# ifdef USE_X86LDOUBLE
memcpy ( & env -> fpregs [ i ], mem_buf , 10 ) ;
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# endif
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return 10 ;
} else if ( i >= CPU_NB_REGS + 24 ) {
i -= CPU_NB_REGS + 24 ;
if ( i < CPU_NB_REGS ) {
env -> xmm_regs [ i ]. XMM_Q ( 0 ) = ldq_p ( mem_buf ) ;
env -> xmm_regs [ i ]. XMM_Q ( 1 ) = ldq_p ( mem_buf + 8 ) ;
return 16 ;
} else if ( i == CPU_NB_REGS ) {
env -> mxcsr = ldl_p ( mem_buf ) ;
return 4 ;
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}
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} else {
i -= CPU_NB_REGS ;
switch ( i ) {
case 0 : env -> eip = ldtul_p ( mem_buf ) ; return sizeof ( target_ulong ) ;
case 1 : env -> eflags = ldl_p ( mem_buf ) ; return 4 ;
# if defined ( CONFIG_USER_ONLY )
# define LOAD_SEG ( index , sreg ) \
tmp = ldl_p ( mem_buf ) ;\
if ( tmp != env -> segs [ sreg ]. selector ) \
cpu_x86_load_seg ( env , sreg , tmp ) ;
# else
/* FIXME : Honor segment registers . Needs to avoid raising an exception
when the selector is invalid . */
# define LOAD_SEG ( index , sreg ) do {} while ( 0 )
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# endif
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case 2 : LOAD_SEG ( 10 , R_CS ); return 4 ;
case 3 : LOAD_SEG ( 11 , R_SS ); return 4 ;
case 4 : LOAD_SEG ( 12 , R_DS ); return 4 ;
case 5 : LOAD_SEG ( 13 , R_ES ); return 4 ;
case 6 : LOAD_SEG ( 14 , R_FS ); return 4 ;
case 7 : LOAD_SEG ( 15 , R_GS ); return 4 ;
/* 8...15 x87 regs. */
case 16 : env -> fpuc = ldl_p ( mem_buf ); return 4 ;
case 17 :
tmp = ldl_p ( mem_buf );
env -> fpstt = ( tmp >> 11 ) & 7 ;
env -> fpus = tmp & ~ 0x3800 ;
return 4 ;
case 18 : /* ftag */ return 4 ;
case 19 : /* fiseg */ return 4 ;
case 20 : /* fioff */ return 4 ;
case 21 : /* foseg */ return 4 ;
case 22 : /* fooff */ return 4 ;
case 23 : /* fop */ return 4 ;
/* 24+ xmm regs. */
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}
}
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/* Unrecognised register. */
return 0 ;
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}
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# elif defined ( TARGET_PPC )
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# define NUM_CORE_REGS 71
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static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
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{
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if ( n < 32 ) {
/* gprs */
GET_REGL ( env -> gpr [ n ]);
} else if ( n < 64 ) {
/* fprs */
stfq_p ( mem_buf , env -> fpr [ n ]);
return 8 ;
} else {
switch ( n ) {
case 64 : GET_REGL ( env -> nip );
case 65 : GET_REGL ( env -> msr );
case 66 :
{
uint32_t cr = 0 ;
int i ;
for ( i = 0 ; i < 8 ; i ++ )
cr |= env -> crf [ i ] << ( 32 - (( i + 1 ) * 4 ));
GET_REG32 ( cr );
}
case 67 : GET_REGL ( env -> lr );
case 68 : GET_REGL ( env -> ctr );
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case 69 : GET_REGL ( env -> xer );
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case 70 : GET_REG32 ( 0 ); /* fpscr */
}
}
return 0 ;
}
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static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int n )
{
if ( n < 32 ) {
/* gprs */
env -> gpr [ n ] = ldtul_p ( mem_buf );
return sizeof ( target_ulong );
} else if ( n < 64 ) {
/* fprs */
env -> fpr [ n ] = ldfq_p ( mem_buf );
return 8 ;
} else {
switch ( n ) {
case 64 :
env -> nip = ldtul_p ( mem_buf );
return sizeof ( target_ulong );
case 65 :
ppc_store_msr ( env , ldtul_p ( mem_buf ));
return sizeof ( target_ulong );
case 66 :
{
uint32_t cr = ldl_p ( mem_buf );
int i ;
for ( i = 0 ; i < 8 ; i ++ )
env -> crf [ i ] = ( cr >> ( 32 - (( i + 1 ) * 4 ))) & 0xF ;
return 4 ;
}
case 67 :
env -> lr = ldtul_p ( mem_buf );
return sizeof ( target_ulong );
case 68 :
env -> ctr = ldtul_p ( mem_buf );
return sizeof ( target_ulong );
case 69 :
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env -> xer = ldtul_p ( mem_buf );
return sizeof ( target_ulong );
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case 70 :
/* fpscr */
return 4 ;
}
}
return 0 ;
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}
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# elif defined ( TARGET_SPARC )
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# if defined ( TARGET_SPARC64 ) && ! defined ( TARGET_ABI32 )
# define NUM_CORE_REGS 86
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# else
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# define NUM_CORE_REGS 73
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# endif
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# ifdef TARGET_ABI32
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# define GET_REGA ( val ) GET_REG32 ( val )
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# else
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# define GET_REGA ( val ) GET_REGL ( val )
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# endif
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static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
{
if ( n < 8 ) {
/* g0..g7 */
GET_REGA ( env -> gregs [ n ]);
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}
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if ( n < 32 ) {
/* register window */
GET_REGA ( env -> regwptr [ n - 8 ]);
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}
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# if defined ( TARGET_ABI32 ) || ! defined ( TARGET_SPARC64 )
if ( n < 64 ) {
/* fprs */
GET_REG32 ( * (( uint32_t * ) & env -> fpr [ n - 32 ]));
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}
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
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switch ( n ) {
case 64 : GET_REGA ( env -> y );
case 65 : GET_REGA ( GET_PSR ( env ));
case 66 : GET_REGA ( env -> wim );
case 67 : GET_REGA ( env -> tbr );
case 68 : GET_REGA ( env -> pc );
case 69 : GET_REGA ( env -> npc );
case 70 : GET_REGA ( env -> fsr );
case 71 : GET_REGA ( 0 ); /* csr */
case 72 : GET_REGA ( 0 );
}
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# else
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if ( n < 64 ) {
/* f0-f31 */
GET_REG32 ( * (( uint32_t * ) & env -> fpr [ n - 32 ]));
}
if ( n < 80 ) {
/* f32-f62 (double width, even numbers only) */
uint64_t val ;
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val = ( uint64_t ) * (( uint32_t * ) & env -> fpr [( n - 64 ) * 2 + 32 ]) << 32 ;
val |= * (( uint32_t * ) & env -> fpr [( n - 64 ) * 2 + 33 ]);
GET_REG64 ( val );
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}
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switch ( n ) {
case 80 : GET_REGL ( env -> pc );
case 81 : GET_REGL ( env -> npc );
case 82 : GET_REGL ((( uint64_t ) GET_CCR ( env ) << 32 ) |
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(( env -> asi & 0xff ) << 24 ) |
(( env -> pstate & 0xfff ) << 8 ) |
GET_CWP64 ( env ));
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case 83 : GET_REGL ( env -> fsr );
case 84 : GET_REGL ( env -> fprs );
case 85 : GET_REGL ( env -> y );
}
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# endif
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return 0 ;
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}
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static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int n )
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{
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# if defined ( TARGET_ABI32 )
abi_ulong tmp ;
tmp = ldl_p ( mem_buf );
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# else
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target_ulong tmp ;
tmp = ldtul_p ( mem_buf );
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# endif
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if ( n < 8 ) {
/* g0..g7 */
env -> gregs [ n ] = tmp ;
} else if ( n < 32 ) {
/* register window */
env -> regwptr [ n - 8 ] = tmp ;
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}
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# if defined ( TARGET_ABI32 ) || ! defined ( TARGET_SPARC64 )
else if ( n < 64 ) {
/* fprs */
* (( uint32_t * ) & env -> fpr [ n - 32 ]) = tmp ;
} else {
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
switch ( n ) {
case 64 : env -> y = tmp ; break ;
case 65 : PUT_PSR ( env , tmp ); break ;
case 66 : env -> wim = tmp ; break ;
case 67 : env -> tbr = tmp ; break ;
case 68 : env -> pc = tmp ; break ;
case 69 : env -> npc = tmp ; break ;
case 70 : env -> fsr = tmp ; break ;
default : return 0 ;
}
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}
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return 4 ;
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# else
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else if ( n < 64 ) {
/* f0-f31 */
env -> fpr [ n ] = ldfl_p ( mem_buf );
return 4 ;
} else if ( n < 80 ) {
/* f32-f62 (double width, even numbers only) */
* (( uint32_t * ) & env -> fpr [( n - 64 ) * 2 + 32 ]) = tmp >> 32 ;
* (( uint32_t * ) & env -> fpr [( n - 64 ) * 2 + 33 ]) = tmp ;
} else {
switch ( n ) {
case 80 : env -> pc = tmp ; break ;
case 81 : env -> npc = tmp ; break ;
case 82 :
PUT_CCR ( env , tmp >> 32 );
env -> asi = ( tmp >> 24 ) & 0xff ;
env -> pstate = ( tmp >> 8 ) & 0xfff ;
PUT_CWP64 ( env , tmp & 0xff );
break ;
case 83 : env -> fsr = tmp ; break ;
case 84 : env -> fprs = tmp ; break ;
case 85 : env -> y = tmp ; break ;
default : return 0 ;
}
628
}
629
return 8 ;
630
# endif
631
}
632
# elif defined ( TARGET_ARM )
633
634
635
636
637
638
639
640
/* Old gdb always expect FPA registers . Newer ( xml - aware ) gdb only expect
whatever the target description contains . Due to a historical mishap
the FPA registers appear in between core integer regs and the CPSR .
We hack round this by giving the FPA regs zero size when talking to a
newer gdb . */
# define NUM_CORE_REGS 26
# define GDB_CORE_XML "arm-core.xml"
641
642
static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
643
{
644
645
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647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
if ( n < 16 ) {
/* Core integer register. */
GET_REG32 ( env -> regs [ n ]);
}
if ( n < 24 ) {
/* FPA registers. */
if ( gdb_has_xml )
return 0 ;
memset ( mem_buf , 0 , 12 );
return 12 ;
}
switch ( n ) {
case 24 :
/* FPA status register. */
if ( gdb_has_xml )
return 0 ;
GET_REG32 ( 0 );
case 25 :
/* CPSR */
GET_REG32 ( cpsr_read ( env ));
}
/* Unknown register. */
return 0 ;
667
}
668
669
670
671
static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int n )
{
uint32_t tmp ;
672
673
tmp = ldl_p ( mem_buf );
674
675
676
677
678
/* Mask out low bit of PC to workaround gdb bugs . This will probably
cause problems if we ever implement the Jazelle DBX extensions . */
if ( n == 15 )
tmp &= ~ 1 ;
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
if ( n < 16 ) {
/* Core integer register. */
env -> regs [ n ] = tmp ;
return 4 ;
}
if ( n < 24 ) { /* 16-23 */
/* FPA registers (ignored). */
if ( gdb_has_xml )
return 0 ;
return 12 ;
}
switch ( n ) {
case 24 :
/* FPA status register (ignored). */
if ( gdb_has_xml )
return 0 ;
return 4 ;
case 25 :
/* CPSR */
cpsr_write ( env , tmp , 0xffffffff );
return 4 ;
}
/* Unknown register. */
return 0 ;
}
705
706
# elif defined ( TARGET_M68K )
707
708
# define NUM_CORE_REGS 18
709
710
# define GDB_CORE_XML "cf-core.xml"
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
{
if ( n < 8 ) {
/* D0-D7 */
GET_REG32 ( env -> dregs [ n ]);
} else if ( n < 16 ) {
/* A0-A7 */
GET_REG32 ( env -> aregs [ n - 8 ]);
} else {
switch ( n ) {
case 16 : GET_REG32 ( env -> sr );
case 17 : GET_REG32 ( env -> pc );
}
}
/* FP registers not included here because they vary between
ColdFire and m68k . Use XML bits for these . */
return 0 ;
}
ths
authored
18 years ago
730
731
732
733
static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int n )
{
uint32_t tmp ;
ths
authored
18 years ago
734
735
tmp = ldl_p ( mem_buf );
ths
authored
18 years ago
736
737
738
739
740
741
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743
744
745
746
747
748
749
750
751
752
if ( n < 8 ) {
/* D0-D7 */
env -> dregs [ n ] = tmp ;
} else if ( n < 8 ) {
/* A0-A7 */
env -> aregs [ n - 8 ] = tmp ;
} else {
switch ( n ) {
case 16 : env -> sr = tmp ; break ;
case 17 : env -> pc = tmp ; break ;
default : return 0 ;
}
}
return 4 ;
}
# elif defined ( TARGET_MIPS )
ths
authored
17 years ago
753
754
# define NUM_CORE_REGS 73
ths
authored
17 years ago
755
756
757
758
759
760
761
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764
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775
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777
778
779
780
781
782
783
784
785
786
static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
{
if ( n < 32 ) {
GET_REGL ( env -> active_tc . gpr [ n ]);
}
if ( env -> CP0_Config1 & ( 1 << CP0C1_FP )) {
if ( n >= 38 && n < 70 ) {
if ( env -> CP0_Status & ( 1 << CP0St_FR ))
GET_REGL ( env -> active_fpu . fpr [ n - 38 ]. d );
else
GET_REGL ( env -> active_fpu . fpr [ n - 38 ]. w [ FP_ENDIAN_IDX ]);
}
switch ( n ) {
case 70 : GET_REGL (( int32_t ) env -> active_fpu . fcr31 );
case 71 : GET_REGL (( int32_t ) env -> active_fpu . fcr0 );
}
}
switch ( n ) {
case 32 : GET_REGL (( int32_t ) env -> CP0_Status );
case 33 : GET_REGL ( env -> active_tc . LO [ 0 ]);
case 34 : GET_REGL ( env -> active_tc . HI [ 0 ]);
case 35 : GET_REGL ( env -> CP0_BadVAddr );
case 36 : GET_REGL (( int32_t ) env -> CP0_Cause );
case 37 : GET_REGL ( env -> active_tc . PC );
case 72 : GET_REGL ( 0 ); /* fp */
case 89 : GET_REGL (( int32_t ) env -> CP0_PRid );
}
if ( n >= 73 && n <= 88 ) {
/* 16 embedded regs. */
GET_REGL ( 0 );
}
787
788
return 0 ;
789
790
}
ths
authored
18 years ago
791
792
793
794
795
796
797
798
799
/* convert MIPS rounding mode in FCR31 to IEEE library */
static unsigned int ieee_rm [] =
{
float_round_nearest_even ,
float_round_to_zero ,
float_round_up ,
float_round_down
};
# define RESTORE_ROUNDING_MODE \
ths
authored
17 years ago
800
set_float_rounding_mode ( ieee_rm [ env -> active_fpu . fcr31 & 3 ], & env -> active_fpu . fp_status )
ths
authored
18 years ago
801
802
static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int n )
803
{
804
target_ulong tmp ;
805
806
tmp = ldtul_p ( mem_buf );
807
808
809
810
811
812
813
814
if ( n < 32 ) {
env -> active_tc . gpr [ n ] = tmp ;
return sizeof ( target_ulong );
}
if ( env -> CP0_Config1 & ( 1 << CP0C1_FP )
&& n >= 38 && n < 73 ) {
if ( n < 70 ) {
ths
authored
17 years ago
815
if ( env -> CP0_Status & ( 1 << CP0St_FR ))
816
env -> active_fpu . fpr [ n - 38 ]. d = tmp ;
ths
authored
17 years ago
817
else
818
819
820
821
822
823
824
env -> active_fpu . fpr [ n - 38 ]. w [ FP_ENDIAN_IDX ] = tmp ;
}
switch ( n ) {
case 70 :
env -> active_fpu . fcr31 = tmp & 0xFF83FFFF ;
/* set rounding mode */
RESTORE_ROUNDING_MODE ;
ths
authored
18 years ago
825
# ifndef CONFIG_SOFTFLOAT
826
827
/* no floating point exception for native float */
SET_FP_ENABLE ( env -> active_fpu . fcr31 , 0 );
ths
authored
18 years ago
828
# endif
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
break ;
case 71 : env -> active_fpu . fcr0 = tmp ; break ;
}
return sizeof ( target_ulong );
}
switch ( n ) {
case 32 : env -> CP0_Status = tmp ; break ;
case 33 : env -> active_tc . LO [ 0 ] = tmp ; break ;
case 34 : env -> active_tc . HI [ 0 ] = tmp ; break ;
case 35 : env -> CP0_BadVAddr = tmp ; break ;
case 36 : env -> CP0_Cause = tmp ; break ;
case 37 : env -> active_tc . PC = tmp ; break ;
case 72 : /* fp, ignored */ break ;
default :
if ( n > 89 )
return 0 ;
/* Other registers are readonly. Ignore writes. */
break ;
}
return sizeof ( target_ulong );
850
}
851
# elif defined ( TARGET_SH4 )
ths
authored
18 years ago
852
853
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
854
855
856
/* FIXME: We should use XML for this. */
# define NUM_CORE_REGS 59
ths
authored
18 years ago
857
858
static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
859
{
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
if ( n < 8 ) {
if (( env -> sr & ( SR_MD | SR_RB )) == ( SR_MD | SR_RB )) {
GET_REGL ( env -> gregs [ n + 16 ]);
} else {
GET_REGL ( env -> gregs [ n ]);
}
} else if ( n < 16 ) {
GET_REGL ( env -> gregs [ n - 8 ]);
} else if ( n >= 25 && n < 41 ) {
GET_REGL ( env -> fregs [( n - 25 ) + (( env -> fpscr & FPSCR_FR ) ? 16 : 0 )]);
} else if ( n >= 43 && n < 51 ) {
GET_REGL ( env -> gregs [ n - 43 ]);
} else if ( n >= 51 && n < 59 ) {
GET_REGL ( env -> gregs [ n - ( 51 - 16 )]);
}
switch ( n ) {
case 16 : GET_REGL ( env -> pc );
case 17 : GET_REGL ( env -> pr );
case 18 : GET_REGL ( env -> gbr );
case 19 : GET_REGL ( env -> vbr );
case 20 : GET_REGL ( env -> mach );
case 21 : GET_REGL ( env -> macl );
case 22 : GET_REGL ( env -> sr );
case 23 : GET_REGL ( env -> fpul );
case 24 : GET_REGL ( env -> fpscr );
case 41 : GET_REGL ( env -> ssr );
case 42 : GET_REGL ( env -> spc );
}
return 0 ;
890
891
}
892
static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int n )
893
{
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
uint32_t tmp ;
tmp = ldl_p ( mem_buf );
if ( n < 8 ) {
if (( env -> sr & ( SR_MD | SR_RB )) == ( SR_MD | SR_RB )) {
env -> gregs [ n + 16 ] = tmp ;
} else {
env -> gregs [ n ] = tmp ;
}
return 4 ;
} else if ( n < 16 ) {
env -> gregs [ n - 8 ] = tmp ;
return 4 ;
} else if ( n >= 25 && n < 41 ) {
env -> fregs [( n - 25 ) + (( env -> fpscr & FPSCR_FR ) ? 16 : 0 )] = tmp ;
} else if ( n >= 43 && n < 51 ) {
env -> gregs [ n - 43 ] = tmp ;
return 4 ;
} else if ( n >= 51 && n < 59 ) {
env -> gregs [ n - ( 51 - 16 )] = tmp ;
return 4 ;
}
switch ( n ) {
case 16 : env -> pc = tmp ;
case 17 : env -> pr = tmp ;
case 18 : env -> gbr = tmp ;
case 19 : env -> vbr = tmp ;
case 20 : env -> mach = tmp ;
case 21 : env -> macl = tmp ;
case 22 : env -> sr = tmp ;
case 23 : env -> fpul = tmp ;
case 24 : env -> fpscr = tmp ;
case 41 : env -> ssr = tmp ;
case 42 : env -> spc = tmp ;
default : return 0 ;
}
return 4 ;
933
}
ths
authored
17 years ago
934
935
# elif defined ( TARGET_CRIS )
936
937
938
# define NUM_CORE_REGS 49
static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
ths
authored
17 years ago
939
{
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
uint8_t srs ;
srs = env -> pregs [ PR_SRS ];
if ( n < 16 ) {
GET_REG32 ( env -> regs [ n ]);
}
if ( n >= 21 && n < 32 ) {
GET_REG32 ( env -> pregs [ n - 16 ]);
}
if ( n >= 33 && n < 49 ) {
GET_REG32 ( env -> sregs [ srs ][ n - 33 ]);
}
switch ( n ) {
case 16 : GET_REG8 ( env -> pregs [ 0 ]);
case 17 : GET_REG8 ( env -> pregs [ 1 ]);
case 18 : GET_REG32 ( env -> pregs [ 2 ]);
case 19 : GET_REG8 ( srs );
case 20 : GET_REG16 ( env -> pregs [ 4 ]);
case 32 : GET_REG32 ( env -> pc );
}
return 0 ;
ths
authored
17 years ago
963
}
964
965
static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int n )
ths
authored
17 years ago
966
{
967
968
969
970
971
972
973
974
975
976
977
uint32_t tmp ;
if ( n > 49 )
return 0 ;
tmp = ldl_p ( mem_buf );
if ( n < 16 ) {
env -> regs [ n ] = tmp ;
}
978
979
980
981
982
if ( n >= 21 && n < 32 ) {
env -> pregs [ n - 16 ] = tmp ;
}
/* FIXME: Should support function regs be writable? */
983
984
985
switch ( n ) {
case 16 : return 1 ;
case 17 : return 1 ;
986
case 18 : env -> pregs [ PR_PID ] = tmp ; break ;
987
988
989
990
991
992
case 19 : return 1 ;
case 20 : return 2 ;
case 32 : env -> pc = tmp ; break ;
}
return 4 ;
ths
authored
17 years ago
993
}
994
995
996
997
998
# else
# define NUM_CORE_REGS 0
static int cpu_gdb_read_register ( CPUState * env , uint8_t * mem_buf , int n )
ths
authored
17 years ago
999
{
1000
return 0 ;
ths
authored
17 years ago
1001
1002
}
1003
static int cpu_gdb_write_register ( CPUState * env , uint8_t * mem_buf , int n )
ths
authored
17 years ago
1004
{
1005
1006
return 0 ;
}
ths
authored
17 years ago
1007
1008
# endif
ths
authored
17 years ago
1009
1010
static int num_g_regs = NUM_CORE_REGS ;
ths
authored
17 years ago
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
# ifdef GDB_CORE_XML
/* Encode data using the encoding for 'x' packets. */
static int memtox ( char * buf , const char * mem , int len )
{
char * p = buf ;
char c ;
while ( len -- ) {
c = * ( mem ++ );
switch ( c ) {
case '#' : case '$' : case '*' : case '}' :
* ( p ++ ) = '}' ;
* ( p ++ ) = c ^ 0x20 ;
break ;
default :
* ( p ++ ) = c ;
break ;
}
}
return p - buf ;
}
ths
authored
17 years ago
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
const char * get_feature_xml ( CPUState * env , const char * p , const char ** newp )
{
extern const char * const xml_builtin [][ 2 ];
size_t len ;
int i ;
const char * name ;
static char target_xml [ 1024 ];
len = 0 ;
while ( p [ len ] && p [ len ] != ':' )
len ++ ;
* newp = p + len ;
name = NULL ;
if ( strncmp ( p , "target.xml" , len ) == 0 ) {
/* Generate the XML description for this CPU. */
if ( ! target_xml [ 0 ]) {
GDBRegisterState * r ;
1053
1054
1055
1056
1057
1058
snprintf ( target_xml , sizeof ( target_xml ),
"<?xml version= \" 1.0 \" ?>"
"<!DOCTYPE target SYSTEM \" gdb-target.dtd \" >"
"<target>"
"<xi:include href= \" %s \" />" ,
GDB_CORE_XML );
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
for ( r = env -> gdb_regs ; r ; r = r -> next ) {
strcat ( target_xml , "<xi:include href= \" " );
strcat ( target_xml , r -> xml );
strcat ( target_xml , " \" />" );
}
strcat ( target_xml , "</target>" );
}
return target_xml ;
}
for ( i = 0 ; ; i ++ ) {
name = xml_builtin [ i ][ 0 ];
if ( ! name || ( strncmp ( name , p , len ) == 0 && strlen ( name ) == len ))
break ;
}
return name ? xml_builtin [ i ][ 1 ] : NULL ;
}
# endif
ths
authored
17 years ago
1077
1078
1079
1080
static int gdb_read_register ( CPUState * env , uint8_t * mem_buf , int reg )
{
GDBRegisterState * r ;
ths
authored
17 years ago
1081
1082
1083
if ( reg < NUM_CORE_REGS )
return cpu_gdb_read_register ( env , mem_buf , reg );
ths
authored
17 years ago
1084
1085
1086
1087
1088
1089
1090
for ( r = env -> gdb_regs ; r ; r = r -> next ) {
if ( r -> base_reg <= reg && reg < r -> base_reg + r -> num_regs ) {
return r -> get_reg ( env , mem_buf , reg - r -> base_reg );
}
}
return 0 ;
ths
authored
17 years ago
1091
1092
}
1093
static int gdb_write_register ( CPUState * env , uint8_t * mem_buf , int reg )
ths
authored
17 years ago
1094
{
1095
GDBRegisterState * r ;
ths
authored
17 years ago
1096
1097
1098
1099
1100
1101
1102
1103
1104
if ( reg < NUM_CORE_REGS )
return cpu_gdb_write_register ( env , mem_buf , reg );
for ( r = env -> gdb_regs ; r ; r = r -> next ) {
if ( r -> base_reg <= reg && reg < r -> base_reg + r -> num_regs ) {
return r -> set_reg ( env , mem_buf , reg - r -> base_reg );
}
}
1105
1106
1107
return 0 ;
}
1108
1109
1110
1111
1112
1113
1114
1115
1116
/* Register a supplemental set of CPU registers . If g_pos is nonzero it
specifies the first register number and these registers are included in
a standard "g" packet . Direction is relative to gdb , i . e . get_reg is
gdb reading a CPU register , and set_reg is gdb modifying a CPU register .
*/
void gdb_register_coprocessor ( CPUState * env ,
gdb_reg_cb get_reg , gdb_reg_cb set_reg ,
int num_regs , const char * xml , int g_pos )
1117
{
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
GDBRegisterState * s ;
GDBRegisterState ** p ;
static int last_reg = NUM_CORE_REGS ;
s = ( GDBRegisterState * ) qemu_mallocz ( sizeof ( GDBRegisterState ));
s -> base_reg = last_reg ;
s -> num_regs = num_regs ;
s -> get_reg = get_reg ;
s -> set_reg = set_reg ;
s -> xml = xml ;
p = & env -> gdb_regs ;
while ( * p ) {
/* Check for duplicates. */
if ( strcmp (( * p ) -> xml , xml ) == 0 )
return ;
p = & ( * p ) -> next ;
}
/* Add to end of list. */
last_reg += num_regs ;
* p = s ;
if ( g_pos ) {
if ( g_pos != s -> base_reg ) {
fprintf ( stderr , "Error: Bad gdb register numbering for '%s' \n "
"Expected %d got %d \n " , xml , g_pos , s -> base_reg );
} else {
num_g_regs = last_reg ;
}
}
1146
1147
}
1148
static int gdb_handle_packet ( GDBState * s , CPUState * env , const char * line_buf )
1149
1150
{
const char * p ;
1151
int ch , reg_size , type ;
1152
1153
1154
char buf [ MAX_PACKET_LENGTH ];
uint8_t mem_buf [ MAX_PACKET_LENGTH ];
uint8_t * registers ;
1155
target_ulong addr , len ;
ths
authored
18 years ago
1156
1157
1158
1159
1160
1161
1162
1163
# ifdef DEBUG_GDB
printf ( "command='%s' \n " , line_buf );
# endif
p = line_buf ;
ch = * p ++ ;
switch ( ch ) {
case '?' :
1164
/* TODO: Make this return the correct value for user-mode. */
1165
1166
snprintf ( buf , sizeof ( buf ), "S%02x" , SIGTRAP );
put_packet ( s , buf );
1167
1168
1169
1170
1171
1172
/* Remove all the breakpoints when this query is issued ,
* because gdb is doing and initial connect and the state
* should be cleaned up .
*/
cpu_breakpoint_remove_all ( env );
cpu_watchpoint_remove_all ( env );
1173
1174
1175
break ;
case 'c' :
if ( * p != '\0' ) {
1176
addr = strtoull ( p , ( char ** ) & p , 16 );
1177
# if defined ( TARGET_I386 )
1178
env -> eip = addr ;
1179
# elif defined ( TARGET_PPC )
1180
env -> nip = addr ;
1181
1182
1183
# elif defined ( TARGET_SPARC )
env -> pc = addr ;
env -> npc = addr + 4 ;
1184
1185
# elif defined ( TARGET_ARM )
env -> regs [ 15 ] = addr ;
1186
# elif defined ( TARGET_SH4 )
ths
authored
18 years ago
1187
1188
env -> pc = addr ;
# elif defined ( TARGET_MIPS )
ths
authored
17 years ago
1189
env -> active_tc . PC = addr ;
ths
authored
17 years ago
1190
1191
# elif defined ( TARGET_CRIS )
env -> pc = addr ;
1192
# endif
1193
}
1194
gdb_continue ( s );
1195
return RS_IDLE ;
1196
1197
1198
1199
case 'C' :
s -> signal = strtoul ( p , ( char ** ) & p , 16 );
gdb_continue ( s );
return RS_IDLE ;
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
case 'k' :
/* Kill the target */
fprintf ( stderr , " \n QEMU: Terminated via GDBstub \n " );
exit ( 0 );
case 'D' :
/* Detach packet */
cpu_breakpoint_remove_all ( env );
cpu_watchpoint_remove_all ( env );
gdb_continue ( s );
put_packet ( s , "OK" );
break ;
1211
1212
case 's' :
if ( * p != '\0' ) {
ths
authored
18 years ago
1213
addr = strtoull ( p , ( char ** ) & p , 16 );
1214
# if defined ( TARGET_I386 )
1215
env -> eip = addr ;
1216
# elif defined ( TARGET_PPC )
1217
env -> nip = addr ;
1218
1219
1220
# elif defined ( TARGET_SPARC )
env -> pc = addr ;
env -> npc = addr + 4 ;
1221
1222
# elif defined ( TARGET_ARM )
env -> regs [ 15 ] = addr ;
1223
# elif defined ( TARGET_SH4 )
ths
authored
18 years ago
1224
1225
env -> pc = addr ;
# elif defined ( TARGET_MIPS )
ths
authored
17 years ago
1226
env -> active_tc . PC = addr ;
ths
authored
17 years ago
1227
1228
# elif defined ( TARGET_CRIS )
env -> pc = addr ;
1229
# endif
1230
}
1231
cpu_single_step ( env , sstep_flags );
1232
gdb_continue ( s );
1233
return RS_IDLE ;
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
case 'F' :
{
target_ulong ret ;
target_ulong err ;
ret = strtoull ( p , ( char ** ) & p , 16 );
if ( * p == ',' ) {
p ++ ;
err = strtoull ( p , ( char ** ) & p , 16 );
} else {
err = 0 ;
}
if ( * p == ',' )
p ++ ;
type = * p ;
if ( gdb_current_syscall_cb )
gdb_current_syscall_cb ( s -> env , ret , err );
if ( type == 'C' ) {
put_packet ( s , "T02" );
} else {
1254
gdb_continue ( s );
1255
1256
1257
}
}
break ;
1258
case 'g' :
1259
1260
1261
1262
1263
1264
len = 0 ;
for ( addr = 0 ; addr < num_g_regs ; addr ++ ) {
reg_size = gdb_read_register ( env , mem_buf + len , addr );
len += reg_size ;
}
memtohex ( buf , mem_buf , len );
1265
1266
1267
put_packet ( s , buf );
break ;
case 'G' :
1268
registers = mem_buf ;
1269
1270
len = strlen ( p ) / 2 ;
hextomem (( uint8_t * ) registers , p , len );
1271
1272
1273
1274
1275
for ( addr = 0 ; addr < num_g_regs && len > 0 ; addr ++ ) {
reg_size = gdb_write_register ( env , registers , addr );
len -= reg_size ;
registers += reg_size ;
}
1276
1277
1278
put_packet ( s , "OK" );
break ;
case 'm' :
1279
addr = strtoull ( p , ( char ** ) & p , 16 );
1280
1281
if ( * p == ',' )
p ++ ;
1282
len = strtoull ( p , NULL , 16 );
1283
1284
1285
1286
1287
1288
if ( cpu_memory_rw_debug ( env , addr , mem_buf , len , 0 ) != 0 ) {
put_packet ( s , "E14" );
} else {
memtohex ( buf , mem_buf , len );
put_packet ( s , buf );
}
1289
1290
break ;
case 'M' :
1291
addr = strtoull ( p , ( char ** ) & p , 16 );
1292
1293
if ( * p == ',' )
p ++ ;
1294
len = strtoull ( p , ( char ** ) & p , 16 );
1295
if ( * p == ':' )
1296
1297
1298
p ++ ;
hextomem ( mem_buf , p , len );
if ( cpu_memory_rw_debug ( env , addr , mem_buf , len , 1 ) != 0 )
1299
put_packet ( s , "E14" );
1300
1301
1302
else
put_packet ( s , "OK" );
break ;
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
case 'p' :
/* Older gdb are really dumb , and don ' t use 'g' if 'p' is avaialable .
This works , but can be very slow . Anything new enough to
understand XML also knows how to use this properly . */
if ( ! gdb_has_xml )
goto unknown_command ;
addr = strtoull ( p , ( char ** ) & p , 16 );
reg_size = gdb_read_register ( env , mem_buf , addr );
if ( reg_size ) {
memtohex ( buf , mem_buf , reg_size );
put_packet ( s , buf );
} else {
put_packet ( s , "E14" );
}
break ;
case 'P' :
if ( ! gdb_has_xml )
goto unknown_command ;
addr = strtoull ( p , ( char ** ) & p , 16 );
if ( * p == '=' )
p ++ ;
reg_size = strlen ( p ) / 2 ;
hextomem ( mem_buf , p , reg_size );
gdb_write_register ( env , mem_buf , addr );
put_packet ( s , "OK" );
break ;
1329
1330
1331
1332
case 'Z' :
type = strtoul ( p , ( char ** ) & p , 16 );
if ( * p == ',' )
p ++ ;
1333
addr = strtoull ( p , ( char ** ) & p , 16 );
1334
1335
if ( * p == ',' )
p ++ ;
1336
len = strtoull ( p , ( char ** ) & p , 16 );
1337
1338
1339
switch ( type ) {
case 0 :
case 1 :
1340
1341
1342
if ( cpu_breakpoint_insert ( env , addr ) < 0 )
goto breakpoint_error ;
put_packet ( s , "OK" );
1343
break ;
1344
# ifndef CONFIG_USER_ONLY
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
case 2 :
type = PAGE_WRITE ;
goto insert_watchpoint ;
case 3 :
type = PAGE_READ ;
goto insert_watchpoint ;
case 4 :
type = PAGE_READ | PAGE_WRITE ;
insert_watchpoint :
if ( cpu_watchpoint_insert ( env , addr , type ) < 0 )
1355
1356
goto breakpoint_error ;
put_packet ( s , "OK" );
1357
break ;
1358
# endif
1359
1360
1361
default :
put_packet ( s , "" );
break ;
1362
1363
}
break ;
1364
1365
1366
1367
breakpoint_error :
put_packet ( s , "E22" );
break ;
1368
1369
1370
1371
case 'z' :
type = strtoul ( p , ( char ** ) & p , 16 );
if ( * p == ',' )
p ++ ;
1372
addr = strtoull ( p , ( char ** ) & p , 16 );
1373
1374
if ( * p == ',' )
p ++ ;
1375
len = strtoull ( p , ( char ** ) & p , 16 );
1376
1377
1378
if ( type == 0 || type == 1 ) {
cpu_breakpoint_remove ( env , addr );
put_packet ( s , "OK" );
1379
# ifndef CONFIG_USER_ONLY
1380
} else if ( type >= 2 || type <= 4 ) {
1381
1382
1383
cpu_watchpoint_remove ( env , addr );
put_packet ( s , "OK" );
# endif
1384
} else {
1385
put_packet ( s , "" );
1386
1387
}
break ;
1388
case 'q' :
1389
1390
1391
1392
case 'Q' :
/* parse any 'q' packets here */
if ( ! strcmp ( p , "qemu.sstepbits" )) {
/* Query Breakpoint bit definitions */
1393
1394
1395
1396
snprintf ( buf , sizeof ( buf ), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x" ,
SSTEP_ENABLE ,
SSTEP_NOIRQ ,
SSTEP_NOTIMER );
1397
1398
1399
1400
1401
1402
1403
put_packet ( s , buf );
break ;
} else if ( strncmp ( p , "qemu.sstep" , 10 ) == 0 ) {
/* Display or change the sstep_flags */
p += 10 ;
if ( * p != '=' ) {
/* Display current setting */
1404
snprintf ( buf , sizeof ( buf ), "0x%x" , sstep_flags );
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
put_packet ( s , buf );
break ;
}
p ++ ;
type = strtoul ( p , ( char ** ) & p , 16 );
sstep_flags = type ;
put_packet ( s , "OK" );
break ;
}
# ifdef CONFIG_LINUX_USER
else if ( strncmp ( p , "Offsets" , 7 ) == 0 ) {
1416
1417
TaskState * ts = env -> opaque ;
1418
1419
1420
1421
1422
1423
snprintf ( buf , sizeof ( buf ),
"Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
";Bss=" TARGET_ABI_FMT_lx ,
ts -> info -> code_offset ,
ts -> info -> data_offset ,
ts -> info -> data_offset );
1424
1425
1426
1427
put_packet ( s , buf );
break ;
}
# endif
1428
if ( strncmp ( p , "Supported" , 9 ) == 0 ) {
1429
snprintf ( buf , sizeof ( buf ), "PacketSize=%x" , MAX_PACKET_LENGTH );
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
# ifdef GDB_CORE_XML
strcat ( buf , ";qXfer:features:read+" );
# endif
put_packet ( s , buf );
break ;
}
# ifdef GDB_CORE_XML
if ( strncmp ( p , "Xfer:features:read:" , 19 ) == 0 ) {
const char * xml ;
target_ulong total_len ;
gdb_has_xml = 1 ;
p += 19 ;
xml = get_feature_xml ( env , p , & p );
if ( ! xml ) {
1445
snprintf ( buf , sizeof ( buf ), "E00" );
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
put_packet ( s , buf );
break ;
}
if ( * p == ':' )
p ++ ;
addr = strtoul ( p , ( char ** ) & p , 16 );
if ( * p == ',' )
p ++ ;
len = strtoul ( p , ( char ** ) & p , 16 );
total_len = strlen ( xml );
if ( addr > total_len ) {
1459
snprintf ( buf , sizeof ( buf ), "E00" );
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
put_packet ( s , buf );
break ;
}
if ( len > ( MAX_PACKET_LENGTH - 5 ) / 2 )
len = ( MAX_PACKET_LENGTH - 5 ) / 2 ;
if ( len < total_len - addr ) {
buf [ 0 ] = 'm' ;
len = memtox ( buf + 1 , xml + addr , len );
} else {
buf [ 0 ] = 'l' ;
len = memtox ( buf + 1 , xml + addr , total_len - addr );
}
put_packet_binary ( s , buf , len + 1 );
break ;
}
# endif
/* Unrecognised 'q' command. */
goto unknown_command ;
1479
default :
1480
unknown_command :
1481
1482
1483
1484
1485
1486
1487
1488
/* put empty packet */
buf [ 0 ] = '\0' ;
put_packet ( s , buf );
break ;
}
return RS_IDLE ;
}
1489
1490
extern void tb_flush ( CPUState * env );
1491
# ifndef CONFIG_USER_ONLY
1492
1493
1494
1495
1496
1497
static void gdb_vm_stopped ( void * opaque , int reason )
{
GDBState * s = opaque ;
char buf [ 256 ];
int ret ;
1498
1499
1500
if ( s -> state == RS_SYSCALL )
return ;
1501
/* disable single step if it was enable */
1502
cpu_single_step ( s -> env , 0 );
1503
1504
if ( reason == EXCP_DEBUG ) {
1505
if ( s -> env -> watchpoint_hit ) {
1506
1507
snprintf ( buf , sizeof ( buf ), "T%02xwatch:" TARGET_FMT_lx ";" ,
SIGTRAP ,
1508
1509
1510
1511
1512
s -> env -> watchpoint [ s -> env -> watchpoint_hit - 1 ]. vaddr );
put_packet ( s , buf );
s -> env -> watchpoint_hit = 0 ;
return ;
}
1513
tb_flush ( s -> env );
1514
ret = SIGTRAP ;
1515
1516
1517
} else if ( reason == EXCP_INTERRUPT ) {
ret = SIGINT ;
} else {
1518
ret = 0 ;
1519
}
1520
1521
1522
snprintf ( buf , sizeof ( buf ), "S%02x" , ret );
put_packet ( s , buf );
}
1523
# endif
1524
1525
1526
/* Send a gdb syscall request .
This accepts limited printf - style format specifiers , specifically :
1527
1528
1529
% x - target_ulong argument printed in hex .
% lx - 64 - bit argument printed in hex .
% s - string pointer ( target_ulong ) and length ( int ) pair . */
1530
void gdb_do_syscall ( gdb_syscall_complete_cb cb , const char * fmt , ...)
1531
1532
1533
1534
1535
{
va_list va ;
char buf [ 256 ];
char * p ;
target_ulong addr ;
1536
uint64_t i64 ;
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
GDBState * s ;
s = gdb_syscall_state ;
if ( ! s )
return ;
gdb_current_syscall_cb = cb ;
s -> state = RS_SYSCALL ;
# ifndef CONFIG_USER_ONLY
vm_stop ( EXCP_DEBUG );
# endif
s -> state = RS_IDLE ;
va_start ( va , fmt );
p = buf ;
* ( p ++ ) = 'F' ;
while ( * fmt ) {
if ( * fmt == '%' ) {
fmt ++ ;
switch ( * fmt ++ ) {
case 'x' :
addr = va_arg ( va , target_ulong );
1557
p += snprintf ( p , & buf [ sizeof ( buf )] - p , TARGET_FMT_lx , addr );
1558
break ;
1559
1560
1561
1562
case 'l' :
if ( * ( fmt ++ ) != 'x' )
goto bad_format ;
i64 = va_arg ( va , uint64_t );
1563
p += snprintf ( p , & buf [ sizeof ( buf )] - p , "%" PRIx64 , i64 );
1564
break ;
1565
1566
case 's' :
addr = va_arg ( va , target_ulong );
1567
1568
p += snprintf ( p , & buf [ sizeof ( buf )] - p , TARGET_FMT_lx "/%x" ,
addr , va_arg ( va , int ));
1569
1570
break ;
default :
1571
bad_format :
1572
1573
1574
1575
1576
1577
1578
1579
fprintf ( stderr , "gdbstub: Bad syscall format string '%s' \n " ,
fmt - 1 );
break ;
}
} else {
* ( p ++ ) = * ( fmt ++ );
}
}
1580
* p = 0 ;
1581
1582
1583
1584
1585
1586
1587
1588
1589
va_end ( va );
put_packet ( s , buf );
# ifdef CONFIG_USER_ONLY
gdb_handlesig ( s -> env , 0 );
# else
cpu_interrupt ( s -> env , CPU_INTERRUPT_EXIT );
# endif
}
1590
static void gdb_read_byte ( GDBState * s , int ch )
1591
{
1592
CPUState * env = s -> env ;
1593
int i , csum ;
ths
authored
17 years ago
1594
uint8_t reply ;
1595
1596
# ifndef CONFIG_USER_ONLY
1597
1598
1599
1600
1601
1602
1603
if ( s -> last_packet_len ) {
/* Waiting for a response to the last packet . If we see the start
of a new command then abandon the previous response . */
if ( ch == '-' ) {
# ifdef DEBUG_GDB
printf ( "Got NACK, retransmitting \n " );
# endif
ths
authored
17 years ago
1604
put_buffer ( s , ( uint8_t * ) s -> last_packet , s -> last_packet_len );
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
}
# ifdef DEBUG_GDB
else if ( ch == '+' )
printf ( "Got ACK \n " );
else
printf ( "Got '%c' when expecting ACK/NACK \n " , ch );
# endif
if ( ch == '+' || ch == '$' )
s -> last_packet_len = 0 ;
if ( ch != '$' )
return ;
}
1617
1618
1619
1620
if ( vm_running ) {
/* when the CPU is running , we cannot do anything except stop
it when receiving a char */
vm_stop ( EXCP_INTERRUPT );
ths
authored
18 years ago
1621
} else
1622
# endif
1623
{
1624
1625
1626
1627
1628
switch ( s -> state ) {
case RS_IDLE :
if ( ch == '$' ) {
s -> line_buf_index = 0 ;
s -> state = RS_GETLINE ;
1629
}
1630
break ;
1631
1632
1633
1634
1635
case RS_GETLINE :
if ( ch == '#' ) {
s -> state = RS_CHKSUM1 ;
} else if ( s -> line_buf_index >= sizeof ( s -> line_buf ) - 1 ) {
s -> state = RS_IDLE ;
1636
} else {
1637
s -> line_buf [ s -> line_buf_index ++ ] = ch ;
1638
1639
}
break ;
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
case RS_CHKSUM1 :
s -> line_buf [ s -> line_buf_index ] = '\0' ;
s -> line_csum = fromhex ( ch ) << 4 ;
s -> state = RS_CHKSUM2 ;
break ;
case RS_CHKSUM2 :
s -> line_csum |= fromhex ( ch );
csum = 0 ;
for ( i = 0 ; i < s -> line_buf_index ; i ++ ) {
csum += s -> line_buf [ i ];
}
if ( s -> line_csum != ( csum & 0xff )) {
ths
authored
17 years ago
1652
1653
reply = '-' ;
put_buffer ( s , & reply , 1 );
1654
s -> state = RS_IDLE ;
1655
} else {
ths
authored
17 years ago
1656
1657
reply = '+' ;
put_buffer ( s , & reply , 1 );
1658
s -> state = gdb_handle_packet ( s , env , s -> line_buf );
1659
1660
}
break ;
1661
1662
default :
abort ();
1663
1664
1665
1666
}
}
}
1667
1668
1669
1670
1671
1672
1673
1674
1675
# ifdef CONFIG_USER_ONLY
int
gdb_handlesig ( CPUState * env , int sig )
{
GDBState * s ;
char buf [ 256 ];
int n ;
s = & gdbserver_state ;
1676
1677
if ( gdbserver_fd < 0 || s -> fd < 0 )
return sig ;
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
/* disable single step if it was enabled */
cpu_single_step ( env , 0 );
tb_flush ( env );
if ( sig != 0 )
{
snprintf ( buf , sizeof ( buf ), "S%02x" , sig );
put_packet ( s , buf );
}
1688
1689
1690
1691
/* put_packet () might have detected that the peer terminated the
connection . */
if ( s -> fd < 0 )
return sig ;
1692
1693
1694
sig = 0 ;
s -> state = RS_IDLE ;
1695
1696
s -> running_state = 0 ;
while ( s -> running_state == 0 ) {
1697
1698
1699
1700
1701
1702
n = read ( s -> fd , buf , 256 );
if ( n > 0 )
{
int i ;
for ( i = 0 ; i < n ; i ++ )
1703
gdb_read_byte ( s , buf [ i ]);
1704
1705
1706
1707
1708
1709
1710
}
else if ( n == 0 || errno != EAGAIN )
{
/* XXX : Connection closed . Should probably wait for annother
connection before continuing . */
return sig ;
}
1711
}
1712
1713
sig = s -> signal ;
s -> signal = 0 ;
1714
1715
return sig ;
}
1716
1717
1718
1719
1720
1721
1722
1723
/* Tell the remote gdb that the process has exited. */
void gdb_exit ( CPUState * env , int code )
{
GDBState * s ;
char buf [ 4 ];
s = & gdbserver_state ;
1724
1725
if ( gdbserver_fd < 0 || s -> fd < 0 )
return ;
1726
1727
1728
1729
1730
snprintf ( buf , sizeof ( buf ), "W%02x" , code );
put_packet ( s , buf );
}
1731
1732
static void gdb_accept ( void * opaque )
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
{
GDBState * s ;
struct sockaddr_in sockaddr ;
socklen_t len ;
int val , fd ;
for (;;) {
len = sizeof ( sockaddr );
fd = accept ( gdbserver_fd , ( struct sockaddr * ) & sockaddr , & len );
if ( fd < 0 && errno != EINTR ) {
perror ( "accept" );
return ;
} else if ( fd >= 0 ) {
1746
1747
1748
break ;
}
}
1749
1750
1751
/* set short latency */
val = 1 ;
1752
setsockopt ( fd , IPPROTO_TCP , TCP_NODELAY , ( char * ) & val , sizeof ( val ));
ths
authored
18 years ago
1753
1754
1755
s = & gdbserver_state ;
memset ( s , 0 , sizeof ( GDBState ));
1756
s -> env = first_cpu ; /* XXX: allow to change CPU */
1757
s -> fd = fd ;
1758
gdb_has_xml = 0 ;
1759
1760
1761
gdb_syscall_state = s ;
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
fcntl ( fd , F_SETFL , O_NONBLOCK );
}
static int gdbserver_open ( int port )
{
struct sockaddr_in sockaddr ;
int fd , val , ret ;
fd = socket ( PF_INET , SOCK_STREAM , 0 );
if ( fd < 0 ) {
perror ( "socket" );
return - 1 ;
}
/* allow fast reuse */
val = 1 ;
1778
setsockopt ( fd , SOL_SOCKET , SO_REUSEADDR , ( char * ) & val , sizeof ( val ));
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
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1799
1800
1801
sockaddr . sin_family = AF_INET ;
sockaddr . sin_port = htons ( port );
sockaddr . sin_addr . s_addr = 0 ;
ret = bind ( fd , ( struct sockaddr * ) & sockaddr , sizeof ( sockaddr ));
if ( ret < 0 ) {
perror ( "bind" );
return - 1 ;
}
ret = listen ( fd , 0 );
if ( ret < 0 ) {
perror ( "listen" );
return - 1 ;
}
return fd ;
}
int gdbserver_start ( int port )
{
gdbserver_fd = gdbserver_open ( port );
if ( gdbserver_fd < 0 )
return - 1 ;
/* accept connections */
1802
gdb_accept ( NULL );
1803
1804
return 0 ;
}
1805
# else
ths
authored
18 years ago
1806
static int gdb_chr_can_receive ( void * opaque )
1807
{
1808
1809
1810
/* We can handle an arbitrarily large amount of data .
Pick the maximum packet size , which is as good as anything . */
return MAX_PACKET_LENGTH ;
1811
1812
}
ths
authored
18 years ago
1813
static void gdb_chr_receive ( void * opaque , const uint8_t * buf , int size )
1814
1815
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1817
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1821
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1827
{
GDBState * s = opaque ;
int i ;
for ( i = 0 ; i < size ; i ++ ) {
gdb_read_byte ( s , buf [ i ]);
}
}
static void gdb_chr_event ( void * opaque , int event )
{
switch ( event ) {
case CHR_EVENT_RESET :
vm_stop ( EXCP_INTERRUPT );
1828
gdb_syscall_state = opaque ;
1829
gdb_has_xml = 0 ;
1830
1831
1832
1833
1834
1835
break ;
default :
break ;
}
}
1836
int gdbserver_start ( const char * port )
1837
1838
{
GDBState * s ;
1839
1840
1841
1842
1843
1844
1845
char gdbstub_port_name [ 128 ];
int port_num ;
char * p ;
CharDriverState * chr ;
if ( ! port || !* port )
return - 1 ;
1846
1847
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1854
1855
port_num = strtol ( port , & p , 10 );
if ( * p == 0 ) {
/* A numeric value is interpreted as a port number. */
snprintf ( gdbstub_port_name , sizeof ( gdbstub_port_name ),
"tcp::%d,nowait,nodelay,server" , port_num );
port = gdbstub_port_name ;
}
chr = qemu_chr_open ( port );
1856
1857
1858
1859
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if ( ! chr )
return - 1 ;
s = qemu_mallocz ( sizeof ( GDBState ));
if ( ! s ) {
return - 1 ;
}
s -> env = first_cpu ; /* XXX: allow to change CPU */
s -> chr = chr ;
ths
authored
18 years ago
1865
qemu_chr_add_handlers ( chr , gdb_chr_can_receive , gdb_chr_receive ,
1866
1867
gdb_chr_event , s );
qemu_add_vm_stop_handler ( gdb_vm_stopped , s );
1868
1869
return 0 ;
}
1870
# endif