Commit e6e5906b6e0a81718066ca43aef57515026c6624
1 parent
223b8a40
ColdFire target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
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Makefile.target
| ... | ... | @@ -197,6 +197,9 @@ OBJS+=nwfpe/fpa11.o nwfpe/fpa11_cpdo.o \ |
| 197 | 197 | nwfpe/fpa11_cpdt.o nwfpe/fpa11_cprt.o nwfpe/fpopcode.o nwfpe/single_cpdo.o \ |
| 198 | 198 | nwfpe/double_cpdo.o nwfpe/extended_cpdo.o arm-semi.o |
| 199 | 199 | endif |
| 200 | +ifeq ($(TARGET_ARCH), m68k) | |
| 201 | +OBJS+= m68k-sim.o m68k-semi.o | |
| 202 | +endif | |
| 200 | 203 | SRCS:= $(OBJS:.o=.c) |
| 201 | 204 | OBJS+= libqemu.a |
| 202 | 205 | |
| ... | ... | @@ -241,6 +244,10 @@ ifeq ($(TARGET_BASE_ARCH), sh4) |
| 241 | 244 | LIBOBJS+= op_helper.o helper.o |
| 242 | 245 | endif |
| 243 | 246 | |
| 247 | +ifeq ($(TARGET_BASE_ARCH), m68k) | |
| 248 | +LIBOBJS+= helper.o | |
| 249 | +endif | |
| 250 | + | |
| 244 | 251 | # NOTE: the disassembler code is only needed for debugging |
| 245 | 252 | LIBOBJS+=disas.o |
| 246 | 253 | ifeq ($(findstring i386, $(TARGET_ARCH) $(ARCH)),i386) | ... | ... |
configure
| ... | ... | @@ -362,7 +362,7 @@ if test -z "$target_list" ; then |
| 362 | 362 | fi |
| 363 | 363 | # the following are Linux specific |
| 364 | 364 | if [ "$user" = "yes" ] ; then |
| 365 | - target_list="i386-user arm-user armeb-user sparc-user ppc-user mips-user mipsel-user $target_list" | |
| 365 | + target_list="i386-user arm-user armeb-user sparc-user ppc-user mips-user mipsel-user m68k-user $target_list" | |
| 366 | 366 | fi |
| 367 | 367 | else |
| 368 | 368 | target_list=`echo "$target_list" | sed -e 's/,/ /g'` |
| ... | ... | @@ -727,6 +727,7 @@ target_bigendian="no" |
| 727 | 727 | [ "$target_cpu" = "ppc64" ] && target_bigendian=yes |
| 728 | 728 | [ "$target_cpu" = "mips" ] && target_bigendian=yes |
| 729 | 729 | [ "$target_cpu" = "sh4eb" ] && target_bigendian=yes |
| 730 | +[ "$target_cpu" = "m68k" ] && target_bigendian=yes | |
| 730 | 731 | target_softmmu="no" |
| 731 | 732 | if expr $target : '.*-softmmu' > /dev/null ; then |
| 732 | 733 | target_softmmu="yes" |
| ... | ... | @@ -822,6 +823,11 @@ elif test "$target_cpu" = "sh4" -o "$target_cpu" = "sh4eb" ; then |
| 822 | 823 | echo "#define TARGET_ARCH \"sh4\"" >> $config_h |
| 823 | 824 | echo "#define TARGET_SH4 1" >> $config_h |
| 824 | 825 | bflt="yes" |
| 826 | +elif test "$target_cpu" = "m68k" ; then | |
| 827 | + echo "TARGET_ARCH=m68k" >> $config_mak | |
| 828 | + echo "#define TARGET_ARCH \"m68k\"" >> $config_h | |
| 829 | + echo "#define TARGET_M68K 1" >> $config_h | |
| 830 | + bflt="yes" | |
| 825 | 831 | else |
| 826 | 832 | echo "Unsupported target CPU" |
| 827 | 833 | exit 1 |
| ... | ... | @@ -839,7 +845,7 @@ if test "$target_user_only" = "yes" ; then |
| 839 | 845 | echo "#define CONFIG_USER_ONLY 1" >> $config_h |
| 840 | 846 | fi |
| 841 | 847 | |
| 842 | -if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64"; then | |
| 848 | +if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64" -o "$target_cpu" = "m68k"; then | |
| 843 | 849 | echo "CONFIG_SOFTFLOAT=yes" >> $config_mak |
| 844 | 850 | echo "#define CONFIG_SOFTFLOAT 1" >> $config_h |
| 845 | 851 | fi | ... | ... |
cpu-all.h
| ... | ... | @@ -725,6 +725,13 @@ void page_unprotect_range(target_ulong data, target_ulong data_size); |
| 725 | 725 | #define cpu_gen_code cpu_ppc_gen_code |
| 726 | 726 | #define cpu_signal_handler cpu_ppc_signal_handler |
| 727 | 727 | |
| 728 | +#elif defined(TARGET_M68K) | |
| 729 | +#define CPUState CPUM68KState | |
| 730 | +#define cpu_init cpu_m68k_init | |
| 731 | +#define cpu_exec cpu_m68k_exec | |
| 732 | +#define cpu_gen_code cpu_m68k_gen_code | |
| 733 | +#define cpu_signal_handler cpu_m68k_signal_handler | |
| 734 | + | |
| 728 | 735 | #elif defined(TARGET_MIPS) |
| 729 | 736 | #define CPUState CPUMIPSState |
| 730 | 737 | #define cpu_init cpu_mips_init | ... | ... |
cpu-exec.c
| ... | ... | @@ -40,14 +40,14 @@ int tb_invalidated_flag; |
| 40 | 40 | //#define DEBUG_EXEC |
| 41 | 41 | //#define DEBUG_SIGNAL |
| 42 | 42 | |
| 43 | -#if defined(TARGET_ARM) || defined(TARGET_SPARC) | |
| 43 | +#if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_M68K) | |
| 44 | 44 | /* XXX: unify with i386 target */ |
| 45 | 45 | void cpu_loop_exit(void) |
| 46 | 46 | { |
| 47 | 47 | longjmp(env->jmp_env, 1); |
| 48 | 48 | } |
| 49 | 49 | #endif |
| 50 | -#if !(defined(TARGET_SPARC) || defined(TARGET_SH4)) | |
| 50 | +#if !(defined(TARGET_SPARC) || defined(TARGET_SH4) || defined(TARGET_M68K)) | |
| 51 | 51 | #define reg_T2 |
| 52 | 52 | #endif |
| 53 | 53 | |
| ... | ... | @@ -194,6 +194,10 @@ static inline TranslationBlock *tb_find_fast(void) |
| 194 | 194 | flags = env->hflags & (MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK); |
| 195 | 195 | cs_base = 0; |
| 196 | 196 | pc = env->PC; |
| 197 | +#elif defined(TARGET_M68K) | |
| 198 | + flags = env->fpcr & M68K_FPCR_PREC; | |
| 199 | + cs_base = 0; | |
| 200 | + pc = env->pc; | |
| 197 | 201 | #elif defined(TARGET_SH4) |
| 198 | 202 | flags = env->sr & (SR_MD | SR_RB); |
| 199 | 203 | cs_base = 0; /* XXXXX */ |
| ... | ... | @@ -370,6 +374,10 @@ int cpu_exec(CPUState *env1) |
| 370 | 374 | saved_regwptr = REGWPTR; |
| 371 | 375 | #endif |
| 372 | 376 | #elif defined(TARGET_PPC) |
| 377 | +#elif defined(TARGET_M68K) | |
| 378 | + env->cc_op = CC_OP_FLAGS; | |
| 379 | + env->cc_dest = env->sr & 0xf; | |
| 380 | + env->cc_x = (env->sr >> 4) & 1; | |
| 373 | 381 | #elif defined(TARGET_MIPS) |
| 374 | 382 | #elif defined(TARGET_SH4) |
| 375 | 383 | /* XXXXX */ |
| ... | ... | @@ -632,6 +640,12 @@ int cpu_exec(CPUState *env1) |
| 632 | 640 | cpu_dump_state(env, logfile, fprintf, 0); |
| 633 | 641 | #elif defined(TARGET_PPC) |
| 634 | 642 | cpu_dump_state(env, logfile, fprintf, 0); |
| 643 | +#elif defined(TARGET_M68K) | |
| 644 | + cpu_m68k_flush_flags(env, env->cc_op); | |
| 645 | + env->cc_op = CC_OP_FLAGS; | |
| 646 | + env->sr = (env->sr & 0xffe0) | |
| 647 | + | env->cc_dest | (env->cc_x << 4); | |
| 648 | + cpu_dump_state(env, logfile, fprintf, 0); | |
| 635 | 649 | #elif defined(TARGET_MIPS) |
| 636 | 650 | cpu_dump_state(env, logfile, fprintf, 0); |
| 637 | 651 | #elif defined(TARGET_SH4) |
| ... | ... | @@ -846,6 +860,11 @@ int cpu_exec(CPUState *env1) |
| 846 | 860 | REGWPTR = saved_regwptr; |
| 847 | 861 | #endif |
| 848 | 862 | #elif defined(TARGET_PPC) |
| 863 | +#elif defined(TARGET_M68K) | |
| 864 | + cpu_m68k_flush_flags(env, env->cc_op); | |
| 865 | + env->cc_op = CC_OP_FLAGS; | |
| 866 | + env->sr = (env->sr & 0xffe0) | |
| 867 | + | env->cc_dest | (env->cc_x << 4); | |
| 849 | 868 | #elif defined(TARGET_MIPS) |
| 850 | 869 | #elif defined(TARGET_SH4) |
| 851 | 870 | /* XXXXX */ |
| ... | ... | @@ -1103,6 +1122,45 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address, |
| 1103 | 1122 | return 1; |
| 1104 | 1123 | } |
| 1105 | 1124 | |
| 1125 | +#elif defined(TARGET_M68K) | |
| 1126 | +static inline int handle_cpu_signal(unsigned long pc, unsigned long address, | |
| 1127 | + int is_write, sigset_t *old_set, | |
| 1128 | + void *puc) | |
| 1129 | +{ | |
| 1130 | + TranslationBlock *tb; | |
| 1131 | + int ret; | |
| 1132 | + | |
| 1133 | + if (cpu_single_env) | |
| 1134 | + env = cpu_single_env; /* XXX: find a correct solution for multithread */ | |
| 1135 | +#if defined(DEBUG_SIGNAL) | |
| 1136 | + printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", | |
| 1137 | + pc, address, is_write, *(unsigned long *)old_set); | |
| 1138 | +#endif | |
| 1139 | + /* XXX: locking issue */ | |
| 1140 | + if (is_write && page_unprotect(address, pc, puc)) { | |
| 1141 | + return 1; | |
| 1142 | + } | |
| 1143 | + /* see if it is an MMU fault */ | |
| 1144 | + ret = cpu_m68k_handle_mmu_fault(env, address, is_write, 1, 0); | |
| 1145 | + if (ret < 0) | |
| 1146 | + return 0; /* not an MMU fault */ | |
| 1147 | + if (ret == 0) | |
| 1148 | + return 1; /* the MMU fault was handled without causing real CPU fault */ | |
| 1149 | + /* now we have a real cpu fault */ | |
| 1150 | + tb = tb_find_pc(pc); | |
| 1151 | + if (tb) { | |
| 1152 | + /* the PC is inside the translated code. It means that we have | |
| 1153 | + a virtual CPU fault */ | |
| 1154 | + cpu_restore_state(tb, env, pc, puc); | |
| 1155 | + } | |
| 1156 | + /* we restore the process signal mask as the sigreturn should | |
| 1157 | + do it (XXX: use sigsetjmp) */ | |
| 1158 | + sigprocmask(SIG_SETMASK, old_set, NULL); | |
| 1159 | + cpu_loop_exit(); | |
| 1160 | + /* never comes here */ | |
| 1161 | + return 1; | |
| 1162 | +} | |
| 1163 | + | |
| 1106 | 1164 | #elif defined (TARGET_MIPS) |
| 1107 | 1165 | static inline int handle_cpu_signal(unsigned long pc, unsigned long address, |
| 1108 | 1166 | int is_write, sigset_t *old_set, | ... | ... |
disas.c
| ... | ... | @@ -186,6 +186,8 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) |
| 186 | 186 | disasm_info.mach = bfd_mach_ppc; |
| 187 | 187 | #endif |
| 188 | 188 | print_insn = print_insn_ppc; |
| 189 | +#elif defined(TARGET_M68K) | |
| 190 | + print_insn = print_insn_m68k; | |
| 189 | 191 | #elif defined(TARGET_MIPS) |
| 190 | 192 | #ifdef TARGET_WORDS_BIGENDIAN |
| 191 | 193 | print_insn = print_insn_big_mips; |
| ... | ... | @@ -385,6 +387,8 @@ void monitor_disas(CPUState *env, |
| 385 | 387 | disasm_info.mach = bfd_mach_ppc; |
| 386 | 388 | #endif |
| 387 | 389 | print_insn = print_insn_ppc; |
| 390 | +#elif defined(TARGET_M68K) | |
| 391 | + print_insn = print_insn_m68k; | |
| 388 | 392 | #elif defined(TARGET_MIPS) |
| 389 | 393 | #ifdef TARGET_WORDS_BIGENDIAN |
| 390 | 394 | print_insn = print_insn_big_mips; | ... | ... |
fpu/softfloat-native.c
| ... | ... | @@ -221,6 +221,11 @@ float128 float64_to_float128( float64 a STATUS_PARAM) |
| 221 | 221 | /*---------------------------------------------------------------------------- |
| 222 | 222 | | Software IEC/IEEE double-precision operations. |
| 223 | 223 | *----------------------------------------------------------------------------*/ |
| 224 | +float64 float64_trunc_to_int( float64 a STATUS_PARAM ) | |
| 225 | +{ | |
| 226 | + return trunc(a); | |
| 227 | +} | |
| 228 | + | |
| 224 | 229 | float64 float64_round_to_int( float64 a STATUS_PARAM ) |
| 225 | 230 | { |
| 226 | 231 | #if defined(__arm__) |
| ... | ... | @@ -289,6 +294,17 @@ char float64_is_signaling_nan( float64 a1) |
| 289 | 294 | |
| 290 | 295 | } |
| 291 | 296 | |
| 297 | +char float64_is_nan( float64 a1 ) | |
| 298 | +{ | |
| 299 | + float64u u; | |
| 300 | + uint64_t a; | |
| 301 | + u.f = a1; | |
| 302 | + a = u.i; | |
| 303 | + | |
| 304 | + return ( LIT64( 0xFFE0000000000000 ) < (bits64) ( a<<1 ) ); | |
| 305 | + | |
| 306 | +} | |
| 307 | + | |
| 292 | 308 | #ifdef FLOATX80 |
| 293 | 309 | |
| 294 | 310 | /*---------------------------------------------------------------------------- | ... | ... |
fpu/softfloat-native.h
| ... | ... | @@ -214,6 +214,7 @@ float128 float64_to_float128( float64 STATUS_PARAM ); |
| 214 | 214 | | Software IEC/IEEE double-precision operations. |
| 215 | 215 | *----------------------------------------------------------------------------*/ |
| 216 | 216 | float64 float64_round_to_int( float64 STATUS_PARAM ); |
| 217 | +float64 float64_trunc_to_int( float64 STATUS_PARAM ); | |
| 217 | 218 | INLINE float64 float64_add( float64 a, float64 b STATUS_PARAM) |
| 218 | 219 | { |
| 219 | 220 | return a + b; |
| ... | ... | @@ -265,6 +266,7 @@ INLINE char float64_unordered( float64 a, float64 b STATUS_PARAM) |
| 265 | 266 | char float64_compare( float64, float64 STATUS_PARAM ); |
| 266 | 267 | char float64_compare_quiet( float64, float64 STATUS_PARAM ); |
| 267 | 268 | char float64_is_signaling_nan( float64 ); |
| 269 | +flag float64_is_nan( float64 ); | |
| 268 | 270 | |
| 269 | 271 | INLINE float64 float64_abs(float64 a) |
| 270 | 272 | { | ... | ... |
fpu/softfloat.c
| ... | ... | @@ -2483,6 +2483,17 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) |
| 2483 | 2483 | |
| 2484 | 2484 | } |
| 2485 | 2485 | |
| 2486 | +float64 float64_trunc_to_int( float64 a STATUS_PARAM) | |
| 2487 | +{ | |
| 2488 | + int oldmode; | |
| 2489 | + float64 res; | |
| 2490 | + oldmode = STATUS(float_rounding_mode); | |
| 2491 | + STATUS(float_rounding_mode) = float_round_to_zero; | |
| 2492 | + res = float64_round_to_int(a STATUS_VAR); | |
| 2493 | + STATUS(float_rounding_mode) = oldmode; | |
| 2494 | + return res; | |
| 2495 | +} | |
| 2496 | + | |
| 2486 | 2497 | /*---------------------------------------------------------------------------- |
| 2487 | 2498 | | Returns the result of adding the absolute values of the double-precision |
| 2488 | 2499 | | floating-point values `a' and `b'. If `zSign' is 1, the sum is negated | ... | ... |
fpu/softfloat.h
| ... | ... | @@ -237,6 +237,7 @@ char float32_lt_quiet( float32, float32 STATUS_PARAM ); |
| 237 | 237 | char float32_compare( float32, float32 STATUS_PARAM ); |
| 238 | 238 | char float32_compare_quiet( float32, float32 STATUS_PARAM ); |
| 239 | 239 | char float32_is_signaling_nan( float32 ); |
| 240 | +flag float64_is_nan( float64 a ); | |
| 240 | 241 | |
| 241 | 242 | INLINE float32 float32_abs(float32 a) |
| 242 | 243 | { |
| ... | ... | @@ -269,6 +270,7 @@ float128 float64_to_float128( float64 STATUS_PARAM ); |
| 269 | 270 | | Software IEC/IEEE double-precision operations. |
| 270 | 271 | *----------------------------------------------------------------------------*/ |
| 271 | 272 | float64 float64_round_to_int( float64 STATUS_PARAM ); |
| 273 | +float64 float64_trunc_to_int( float64 STATUS_PARAM ); | |
| 272 | 274 | float64 float64_add( float64, float64 STATUS_PARAM ); |
| 273 | 275 | float64 float64_sub( float64, float64 STATUS_PARAM ); |
| 274 | 276 | float64 float64_mul( float64, float64 STATUS_PARAM ); | ... | ... |
gdbstub.c
| ... | ... | @@ -434,6 +434,73 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
| 434 | 434 | ptr += 8 * 12 + 4; |
| 435 | 435 | cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff); |
| 436 | 436 | } |
| 437 | +#elif defined (TARGET_M68K) | |
| 438 | +static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | |
| 439 | +{ | |
| 440 | + int i; | |
| 441 | + uint8_t *ptr; | |
| 442 | + CPU_DoubleU u; | |
| 443 | + | |
| 444 | + ptr = mem_buf; | |
| 445 | + /* D0-D7 */ | |
| 446 | + for (i = 0; i < 8; i++) { | |
| 447 | + *(uint32_t *)ptr = tswapl(env->dregs[i]); | |
| 448 | + ptr += 4; | |
| 449 | + } | |
| 450 | + /* A0-A7 */ | |
| 451 | + for (i = 0; i < 8; i++) { | |
| 452 | + *(uint32_t *)ptr = tswapl(env->aregs[i]); | |
| 453 | + ptr += 4; | |
| 454 | + } | |
| 455 | + *(uint32_t *)ptr = tswapl(env->sr); | |
| 456 | + ptr += 4; | |
| 457 | + *(uint32_t *)ptr = tswapl(env->pc); | |
| 458 | + ptr += 4; | |
| 459 | + /* F0-F7. The 68881/68040 have 12-bit extended precision registers. | |
| 460 | + ColdFire has 8-bit double precision registers. */ | |
| 461 | + for (i = 0; i < 8; i++) { | |
| 462 | + u.d = env->fregs[i]; | |
| 463 | + *(uint32_t *)ptr = tswap32(u.l.upper); | |
| 464 | + *(uint32_t *)ptr = tswap32(u.l.lower); | |
| 465 | + } | |
| 466 | + /* FP control regs (not implemented). */ | |
| 467 | + memset (ptr, 0, 3 * 4); | |
| 468 | + ptr += 3 * 4; | |
| 469 | + | |
| 470 | + return ptr - mem_buf; | |
| 471 | +} | |
| 472 | + | |
| 473 | +static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | |
| 474 | +{ | |
| 475 | + int i; | |
| 476 | + uint8_t *ptr; | |
| 477 | + CPU_DoubleU u; | |
| 478 | + | |
| 479 | + ptr = mem_buf; | |
| 480 | + /* D0-D7 */ | |
| 481 | + for (i = 0; i < 8; i++) { | |
| 482 | + env->dregs[i] = tswapl(*(uint32_t *)ptr); | |
| 483 | + ptr += 4; | |
| 484 | + } | |
| 485 | + /* A0-A7 */ | |
| 486 | + for (i = 0; i < 8; i++) { | |
| 487 | + env->aregs[i] = tswapl(*(uint32_t *)ptr); | |
| 488 | + ptr += 4; | |
| 489 | + } | |
| 490 | + env->sr = tswapl(*(uint32_t *)ptr); | |
| 491 | + ptr += 4; | |
| 492 | + env->pc = tswapl(*(uint32_t *)ptr); | |
| 493 | + ptr += 4; | |
| 494 | + /* F0-F7. The 68881/68040 have 12-bit extended precision registers. | |
| 495 | + ColdFire has 8-bit double precision registers. */ | |
| 496 | + for (i = 0; i < 8; i++) { | |
| 497 | + u.l.upper = tswap32(*(uint32_t *)ptr); | |
| 498 | + u.l.lower = tswap32(*(uint32_t *)ptr); | |
| 499 | + env->fregs[i] = u.d; | |
| 500 | + } | |
| 501 | + /* FP control regs (not implemented). */ | |
| 502 | + ptr += 3 * 4; | |
| 503 | +} | |
| 437 | 504 | #elif defined (TARGET_MIPS) |
| 438 | 505 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
| 439 | 506 | { | ... | ... |
hw/pl110.c
| ... | ... | @@ -185,10 +185,11 @@ static void pl110_update_display(void *opaque) |
| 185 | 185 | addr = base; |
| 186 | 186 | |
| 187 | 187 | dirty = cpu_physical_memory_get_dirty(addr, VGA_DIRTY_FLAG); |
| 188 | + new_dirty = dirty; | |
| 188 | 189 | for (i = 0; i < s->rows; i++) { |
| 189 | - new_dirty = 0; | |
| 190 | - if ((addr & TARGET_PAGE_MASK) + src_width >= TARGET_PAGE_SIZE) { | |
| 190 | + if ((addr & ~TARGET_PAGE_MASK) + src_width >= TARGET_PAGE_SIZE) { | |
| 191 | 191 | uint32_t tmp; |
| 192 | + new_dirty = 0; | |
| 192 | 193 | for (tmp = 0; tmp < src_width; tmp += TARGET_PAGE_SIZE) { |
| 193 | 194 | new_dirty |= cpu_physical_memory_get_dirty(addr + tmp, |
| 194 | 195 | VGA_DIRTY_FLAG); | ... | ... |
linux-user/elfload.c
| ... | ... | @@ -288,6 +288,31 @@ static inline void init_thread(struct target_pt_regs *regs, struct image_info *i |
| 288 | 288 | |
| 289 | 289 | #endif |
| 290 | 290 | |
| 291 | +#ifdef TARGET_M68K | |
| 292 | + | |
| 293 | +#define ELF_START_MMAP 0x80000000 | |
| 294 | + | |
| 295 | +#define elf_check_arch(x) ( (x) == EM_68K ) | |
| 296 | + | |
| 297 | +#define ELF_CLASS ELFCLASS32 | |
| 298 | +#define ELF_DATA ELFDATA2MSB | |
| 299 | +#define ELF_ARCH EM_68K | |
| 300 | + | |
| 301 | +/* ??? Does this need to do anything? | |
| 302 | +#define ELF_PLAT_INIT(_r) */ | |
| 303 | + | |
| 304 | +static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) | |
| 305 | +{ | |
| 306 | + regs->usp = infop->start_stack; | |
| 307 | + regs->sr = 0; | |
| 308 | + regs->pc = infop->entry; | |
| 309 | +} | |
| 310 | + | |
| 311 | +#define USE_ELF_CORE_DUMP | |
| 312 | +#define ELF_EXEC_PAGESIZE 8192 | |
| 313 | + | |
| 314 | +#endif | |
| 315 | + | |
| 291 | 316 | #ifndef ELF_PLATFORM |
| 292 | 317 | #define ELF_PLATFORM (NULL) |
| 293 | 318 | #endif | ... | ... |
linux-user/m68k-semi.c
0 → 100644
| 1 | +/* | |
| 2 | + * m68k/ColdFire Semihosting ssycall interface | |
| 3 | + * | |
| 4 | + * Copyright (c) 2005 CodeSourcery, LLC. Written by Paul Brook. | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License as published by | |
| 8 | + * the Free Software Foundation; either version 2 of the License, or | |
| 9 | + * (at your option) any later version. | |
| 10 | + * | |
| 11 | + * This program is distributed in the hope that it will be useful, | |
| 12 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | + * GNU General Public License for more details. | |
| 15 | + * | |
| 16 | + * You should have received a copy of the GNU General Public License | |
| 17 | + * along with this program; if not, write to the Free Software | |
| 18 | + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
| 19 | + */ | |
| 20 | + | |
| 21 | +#include <sys/types.h> | |
| 22 | +#include <sys/stat.h> | |
| 23 | +#include <errno.h> | |
| 24 | +#include <fcntl.h> | |
| 25 | +#include <unistd.h> | |
| 26 | +#include <stdlib.h> | |
| 27 | +#include <stdio.h> | |
| 28 | +#include <sys/time.h> | |
| 29 | +#include <time.h> | |
| 30 | + | |
| 31 | +#include "qemu.h" | |
| 32 | + | |
| 33 | +#define HOSTED_EXIT 0 | |
| 34 | +#define HOSTED_PUTCHAR 1 /* Obsolete */ | |
| 35 | +#define HOSTED_OPEN 2 | |
| 36 | +#define HOSTED_CLOSE 3 | |
| 37 | +#define HOSTED_READ 4 | |
| 38 | +#define HOSTED_WRITE 5 | |
| 39 | +#define HOSTED_LSEEK 6 | |
| 40 | +#define HOSTED_RENAME 7 | |
| 41 | +#define HOSTED_UNLINK 8 | |
| 42 | +#define HOSTED_STAT 9 | |
| 43 | +#define HOSTED_FSTAT 10 | |
| 44 | +#define HOSTED_GETTIMEOFDAY 11 | |
| 45 | +#define HOSTED_ISATTY 12 | |
| 46 | +#define HOSTED_SYSTEM 13 | |
| 47 | + | |
| 48 | +typedef uint32_t gdb_mode_t; | |
| 49 | +typedef uint32_t gdb_time_t; | |
| 50 | + | |
| 51 | +struct m68k_gdb_stat { | |
| 52 | + uint32_t gdb_st_dev; /* device */ | |
| 53 | + uint32_t gdb_st_ino; /* inode */ | |
| 54 | + gdb_mode_t gdb_st_mode; /* protection */ | |
| 55 | + uint32_t gdb_st_nlink; /* number of hard links */ | |
| 56 | + uint32_t gdb_st_uid; /* user ID of owner */ | |
| 57 | + uint32_t gdb_st_gid; /* group ID of owner */ | |
| 58 | + uint32_t gdb_st_rdev; /* device type (if inode device) */ | |
| 59 | + uint64_t gdb_st_size; /* total size, in bytes */ | |
| 60 | + uint64_t gdb_st_blksize; /* blocksize for filesystem I/O */ | |
| 61 | + uint64_t gdb_st_blocks; /* number of blocks allocated */ | |
| 62 | + gdb_time_t gdb_st_atime; /* time of last access */ | |
| 63 | + gdb_time_t gdb_st_mtime; /* time of last modification */ | |
| 64 | + gdb_time_t gdb_st_ctime; /* time of last change */ | |
| 65 | +}; | |
| 66 | + | |
| 67 | +struct gdb_timeval { | |
| 68 | + gdb_time_t tv_sec; /* second */ | |
| 69 | + uint64_t tv_usec; /* microsecond */ | |
| 70 | +}; | |
| 71 | + | |
| 72 | +#define GDB_O_RDONLY 0x0 | |
| 73 | +#define GDB_O_WRONLY 0x1 | |
| 74 | +#define GDB_O_RDWR 0x2 | |
| 75 | +#define GDB_O_APPEND 0x8 | |
| 76 | +#define GDB_O_CREAT 0x200 | |
| 77 | +#define GDB_O_TRUNC 0x400 | |
| 78 | +#define GDB_O_EXCL 0x800 | |
| 79 | + | |
| 80 | +static int translate_openflags(int flags) | |
| 81 | +{ | |
| 82 | + int hf; | |
| 83 | + | |
| 84 | + if (flags & GDB_O_WRONLY) | |
| 85 | + hf = O_WRONLY; | |
| 86 | + else if (flags & GDB_O_RDWR) | |
| 87 | + hf = O_RDWR; | |
| 88 | + else | |
| 89 | + hf = O_RDONLY; | |
| 90 | + | |
| 91 | + if (flags & GDB_O_APPEND) hf |= O_APPEND; | |
| 92 | + if (flags & GDB_O_CREAT) hf |= O_CREAT; | |
| 93 | + if (flags & GDB_O_TRUNC) hf |= O_TRUNC; | |
| 94 | + if (flags & GDB_O_EXCL) hf |= O_EXCL; | |
| 95 | + | |
| 96 | + return hf; | |
| 97 | +} | |
| 98 | + | |
| 99 | +static void translate_stat(struct m68k_gdb_stat *p, struct stat *s) | |
| 100 | +{ | |
| 101 | + p->gdb_st_dev = tswap16(s->st_dev); | |
| 102 | + p->gdb_st_ino = tswap16(s->st_ino); | |
| 103 | + p->gdb_st_mode = tswap32(s->st_mode); | |
| 104 | + p->gdb_st_nlink = tswap16(s->st_nlink); | |
| 105 | + p->gdb_st_uid = tswap16(s->st_uid); | |
| 106 | + p->gdb_st_gid = tswap16(s->st_gid); | |
| 107 | + p->gdb_st_rdev = tswap16(s->st_rdev); | |
| 108 | + p->gdb_st_size = tswap32(s->st_size); | |
| 109 | + p->gdb_st_atime = tswap32(s->st_atime); | |
| 110 | + p->gdb_st_mtime = tswap32(s->st_mtime); | |
| 111 | + p->gdb_st_ctime = tswap32(s->st_ctime); | |
| 112 | + p->gdb_st_blksize = tswap32(s->st_blksize); | |
| 113 | + p->gdb_st_blocks = tswap32(s->st_blocks); | |
| 114 | +} | |
| 115 | + | |
| 116 | +static inline uint32_t check_err(CPUM68KState *env, uint32_t code) | |
| 117 | +{ | |
| 118 | + if (code == (uint32_t)-1) { | |
| 119 | + env->sr |= CCF_C; | |
| 120 | + } else { | |
| 121 | + env->sr &= ~CCF_C; | |
| 122 | + env->dregs[0] = code; | |
| 123 | + } | |
| 124 | + return code; | |
| 125 | +} | |
| 126 | + | |
| 127 | +#define ARG(x) tswap32(args[x]) | |
| 128 | +void do_m68k_semihosting(CPUM68KState *env, int nr) | |
| 129 | +{ | |
| 130 | + uint32_t *args; | |
| 131 | + | |
| 132 | + args = (uint32_t *)env->dregs[1]; | |
| 133 | + switch (nr) { | |
| 134 | + case HOSTED_EXIT: | |
| 135 | + exit(env->dregs[0]); | |
| 136 | + case HOSTED_OPEN: | |
| 137 | + /* Assume name is NULL terminated. */ | |
| 138 | + check_err(env, open((char *)ARG(0), translate_openflags(ARG(2)), | |
| 139 | + ARG(3))); | |
| 140 | + break; | |
| 141 | + case HOSTED_CLOSE: | |
| 142 | + { | |
| 143 | + /* Ignore attempts to close stdin/out/err. */ | |
| 144 | + int fd = ARG(0); | |
| 145 | + if (fd > 2) | |
| 146 | + check_err(env, close(fd)); | |
| 147 | + else | |
| 148 | + check_err(env, 0); | |
| 149 | + break; | |
| 150 | + } | |
| 151 | + case HOSTED_READ: | |
| 152 | + check_err(env, read(ARG(0), (void *)ARG(1), ARG(2))); | |
| 153 | + break; | |
| 154 | + case HOSTED_WRITE: | |
| 155 | + check_err(env, write(ARG(0), (void *)ARG(1), ARG(2))); | |
| 156 | + break; | |
| 157 | + case HOSTED_LSEEK: | |
| 158 | + { | |
| 159 | + uint64_t off; | |
| 160 | + off = (uint32_t)ARG(2) | ((uint64_t)ARG(1) << 32); | |
| 161 | + check_err(env, lseek(ARG(0), off, ARG(3))); | |
| 162 | + } | |
| 163 | + break; | |
| 164 | + case HOSTED_RENAME: | |
| 165 | + /* Assume names are NULL terminated. */ | |
| 166 | + check_err(env, rename((char *)ARG(0), (char *)ARG(2))); | |
| 167 | + break; | |
| 168 | + case HOSTED_UNLINK: | |
| 169 | + /* Assume name is NULL terminated. */ | |
| 170 | + check_err(env, unlink((char *)ARG(0))); | |
| 171 | + break; | |
| 172 | + case HOSTED_STAT: | |
| 173 | + /* Assume name is NULL terminated. */ | |
| 174 | + { | |
| 175 | + struct stat s; | |
| 176 | + int rc; | |
| 177 | + rc = check_err(env, stat((char *)ARG(0), &s)); | |
| 178 | + if (rc == 0) { | |
| 179 | + translate_stat((struct m68k_gdb_stat *)ARG(2), &s); | |
| 180 | + } | |
| 181 | + } | |
| 182 | + break; | |
| 183 | + case HOSTED_FSTAT: | |
| 184 | + { | |
| 185 | + struct stat s; | |
| 186 | + int rc; | |
| 187 | + rc = check_err(env, fstat(ARG(0), &s)); | |
| 188 | + if (rc == 0) { | |
| 189 | + translate_stat((struct m68k_gdb_stat *)ARG(1), &s); | |
| 190 | + } | |
| 191 | + } | |
| 192 | + break; | |
| 193 | + case HOSTED_GETTIMEOFDAY: | |
| 194 | + { | |
| 195 | + struct timeval tv; | |
| 196 | + struct gdb_timeval *p; | |
| 197 | + int rc; | |
| 198 | + rc = check_err(env, gettimeofday(&tv, NULL)); | |
| 199 | + if (rc != 0) { | |
| 200 | + p = (struct gdb_timeval *)ARG(0); | |
| 201 | + p->tv_sec = tswap32(tv.tv_sec); | |
| 202 | + p->tv_usec = tswap64(tv.tv_usec); | |
| 203 | + } | |
| 204 | + } | |
| 205 | + break; | |
| 206 | + case HOSTED_ISATTY: | |
| 207 | + check_err(env, isatty(ARG(0))); | |
| 208 | + break; | |
| 209 | + case HOSTED_SYSTEM: | |
| 210 | + /* Assume name is NULL terminated. */ | |
| 211 | + check_err(env, system((char *)ARG(0))); | |
| 212 | + break; | |
| 213 | + default: | |
| 214 | + cpu_abort(env, "Unsupported semihosting syscall %d\n", nr); | |
| 215 | + } | |
| 216 | +} | ... | ... |
linux-user/m68k-sim.c
0 → 100644
| 1 | +/* | |
| 2 | + * m68k simulator syscall interface | |
| 3 | + * | |
| 4 | + * Copyright (c) 2005 CodeSourcery, LLC. Written by Paul Brook. | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License as published by | |
| 8 | + * the Free Software Foundation; either version 2 of the License, or | |
| 9 | + * (at your option) any later version. | |
| 10 | + * | |
| 11 | + * This program is distributed in the hope that it will be useful, | |
| 12 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | + * GNU General Public License for more details. | |
| 15 | + * | |
| 16 | + * You should have received a copy of the GNU General Public License | |
| 17 | + * along with this program; if not, write to the Free Software | |
| 18 | + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
| 19 | + */ | |
| 20 | + | |
| 21 | +#include <sys/types.h> | |
| 22 | +#include <sys/stat.h> | |
| 23 | +#include <errno.h> | |
| 24 | +#include <fcntl.h> | |
| 25 | +#include <unistd.h> | |
| 26 | +#include <stdlib.h> | |
| 27 | +#include <stdio.h> | |
| 28 | +#include <time.h> | |
| 29 | + | |
| 30 | +#include "qemu.h" | |
| 31 | + | |
| 32 | +#define SYS_EXIT 1 | |
| 33 | +#define SYS_READ 3 | |
| 34 | +#define SYS_WRITE 4 | |
| 35 | +#define SYS_OPEN 5 | |
| 36 | +#define SYS_CLOSE 6 | |
| 37 | +#define SYS_BRK 17 | |
| 38 | +#define SYS_FSTAT 28 | |
| 39 | +#define SYS_ISATTY 29 | |
| 40 | +#define SYS_LSEEK 199 | |
| 41 | + | |
| 42 | +struct m86k_sim_stat { | |
| 43 | + uint16_t sim_st_dev; | |
| 44 | + uint16_t sim_st_ino; | |
| 45 | + uint32_t sim_st_mode; | |
| 46 | + uint16_t sim_st_nlink; | |
| 47 | + uint16_t sim_st_uid; | |
| 48 | + uint16_t sim_st_gid; | |
| 49 | + uint16_t sim_st_rdev; | |
| 50 | + uint32_t sim_st_size; | |
| 51 | + uint32_t sim_st_atime; | |
| 52 | + uint32_t sim_st_mtime; | |
| 53 | + uint32_t sim_st_ctime; | |
| 54 | + uint32_t sim_st_blksize; | |
| 55 | + uint32_t sim_st_blocks; | |
| 56 | +}; | |
| 57 | + | |
| 58 | +static inline uint32_t check_err(CPUM68KState *env, uint32_t code) | |
| 59 | +{ | |
| 60 | + env->dregs[0] = code; | |
| 61 | + if (code == (uint32_t)-1) { | |
| 62 | + env->dregs[1] = errno; | |
| 63 | + } else { | |
| 64 | + env->dregs[1] = 0; | |
| 65 | + } | |
| 66 | + return code; | |
| 67 | +} | |
| 68 | + | |
| 69 | +#define SIM_O_APPEND 0x0008 | |
| 70 | +#define SIM_O_CREAT 0x0200 | |
| 71 | +#define SIM_O_TRUNC 0x0400 | |
| 72 | +#define SIM_O_EXCL 0x0800 | |
| 73 | +#define SIM_O_NONBLOCK 0x4000 | |
| 74 | +#define SIM_O_NOCTTY 0x8000 | |
| 75 | +#define SIM_O_SYNC 0x2000 | |
| 76 | + | |
| 77 | +static int translate_openflags(int flags) | |
| 78 | +{ | |
| 79 | + int hf; | |
| 80 | + | |
| 81 | + switch (flags & 3) { | |
| 82 | + case 0: hf = O_RDONLY; break; | |
| 83 | + case 1: hf = O_WRONLY; break; | |
| 84 | + case 2: hf = O_RDWR; break; | |
| 85 | + default: hf = O_RDWR; break; | |
| 86 | + } | |
| 87 | + | |
| 88 | + if (flags & SIM_O_APPEND) hf |= O_APPEND; | |
| 89 | + if (flags & SIM_O_CREAT) hf |= O_CREAT; | |
| 90 | + if (flags & SIM_O_TRUNC) hf |= O_TRUNC; | |
| 91 | + if (flags & SIM_O_EXCL) hf |= O_EXCL; | |
| 92 | + if (flags & SIM_O_NONBLOCK) hf |= O_NONBLOCK; | |
| 93 | + if (flags & SIM_O_NOCTTY) hf |= O_NOCTTY; | |
| 94 | + if (flags & SIM_O_SYNC) hf |= O_SYNC; | |
| 95 | + | |
| 96 | + return hf; | |
| 97 | +} | |
| 98 | + | |
| 99 | +#define ARG(x) tswap32(args[x]) | |
| 100 | +void do_m68k_simcall(CPUM68KState *env, int nr) | |
| 101 | +{ | |
| 102 | + uint32_t *args; | |
| 103 | + | |
| 104 | + args = (uint32_t *)(env->aregs[7] + 4); | |
| 105 | + switch (nr) { | |
| 106 | + case SYS_EXIT: | |
| 107 | + exit(ARG(0)); | |
| 108 | + case SYS_READ: | |
| 109 | + check_err(env, read(ARG(0), (void *)ARG(1), ARG(2))); | |
| 110 | + break; | |
| 111 | + case SYS_WRITE: | |
| 112 | + check_err(env, write(ARG(0), (void *)ARG(1), ARG(2))); | |
| 113 | + break; | |
| 114 | + case SYS_OPEN: | |
| 115 | + check_err(env, open((char *)ARG(0), translate_openflags(ARG(1)), | |
| 116 | + ARG(2))); | |
| 117 | + break; | |
| 118 | + case SYS_CLOSE: | |
| 119 | + { | |
| 120 | + /* Ignore attempts to close stdin/out/err. */ | |
| 121 | + int fd = ARG(0); | |
| 122 | + if (fd > 2) | |
| 123 | + check_err(env, close(fd)); | |
| 124 | + else | |
| 125 | + check_err(env, 0); | |
| 126 | + break; | |
| 127 | + } | |
| 128 | + case SYS_BRK: | |
| 129 | + { | |
| 130 | + int32_t ret; | |
| 131 | + | |
| 132 | + ret = do_brk((void *)ARG(0)); | |
| 133 | + if (ret == -ENOMEM) | |
| 134 | + ret = -1; | |
| 135 | + check_err(env, ret); | |
| 136 | + } | |
| 137 | + break; | |
| 138 | + case SYS_FSTAT: | |
| 139 | + { | |
| 140 | + struct stat s; | |
| 141 | + int rc; | |
| 142 | + struct m86k_sim_stat *p; | |
| 143 | + rc = check_err(env, fstat(ARG(0), &s)); | |
| 144 | + if (rc == 0) { | |
| 145 | + p = (struct m86k_sim_stat *)ARG(1); | |
| 146 | + p->sim_st_dev = tswap16(s.st_dev); | |
| 147 | + p->sim_st_ino = tswap16(s.st_ino); | |
| 148 | + p->sim_st_mode = tswap32(s.st_mode); | |
| 149 | + p->sim_st_nlink = tswap16(s.st_nlink); | |
| 150 | + p->sim_st_uid = tswap16(s.st_uid); | |
| 151 | + p->sim_st_gid = tswap16(s.st_gid); | |
| 152 | + p->sim_st_rdev = tswap16(s.st_rdev); | |
| 153 | + p->sim_st_size = tswap32(s.st_size); | |
| 154 | + p->sim_st_atime = tswap32(s.st_atime); | |
| 155 | + p->sim_st_mtime = tswap32(s.st_mtime); | |
| 156 | + p->sim_st_ctime = tswap32(s.st_ctime); | |
| 157 | + p->sim_st_blksize = tswap32(s.st_blksize); | |
| 158 | + p->sim_st_blocks = tswap32(s.st_blocks); | |
| 159 | + } | |
| 160 | + } | |
| 161 | + break; | |
| 162 | + case SYS_ISATTY: | |
| 163 | + check_err(env, isatty(ARG(0))); | |
| 164 | + break; | |
| 165 | + case SYS_LSEEK: | |
| 166 | + check_err(env, lseek(ARG(0), (int32_t)ARG(1), ARG(2))); | |
| 167 | + break; | |
| 168 | + default: | |
| 169 | + cpu_abort(env, "Unsupported m68k sim syscall %d\n", nr); | |
| 170 | + } | |
| 171 | +} | ... | ... |
linux-user/m68k/syscall.h
0 → 100644
| 1 | + | |
| 2 | +/* this struct defines the way the registers are stored on the | |
| 3 | + stack during a system call. */ | |
| 4 | + | |
| 5 | +struct target_pt_regs { | |
| 6 | + target_long d1, d2, d3, d4, d5, d6, d7; | |
| 7 | + target_long a0, a1, a2, a3, a4, a5, a6; | |
| 8 | + target_ulong d0; | |
| 9 | + target_ulong usp; | |
| 10 | + target_ulong orig_d0; | |
| 11 | + int16_t stkadj; | |
| 12 | + uint16_t sr; | |
| 13 | + target_ulong pc; | |
| 14 | + uint16_t fntvex; | |
| 15 | + uint16_t __fill; | |
| 16 | +}; | |
| 17 | + | |
| 18 | + | |
| 19 | +#define UNAME_MACHINE "m68k" | |
| 20 | + | |
| 21 | +void do_m68k_semihosting(CPUState *, int); | |
| 22 | +void do_m68k_simcall(CPUState *, int); | ... | ... |
linux-user/m68k/syscall_nr.h
0 → 100644
| 1 | +/* | |
| 2 | + * This file contains the system call numbers. | |
| 3 | + */ | |
| 4 | + | |
| 5 | +#define TARGET_NR_exit 1 | |
| 6 | +#define TARGET_NR_fork 2 | |
| 7 | +#define TARGET_NR_read 3 | |
| 8 | +#define TARGET_NR_write 4 | |
| 9 | +#define TARGET_NR_open 5 | |
| 10 | +#define TARGET_NR_close 6 | |
| 11 | +#define TARGET_NR_waitpid 7 | |
| 12 | +#define TARGET_NR_creat 8 | |
| 13 | +#define TARGET_NR_link 9 | |
| 14 | +#define TARGET_NR_unlink 10 | |
| 15 | +#define TARGET_NR_execve 11 | |
| 16 | +#define TARGET_NR_chdir 12 | |
| 17 | +#define TARGET_NR_time 13 | |
| 18 | +#define TARGET_NR_mknod 14 | |
| 19 | +#define TARGET_NR_chmod 15 | |
| 20 | +#define TARGET_NR_chown 16 | |
| 21 | +#define TARGET_NR_break 17 | |
| 22 | +#define TARGET_NR_oldstat 18 | |
| 23 | +#define TARGET_NR_lseek 19 | |
| 24 | +#define TARGET_NR_getpid 20 | |
| 25 | +#define TARGET_NR_mount 21 | |
| 26 | +#define TARGET_NR_umount 22 | |
| 27 | +#define TARGET_NR_setuid 23 | |
| 28 | +#define TARGET_NR_getuid 24 | |
| 29 | +#define TARGET_NR_stime 25 | |
| 30 | +#define TARGET_NR_ptrace 26 | |
| 31 | +#define TARGET_NR_alarm 27 | |
| 32 | +#define TARGET_NR_oldfstat 28 | |
| 33 | +#define TARGET_NR_pause 29 | |
| 34 | +#define TARGET_NR_utime 30 | |
| 35 | +#define TARGET_NR_stty 31 | |
| 36 | +#define TARGET_NR_gtty 32 | |
| 37 | +#define TARGET_NR_access 33 | |
| 38 | +#define TARGET_NR_nice 34 | |
| 39 | +#define TARGET_NR_ftime 35 | |
| 40 | +#define TARGET_NR_sync 36 | |
| 41 | +#define TARGET_NR_kill 37 | |
| 42 | +#define TARGET_NR_rename 38 | |
| 43 | +#define TARGET_NR_mkdir 39 | |
| 44 | +#define TARGET_NR_rmdir 40 | |
| 45 | +#define TARGET_NR_dup 41 | |
| 46 | +#define TARGET_NR_pipe 42 | |
| 47 | +#define TARGET_NR_times 43 | |
| 48 | +#define TARGET_NR_prof 44 | |
| 49 | +#define TARGET_NR_brk 45 | |
| 50 | +#define TARGET_NR_setgid 46 | |
| 51 | +#define TARGET_NR_getgid 47 | |
| 52 | +#define TARGET_NR_signal 48 | |
| 53 | +#define TARGET_NR_geteuid 49 | |
| 54 | +#define TARGET_NR_getegid 50 | |
| 55 | +#define TARGET_NR_acct 51 | |
| 56 | +#define TARGET_NR_umount2 52 | |
| 57 | +#define TARGET_NR_lock 53 | |
| 58 | +#define TARGET_NR_ioctl 54 | |
| 59 | +#define TARGET_NR_fcntl 55 | |
| 60 | +#define TARGET_NR_mpx 56 | |
| 61 | +#define TARGET_NR_setpgid 57 | |
| 62 | +#define TARGET_NR_ulimit 58 | |
| 63 | +#define TARGET_NR_oldolduname 59 | |
| 64 | +#define TARGET_NR_umask 60 | |
| 65 | +#define TARGET_NR_chroot 61 | |
| 66 | +#define TARGET_NR_ustat 62 | |
| 67 | +#define TARGET_NR_dup2 63 | |
| 68 | +#define TARGET_NR_getppid 64 | |
| 69 | +#define TARGET_NR_getpgrp 65 | |
| 70 | +#define TARGET_NR_setsid 66 | |
| 71 | +#define TARGET_NR_sigaction 67 | |
| 72 | +#define TARGET_NR_sgetmask 68 | |
| 73 | +#define TARGET_NR_ssetmask 69 | |
| 74 | +#define TARGET_NR_setreuid 70 | |
| 75 | +#define TARGET_NR_setregid 71 | |
| 76 | +#define TARGET_NR_sigsuspend 72 | |
| 77 | +#define TARGET_NR_sigpending 73 | |
| 78 | +#define TARGET_NR_sethostname 74 | |
| 79 | +#define TARGET_NR_setrlimit 75 | |
| 80 | +#define TARGET_NR_getrlimit 76 | |
| 81 | +#define TARGET_NR_getrusage 77 | |
| 82 | +#define TARGET_NR_gettimeofday 78 | |
| 83 | +#define TARGET_NR_settimeofday 79 | |
| 84 | +#define TARGET_NR_getgroups 80 | |
| 85 | +#define TARGET_NR_setgroups 81 | |
| 86 | +#define TARGET_NR_select 82 | |
| 87 | +#define TARGET_NR_symlink 83 | |
| 88 | +#define TARGET_NR_oldlstat 84 | |
| 89 | +#define TARGET_NR_readlink 85 | |
| 90 | +#define TARGET_NR_uselib 86 | |
| 91 | +#define TARGET_NR_swapon 87 | |
| 92 | +#define TARGET_NR_reboot 88 | |
| 93 | +#define TARGET_NR_readdir 89 | |
| 94 | +#define TARGET_NR_mmap 90 | |
| 95 | +#define TARGET_NR_munmap 91 | |
| 96 | +#define TARGET_NR_truncate 92 | |
| 97 | +#define TARGET_NR_ftruncate 93 | |
| 98 | +#define TARGET_NR_fchmod 94 | |
| 99 | +#define TARGET_NR_fchown 95 | |
| 100 | +#define TARGET_NR_getpriority 96 | |
| 101 | +#define TARGET_NR_setpriority 97 | |
| 102 | +#define TARGET_NR_profil 98 | |
| 103 | +#define TARGET_NR_statfs 99 | |
| 104 | +#define TARGET_NR_fstatfs 100 | |
| 105 | +#define TARGET_NR_ioperm 101 | |
| 106 | +#define TARGET_NR_socketcall 102 | |
| 107 | +#define TARGET_NR_syslog 103 | |
| 108 | +#define TARGET_NR_setitimer 104 | |
| 109 | +#define TARGET_NR_getitimer 105 | |
| 110 | +#define TARGET_NR_stat 106 | |
| 111 | +#define TARGET_NR_lstat 107 | |
| 112 | +#define TARGET_NR_fstat 108 | |
| 113 | +#define TARGET_NR_olduname 109 | |
| 114 | +//#define TARGET_NR_iopl /* 110 */ not supported | |
| 115 | +#define TARGET_NR_vhangup 111 | |
| 116 | +//#define TARGET_NR_idle /* 112 */ Obsolete | |
| 117 | +//#define TARGET_NR_vm86 /* 113 */ not supported | |
| 118 | +#define TARGET_NR_wait4 114 | |
| 119 | +#define TARGET_NR_swapoff 115 | |
| 120 | +#define TARGET_NR_sysinfo 116 | |
| 121 | +#define TARGET_NR_ipc 117 | |
| 122 | +#define TARGET_NR_fsync 118 | |
| 123 | +#define TARGET_NR_sigreturn 119 | |
| 124 | +#define TARGET_NR_clone 120 | |
| 125 | +#define TARGET_NR_setdomainname 121 | |
| 126 | +#define TARGET_NR_uname 122 | |
| 127 | +#define TARGET_NR_cacheflush 123 | |
| 128 | +#define TARGET_NR_adjtimex 124 | |
| 129 | +#define TARGET_NR_mprotect 125 | |
| 130 | +#define TARGET_NR_sigprocmask 126 | |
| 131 | +#define TARGET_NR_create_module 127 | |
| 132 | +#define TARGET_NR_init_module 128 | |
| 133 | +#define TARGET_NR_delete_module 129 | |
| 134 | +#define TARGET_NR_get_kernel_syms 130 | |
| 135 | +#define TARGET_NR_quotactl 131 | |
| 136 | +#define TARGET_NR_getpgid 132 | |
| 137 | +#define TARGET_NR_fchdir 133 | |
| 138 | +#define TARGET_NR_bdflush 134 | |
| 139 | +#define TARGET_NR_sysfs 135 | |
| 140 | +#define TARGET_NR_personality 136 | |
| 141 | +#define TARGET_NR_afs_syscall 137 /* Syscall for Andrew File System */ | |
| 142 | +#define TARGET_NR_setfsuid 138 | |
| 143 | +#define TARGET_NR_setfsgid 139 | |
| 144 | +#define TARGET_NR__llseek 140 | |
| 145 | +#define TARGET_NR_getdents 141 | |
| 146 | +#define TARGET_NR__newselect 142 | |
| 147 | +#define TARGET_NR_flock 143 | |
| 148 | +#define TARGET_NR_msync 144 | |
| 149 | +#define TARGET_NR_readv 145 | |
| 150 | +#define TARGET_NR_writev 146 | |
| 151 | +#define TARGET_NR_getsid 147 | |
| 152 | +#define TARGET_NR_fdatasync 148 | |
| 153 | +#define TARGET_NR__sysctl 149 | |
| 154 | +#define TARGET_NR_mlock 150 | |
| 155 | +#define TARGET_NR_munlock 151 | |
| 156 | +#define TARGET_NR_mlockall 152 | |
| 157 | +#define TARGET_NR_munlockall 153 | |
| 158 | +#define TARGET_NR_sched_setparam 154 | |
| 159 | +#define TARGET_NR_sched_getparam 155 | |
| 160 | +#define TARGET_NR_sched_setscheduler 156 | |
| 161 | +#define TARGET_NR_sched_getscheduler 157 | |
| 162 | +#define TARGET_NR_sched_yield 158 | |
| 163 | +#define TARGET_NR_sched_get_priority_max 159 | |
| 164 | +#define TARGET_NR_sched_get_priority_min 160 | |
| 165 | +#define TARGET_NR_sched_rr_get_interval 161 | |
| 166 | +#define TARGET_NR_nanosleep 162 | |
| 167 | +#define TARGET_NR_mremap 163 | |
| 168 | +#define TARGET_NR_setresuid 164 | |
| 169 | +#define TARGET_NR_getresuid 165 | |
| 170 | +#define TARGET_NR_getpagesize 166 | |
| 171 | +#define TARGET_NR_query_module 167 | |
| 172 | +#define TARGET_NR_poll 168 | |
| 173 | +#define TARGET_NR_nfsservctl 169 | |
| 174 | +#define TARGET_NR_setresgid 170 | |
| 175 | +#define TARGET_NR_getresgid 171 | |
| 176 | +#define TARGET_NR_prctl 172 | |
| 177 | +#define TARGET_NR_rt_sigreturn 173 | |
| 178 | +#define TARGET_NR_rt_sigaction 174 | |
| 179 | +#define TARGET_NR_rt_sigprocmask 175 | |
| 180 | +#define TARGET_NR_rt_sigpending 176 | |
| 181 | +#define TARGET_NR_rt_sigtimedwait 177 | |
| 182 | +#define TARGET_NR_rt_sigqueueinfo 178 | |
| 183 | +#define TARGET_NR_rt_sigsuspend 179 | |
| 184 | +#define TARGET_NR_pread64 180 | |
| 185 | +#define TARGET_NR_pwrite64 181 | |
| 186 | +#define TARGET_NR_lchown 182 | |
| 187 | +#define TARGET_NR_getcwd 183 | |
| 188 | +#define TARGET_NR_capget 184 | |
| 189 | +#define TARGET_NR_capset 185 | |
| 190 | +#define TARGET_NR_sigaltstack 186 | |
| 191 | +#define TARGET_NR_sendfile 187 | |
| 192 | +#define TARGET_NR_getpmsg 188 /* some people actually want streams */ | |
| 193 | +#define TARGET_NR_putpmsg 189 /* some people actually want streams */ | |
| 194 | +#define TARGET_NR_vfork 190 | |
| 195 | +#define TARGET_NR_ugetrlimit 191 | |
| 196 | +#define TARGET_NR_mmap2 192 | |
| 197 | +#define TARGET_NR_truncate64 193 | |
| 198 | +#define TARGET_NR_ftruncate64 194 | |
| 199 | +#define TARGET_NR_stat64 195 | |
| 200 | +#define TARGET_NR_lstat64 196 | |
| 201 | +#define TARGET_NR_fstat64 197 | |
| 202 | +#define TARGET_NR_chown32 198 | |
| 203 | +#define TARGET_NR_getuid32 199 | |
| 204 | +#define TARGET_NR_getgid32 200 | |
| 205 | +#define TARGET_NR_geteuid32 201 | |
| 206 | +#define TARGET_NR_getegid32 202 | |
| 207 | +#define TARGET_NR_setreuid32 203 | |
| 208 | +#define TARGET_NR_setregid32 204 | |
| 209 | +#define TARGET_NR_getgroups32 205 | |
| 210 | +#define TARGET_NR_setgroups32 206 | |
| 211 | +#define TARGET_NR_fchown32 207 | |
| 212 | +#define TARGET_NR_setresuid32 208 | |
| 213 | +#define TARGET_NR_getresuid32 209 | |
| 214 | +#define TARGET_NR_setresgid32 210 | |
| 215 | +#define TARGET_NR_getresgid32 211 | |
| 216 | +#define TARGET_NR_lchown32 212 | |
| 217 | +#define TARGET_NR_setuid32 213 | |
| 218 | +#define TARGET_NR_setgid32 214 | |
| 219 | +#define TARGET_NR_setfsuid32 215 | |
| 220 | +#define TARGET_NR_setfsgid32 216 | |
| 221 | +#define TARGET_NR_pivot_root 217 | |
| 222 | +#define TARGET_NR_getdents64 220 | |
| 223 | +#define TARGET_NR_gettid 221 | |
| 224 | +#define TARGET_NR_tkill 222 | |
| 225 | +#define TARGET_NR_setxattr 223 | |
| 226 | +#define TARGET_NR_lsetxattr 224 | |
| 227 | +#define TARGET_NR_fsetxattr 225 | |
| 228 | +#define TARGET_NR_getxattr 226 | |
| 229 | +#define TARGET_NR_lgetxattr 227 | |
| 230 | +#define TARGET_NR_fgetxattr 228 | |
| 231 | +#define TARGET_NR_listxattr 229 | |
| 232 | +#define TARGET_NR_llistxattr 230 | |
| 233 | +#define TARGET_NR_flistxattr 231 | |
| 234 | +#define TARGET_NR_removexattr 232 | |
| 235 | +#define TARGET_NR_lremovexattr 233 | |
| 236 | +#define TARGET_NR_fremovexattr 234 | |
| 237 | +#define TARGET_NR_futex 235 | |
| 238 | +#define TARGET_NR_sendfile64 236 | |
| 239 | +#define TARGET_NR_mincore 237 | |
| 240 | +#define TARGET_NR_madvise 238 | |
| 241 | +#define TARGET_NR_fcntl64 239 | |
| 242 | +#define TARGET_NR_readahead 240 | |
| 243 | +#define TARGET_NR_io_setup 241 | |
| 244 | +#define TARGET_NR_io_destroy 242 | |
| 245 | +#define TARGET_NR_io_getevents 243 | |
| 246 | +#define TARGET_NR_io_submit 244 | |
| 247 | +#define TARGET_NR_io_cancel 245 | |
| 248 | +#define TARGET_NR_fadvise64 246 | |
| 249 | +#define TARGET_NR_exit_group 247 | |
| 250 | +#define TARGET_NR_lookup_dcookie 248 | |
| 251 | +#define TARGET_NR_epoll_create 249 | |
| 252 | +#define TARGET_NR_epoll_ctl 250 | |
| 253 | +#define TARGET_NR_epoll_wait 251 | |
| 254 | +#define TARGET_NR_remap_file_pages 252 | |
| 255 | +#define TARGET_NR_set_tid_address 253 | |
| 256 | +#define TARGET_NR_timer_create 254 | |
| 257 | +#define TARGET_NR_timer_settime 255 | |
| 258 | +#define TARGET_NR_timer_gettime 256 | |
| 259 | +#define TARGET_NR_timer_getoverrun 257 | |
| 260 | +#define TARGET_NR_timer_delete 258 | |
| 261 | +#define TARGET_NR_clock_settime 259 | |
| 262 | +#define TARGET_NR_clock_gettime 260 | |
| 263 | +#define TARGET_NR_clock_getres 261 | |
| 264 | +#define TARGET_NR_clock_nanosleep 262 | |
| 265 | +#define TARGET_NR_statfs64 263 | |
| 266 | +#define TARGET_NR_fstatfs64 264 | |
| 267 | +#define TARGET_NR_tgkill 265 | |
| 268 | +#define TARGET_NR_utimes 266 | |
| 269 | +#define TARGET_NR_fadvise64_64 267 | |
| 270 | +#define TARGET_NR_mbind 268 | |
| 271 | +#define TARGET_NR_get_mempolicy 269 | |
| 272 | +#define TARGET_NR_set_mempolicy 270 | |
| 273 | +#define TARGET_NR_mq_open 271 | |
| 274 | +#define TARGET_NR_mq_unlink 272 | |
| 275 | +#define TARGET_NR_mq_timedsend 273 | |
| 276 | +#define TARGET_NR_mq_timedreceive 274 | |
| 277 | +#define TARGET_NR_mq_notify 275 | |
| 278 | +#define TARGET_NR_mq_getsetattr 276 | |
| 279 | +#define TARGET_NR_waitid 277 | |
| 280 | +#define TARGET_NR_vserver 278 | |
| 281 | +#define TARGET_NR_add_key 279 | |
| 282 | +#define TARGET_NR_request_key 280 | |
| 283 | +#define TARGET_NR_keyctl 281 | ... | ... |
linux-user/m68k/termbits.h
0 → 100644
| 1 | +/* from asm/termbits.h */ | |
| 2 | +/* NOTE: exactly the same as i386 */ | |
| 3 | + | |
| 4 | +#define TARGET_NCCS 19 | |
| 5 | + | |
| 6 | +struct target_termios { | |
| 7 | + unsigned int c_iflag; /* input mode flags */ | |
| 8 | + unsigned int c_oflag; /* output mode flags */ | |
| 9 | + unsigned int c_cflag; /* control mode flags */ | |
| 10 | + unsigned int c_lflag; /* local mode flags */ | |
| 11 | + unsigned char c_line; /* line discipline */ | |
| 12 | + unsigned char c_cc[TARGET_NCCS]; /* control characters */ | |
| 13 | +}; | |
| 14 | + | |
| 15 | +/* c_iflag bits */ | |
| 16 | +#define TARGET_IGNBRK 0000001 | |
| 17 | +#define TARGET_BRKINT 0000002 | |
| 18 | +#define TARGET_IGNPAR 0000004 | |
| 19 | +#define TARGET_PARMRK 0000010 | |
| 20 | +#define TARGET_INPCK 0000020 | |
| 21 | +#define TARGET_ISTRIP 0000040 | |
| 22 | +#define TARGET_INLCR 0000100 | |
| 23 | +#define TARGET_IGNCR 0000200 | |
| 24 | +#define TARGET_ICRNL 0000400 | |
| 25 | +#define TARGET_IUCLC 0001000 | |
| 26 | +#define TARGET_IXON 0002000 | |
| 27 | +#define TARGET_IXANY 0004000 | |
| 28 | +#define TARGET_IXOFF 0010000 | |
| 29 | +#define TARGET_IMAXBEL 0020000 | |
| 30 | + | |
| 31 | +/* c_oflag bits */ | |
| 32 | +#define TARGET_OPOST 0000001 | |
| 33 | +#define TARGET_OLCUC 0000002 | |
| 34 | +#define TARGET_ONLCR 0000004 | |
| 35 | +#define TARGET_OCRNL 0000010 | |
| 36 | +#define TARGET_ONOCR 0000020 | |
| 37 | +#define TARGET_ONLRET 0000040 | |
| 38 | +#define TARGET_OFILL 0000100 | |
| 39 | +#define TARGET_OFDEL 0000200 | |
| 40 | +#define TARGET_NLDLY 0000400 | |
| 41 | +#define TARGET_NL0 0000000 | |
| 42 | +#define TARGET_NL1 0000400 | |
| 43 | +#define TARGET_CRDLY 0003000 | |
| 44 | +#define TARGET_CR0 0000000 | |
| 45 | +#define TARGET_CR1 0001000 | |
| 46 | +#define TARGET_CR2 0002000 | |
| 47 | +#define TARGET_CR3 0003000 | |
| 48 | +#define TARGET_TABDLY 0014000 | |
| 49 | +#define TARGET_TAB0 0000000 | |
| 50 | +#define TARGET_TAB1 0004000 | |
| 51 | +#define TARGET_TAB2 0010000 | |
| 52 | +#define TARGET_TAB3 0014000 | |
| 53 | +#define TARGET_XTABS 0014000 | |
| 54 | +#define TARGET_BSDLY 0020000 | |
| 55 | +#define TARGET_BS0 0000000 | |
| 56 | +#define TARGET_BS1 0020000 | |
| 57 | +#define TARGET_VTDLY 0040000 | |
| 58 | +#define TARGET_VT0 0000000 | |
| 59 | +#define TARGET_VT1 0040000 | |
| 60 | +#define TARGET_FFDLY 0100000 | |
| 61 | +#define TARGET_FF0 0000000 | |
| 62 | +#define TARGET_FF1 0100000 | |
| 63 | + | |
| 64 | +/* c_cflag bit meaning */ | |
| 65 | +#define TARGET_CBAUD 0010017 | |
| 66 | +#define TARGET_B0 0000000 /* hang up */ | |
| 67 | +#define TARGET_B50 0000001 | |
| 68 | +#define TARGET_B75 0000002 | |
| 69 | +#define TARGET_B110 0000003 | |
| 70 | +#define TARGET_B134 0000004 | |
| 71 | +#define TARGET_B150 0000005 | |
| 72 | +#define TARGET_B200 0000006 | |
| 73 | +#define TARGET_B300 0000007 | |
| 74 | +#define TARGET_B600 0000010 | |
| 75 | +#define TARGET_B1200 0000011 | |
| 76 | +#define TARGET_B1800 0000012 | |
| 77 | +#define TARGET_B2400 0000013 | |
| 78 | +#define TARGET_B4800 0000014 | |
| 79 | +#define TARGET_B9600 0000015 | |
| 80 | +#define TARGET_B19200 0000016 | |
| 81 | +#define TARGET_B38400 0000017 | |
| 82 | +#define TARGET_EXTA B19200 | |
| 83 | +#define TARGET_EXTB B38400 | |
| 84 | +#define TARGET_CSIZE 0000060 | |
| 85 | +#define TARGET_CS5 0000000 | |
| 86 | +#define TARGET_CS6 0000020 | |
| 87 | +#define TARGET_CS7 0000040 | |
| 88 | +#define TARGET_CS8 0000060 | |
| 89 | +#define TARGET_CSTOPB 0000100 | |
| 90 | +#define TARGET_CREAD 0000200 | |
| 91 | +#define TARGET_PARENB 0000400 | |
| 92 | +#define TARGET_PARODD 0001000 | |
| 93 | +#define TARGET_HUPCL 0002000 | |
| 94 | +#define TARGET_CLOCAL 0004000 | |
| 95 | +#define TARGET_CBAUDEX 0010000 | |
| 96 | +#define TARGET_B57600 0010001 | |
| 97 | +#define TARGET_B115200 0010002 | |
| 98 | +#define TARGET_B230400 0010003 | |
| 99 | +#define TARGET_B460800 0010004 | |
| 100 | +#define TARGET_CIBAUD 002003600000 /* input baud rate (not used) */ | |
| 101 | +#define TARGET_CRTSCTS 020000000000 /* flow control */ | |
| 102 | + | |
| 103 | +/* c_lflag bits */ | |
| 104 | +#define TARGET_ISIG 0000001 | |
| 105 | +#define TARGET_ICANON 0000002 | |
| 106 | +#define TARGET_XCASE 0000004 | |
| 107 | +#define TARGET_ECHO 0000010 | |
| 108 | +#define TARGET_ECHOE 0000020 | |
| 109 | +#define TARGET_ECHOK 0000040 | |
| 110 | +#define TARGET_ECHONL 0000100 | |
| 111 | +#define TARGET_NOFLSH 0000200 | |
| 112 | +#define TARGET_TOSTOP 0000400 | |
| 113 | +#define TARGET_ECHOCTL 0001000 | |
| 114 | +#define TARGET_ECHOPRT 0002000 | |
| 115 | +#define TARGET_ECHOKE 0004000 | |
| 116 | +#define TARGET_FLUSHO 0010000 | |
| 117 | +#define TARGET_PENDIN 0040000 | |
| 118 | +#define TARGET_IEXTEN 0100000 | |
| 119 | + | |
| 120 | +/* c_cc character offsets */ | |
| 121 | +#define TARGET_VINTR 0 | |
| 122 | +#define TARGET_VQUIT 1 | |
| 123 | +#define TARGET_VERASE 2 | |
| 124 | +#define TARGET_VKILL 3 | |
| 125 | +#define TARGET_VEOF 4 | |
| 126 | +#define TARGET_VTIME 5 | |
| 127 | +#define TARGET_VMIN 6 | |
| 128 | +#define TARGET_VSWTC 7 | |
| 129 | +#define TARGET_VSTART 8 | |
| 130 | +#define TARGET_VSTOP 9 | |
| 131 | +#define TARGET_VSUSP 10 | |
| 132 | +#define TARGET_VEOL 11 | |
| 133 | +#define TARGET_VREPRINT 12 | |
| 134 | +#define TARGET_VDISCARD 13 | |
| 135 | +#define TARGET_VWERASE 14 | |
| 136 | +#define TARGET_VLNEXT 15 | |
| 137 | +#define TARGET_VEOL2 16 | |
| 138 | + | |
| 139 | +/* ioctls */ | |
| 140 | + | |
| 141 | +#define TARGET_TCGETS 0x5401 | |
| 142 | +#define TARGET_TCSETS 0x5402 | |
| 143 | +#define TARGET_TCSETSW 0x5403 | |
| 144 | +#define TARGET_TCSETSF 0x5404 | |
| 145 | +#define TARGET_TCGETA 0x5405 | |
| 146 | +#define TARGET_TCSETA 0x5406 | |
| 147 | +#define TARGET_TCSETAW 0x5407 | |
| 148 | +#define TARGET_TCSETAF 0x5408 | |
| 149 | +#define TARGET_TCSBRK 0x5409 | |
| 150 | +#define TARGET_TCXONC 0x540A | |
| 151 | +#define TARGET_TCFLSH 0x540B | |
| 152 | + | |
| 153 | +#define TARGET_TIOCEXCL 0x540C | |
| 154 | +#define TARGET_TIOCNXCL 0x540D | |
| 155 | +#define TARGET_TIOCSCTTY 0x540E | |
| 156 | +#define TARGET_TIOCGPGRP 0x540F | |
| 157 | +#define TARGET_TIOCSPGRP 0x5410 | |
| 158 | +#define TARGET_TIOCOUTQ 0x5411 | |
| 159 | +#define TARGET_TIOCSTI 0x5412 | |
| 160 | +#define TARGET_TIOCGWINSZ 0x5413 | |
| 161 | +#define TARGET_TIOCSWINSZ 0x5414 | |
| 162 | +#define TARGET_TIOCMGET 0x5415 | |
| 163 | +#define TARGET_TIOCMBIS 0x5416 | |
| 164 | +#define TARGET_TIOCMBIC 0x5417 | |
| 165 | +#define TARGET_TIOCMSET 0x5418 | |
| 166 | +#define TARGET_TIOCGSOFTCAR 0x5419 | |
| 167 | +#define TARGET_TIOCSSOFTCAR 0x541A | |
| 168 | +#define TARGET_FIONREAD 0x541B | |
| 169 | +#define TARGET_TIOCINQ TARGET_FIONREAD | |
| 170 | +#define TARGET_TIOCLINUX 0x541C | |
| 171 | +#define TARGET_TIOCCONS 0x541D | |
| 172 | +#define TARGET_TIOCGSERIAL 0x541E | |
| 173 | +#define TARGET_TIOCSSERIAL 0x541F | |
| 174 | +#define TARGET_TIOCPKT 0x5420 | |
| 175 | +#define TARGET_FIONBIO 0x5421 | |
| 176 | +#define TARGET_TIOCNOTTY 0x5422 | |
| 177 | +#define TARGET_TIOCSETD 0x5423 | |
| 178 | +#define TARGET_TIOCGETD 0x5424 | |
| 179 | +#define TARGET_TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ | |
| 180 | +#define TARGET_TIOCTTYGSTRUCT 0x5426 /* For debugging only */ | |
| 181 | +#define TARGET_TIOCSBRK 0x5427 /* BSD compatibility */ | |
| 182 | +#define TARGET_TIOCCBRK 0x5428 /* BSD compatibility */ | |
| 183 | +#define TARGET_TIOCGSID 0x5429 /* Return the session ID of FD */ | |
| 184 | +#define TARGET_TIOCGPTN TARGET_IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ | |
| 185 | +#define TARGET_TIOCSPTLCK TARGET_IOW('T',0x31, int) /* Lock/unlock Pty */ | |
| 186 | + | |
| 187 | +#define TARGET_FIONCLEX 0x5450 /* these numbers need to be adjusted. */ | |
| 188 | +#define TARGET_FIOCLEX 0x5451 | |
| 189 | +#define TARGET_FIOASYNC 0x5452 | |
| 190 | +#define TARGET_TIOCSERCONFIG 0x5453 | |
| 191 | +#define TARGET_TIOCSERGWILD 0x5454 | |
| 192 | +#define TARGET_TIOCSERSWILD 0x5455 | |
| 193 | +#define TARGET_TIOCGLCKTRMIOS 0x5456 | |
| 194 | +#define TARGET_TIOCSLCKTRMIOS 0x5457 | |
| 195 | +#define TARGET_TIOCSERGSTRUCT 0x5458 /* For debugging only */ | |
| 196 | +#define TARGET_TIOCSERGETLSR 0x5459 /* Get line status register */ | |
| 197 | +#define TARGET_TIOCSERGETMULTI 0x545A /* Get multiport config */ | |
| 198 | +#define TARGET_TIOCSERSETMULTI 0x545B /* Set multiport config */ | |
| 199 | + | |
| 200 | +#define TARGET_TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ | |
| 201 | +#define TARGET_TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ | |
| 202 | +#define TARGET_TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */ | |
| 203 | +#define TARGET_TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ | |
| 204 | + | |
| 205 | +/* Used for packet mode */ | |
| 206 | +#define TARGET_TIOCPKT_DATA 0 | |
| 207 | +#define TARGET_TIOCPKT_FLUSHREAD 1 | |
| 208 | +#define TARGET_TIOCPKT_FLUSHWRITE 2 | |
| 209 | +#define TARGET_TIOCPKT_STOP 4 | |
| 210 | +#define TARGET_TIOCPKT_START 8 | |
| 211 | +#define TARGET_TIOCPKT_NOSTOP 16 | |
| 212 | +#define TARGET_TIOCPKT_DOSTOP 32 | |
| 213 | + | |
| 214 | +#define TARGET_TIOCSER_TEMT 0x01 /* Transmitter physically empty */ | |
| 215 | + | ... | ... |
linux-user/main.c
| ... | ... | @@ -1412,6 +1412,98 @@ void cpu_loop (CPUState *env) |
| 1412 | 1412 | } |
| 1413 | 1413 | #endif |
| 1414 | 1414 | |
| 1415 | +#ifdef TARGET_M68K | |
| 1416 | + | |
| 1417 | +void cpu_loop(CPUM68KState *env) | |
| 1418 | +{ | |
| 1419 | + int trapnr; | |
| 1420 | + unsigned int n; | |
| 1421 | + target_siginfo_t info; | |
| 1422 | + TaskState *ts = env->opaque; | |
| 1423 | + | |
| 1424 | + for(;;) { | |
| 1425 | + trapnr = cpu_m68k_exec(env); | |
| 1426 | + switch(trapnr) { | |
| 1427 | + case EXCP_ILLEGAL: | |
| 1428 | + { | |
| 1429 | + if (ts->sim_syscalls) { | |
| 1430 | + uint16_t nr; | |
| 1431 | + nr = lduw(env->pc + 2); | |
| 1432 | + env->pc += 4; | |
| 1433 | + do_m68k_simcall(env, nr); | |
| 1434 | + } else { | |
| 1435 | + goto do_sigill; | |
| 1436 | + } | |
| 1437 | + } | |
| 1438 | + break; | |
| 1439 | + case EXCP_HALTED: | |
| 1440 | + /* Semihosing syscall. */ | |
| 1441 | + env->pc += 2; | |
| 1442 | + do_m68k_semihosting(env, env->dregs[0]); | |
| 1443 | + break; | |
| 1444 | + case EXCP_LINEA: | |
| 1445 | + case EXCP_LINEF: | |
| 1446 | + case EXCP_UNSUPPORTED: | |
| 1447 | + do_sigill: | |
| 1448 | + info.si_signo = SIGILL; | |
| 1449 | + info.si_errno = 0; | |
| 1450 | + info.si_code = TARGET_ILL_ILLOPN; | |
| 1451 | + info._sifields._sigfault._addr = env->pc; | |
| 1452 | + queue_signal(info.si_signo, &info); | |
| 1453 | + break; | |
| 1454 | + case EXCP_TRAP0: | |
| 1455 | + { | |
| 1456 | + ts->sim_syscalls = 0; | |
| 1457 | + n = env->dregs[0]; | |
| 1458 | + env->pc += 2; | |
| 1459 | + env->dregs[0] = do_syscall(env, | |
| 1460 | + n, | |
| 1461 | + env->dregs[1], | |
| 1462 | + env->dregs[2], | |
| 1463 | + env->dregs[3], | |
| 1464 | + env->dregs[4], | |
| 1465 | + env->dregs[5], | |
| 1466 | + env->dregs[6]); | |
| 1467 | + } | |
| 1468 | + break; | |
| 1469 | + case EXCP_INTERRUPT: | |
| 1470 | + /* just indicate that signals should be handled asap */ | |
| 1471 | + break; | |
| 1472 | + case EXCP_ACCESS: | |
| 1473 | + { | |
| 1474 | + info.si_signo = SIGSEGV; | |
| 1475 | + info.si_errno = 0; | |
| 1476 | + /* XXX: check env->error_code */ | |
| 1477 | + info.si_code = TARGET_SEGV_MAPERR; | |
| 1478 | + info._sifields._sigfault._addr = env->mmu.ar; | |
| 1479 | + queue_signal(info.si_signo, &info); | |
| 1480 | + } | |
| 1481 | + break; | |
| 1482 | + case EXCP_DEBUG: | |
| 1483 | + { | |
| 1484 | + int sig; | |
| 1485 | + | |
| 1486 | + sig = gdb_handlesig (env, TARGET_SIGTRAP); | |
| 1487 | + if (sig) | |
| 1488 | + { | |
| 1489 | + info.si_signo = sig; | |
| 1490 | + info.si_errno = 0; | |
| 1491 | + info.si_code = TARGET_TRAP_BRKPT; | |
| 1492 | + queue_signal(info.si_signo, &info); | |
| 1493 | + } | |
| 1494 | + } | |
| 1495 | + break; | |
| 1496 | + default: | |
| 1497 | + fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", | |
| 1498 | + trapnr); | |
| 1499 | + cpu_dump_state(env, stderr, fprintf, 0); | |
| 1500 | + abort(); | |
| 1501 | + } | |
| 1502 | + process_pending_signals(env); | |
| 1503 | + } | |
| 1504 | +} | |
| 1505 | +#endif /* TARGET_M68K */ | |
| 1506 | + | |
| 1415 | 1507 | void usage(void) |
| 1416 | 1508 | { |
| 1417 | 1509 | printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2005 Fabrice Bellard\n" |
| ... | ... | @@ -1685,6 +1777,35 @@ int main(int argc, char **argv) |
| 1685 | 1777 | env->gpr[i] = regs->gpr[i]; |
| 1686 | 1778 | } |
| 1687 | 1779 | } |
| 1780 | +#elif defined(TARGET_M68K) | |
| 1781 | + { | |
| 1782 | + m68k_def_t *def; | |
| 1783 | + def = m68k_find_by_name("cfv4e"); | |
| 1784 | + if (def == NULL) { | |
| 1785 | + cpu_abort(cpu_single_env, | |
| 1786 | + "Unable to find m68k CPU definition\n"); | |
| 1787 | + } | |
| 1788 | + cpu_m68k_register(cpu_single_env, def); | |
| 1789 | + env->pc = regs->pc; | |
| 1790 | + env->dregs[0] = regs->d0; | |
| 1791 | + env->dregs[1] = regs->d1; | |
| 1792 | + env->dregs[2] = regs->d2; | |
| 1793 | + env->dregs[3] = regs->d3; | |
| 1794 | + env->dregs[4] = regs->d4; | |
| 1795 | + env->dregs[5] = regs->d5; | |
| 1796 | + env->dregs[6] = regs->d6; | |
| 1797 | + env->dregs[7] = regs->d7; | |
| 1798 | + env->aregs[0] = regs->a0; | |
| 1799 | + env->aregs[1] = regs->a1; | |
| 1800 | + env->aregs[2] = regs->a2; | |
| 1801 | + env->aregs[3] = regs->a3; | |
| 1802 | + env->aregs[4] = regs->a4; | |
| 1803 | + env->aregs[5] = regs->a5; | |
| 1804 | + env->aregs[6] = regs->a6; | |
| 1805 | + env->aregs[7] = regs->usp; | |
| 1806 | + env->sr = regs->sr; | |
| 1807 | + ts->sim_syscalls = 1; | |
| 1808 | + } | |
| 1688 | 1809 | #elif defined(TARGET_MIPS) |
| 1689 | 1810 | { |
| 1690 | 1811 | int i; | ... | ... |
linux-user/mmap.c
| ... | ... | @@ -209,7 +209,7 @@ long target_mmap(target_ulong start, target_ulong len, int prot, |
| 209 | 209 | last_start += HOST_PAGE_ALIGN(len); |
| 210 | 210 | } |
| 211 | 211 | #endif |
| 212 | - if (qemu_host_page_size != qemu_real_host_page_size) { | |
| 212 | + if (0 && qemu_host_page_size != qemu_real_host_page_size) { | |
| 213 | 213 | /* NOTE: this code is only for debugging with '-p' option */ |
| 214 | 214 | /* ??? Can also occur when TARGET_PAGE_SIZE > host page size. */ |
| 215 | 215 | /* reserve a memory area */ | ... | ... |
linux-user/qemu.h
linux-user/syscall.c
| ... | ... | @@ -69,7 +69,8 @@ |
| 69 | 69 | |
| 70 | 70 | //#define DEBUG |
| 71 | 71 | |
| 72 | -#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) | |
| 72 | +#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) \ | |
| 73 | + || defined(TARGET_M68K) | |
| 73 | 74 | /* 16 bit uid wrappers emulation */ |
| 74 | 75 | #define USE_UID16 |
| 75 | 76 | #endif |
| ... | ... | @@ -1645,6 +1646,12 @@ int do_fork(CPUState *env, unsigned int flags, unsigned long newsp) |
| 1645 | 1646 | new_env->regwptr[0] = 0; |
| 1646 | 1647 | /* XXXXX */ |
| 1647 | 1648 | printf ("HELPME: %s:%d\n", __FILE__, __LINE__); |
| 1649 | +#elif defined(TARGET_M68K) | |
| 1650 | + if (!newsp) | |
| 1651 | + newsp = env->aregs[7]; | |
| 1652 | + new_env->aregs[7] = newsp; | |
| 1653 | + new_env->dregs[0] = 0; | |
| 1654 | + /* ??? is this sufficient? */ | |
| 1648 | 1655 | #elif defined(TARGET_MIPS) |
| 1649 | 1656 | printf ("HELPME: %s:%d\n", __FILE__, __LINE__); |
| 1650 | 1657 | #elif defined(TARGET_PPC) |
| ... | ... | @@ -2604,7 +2611,7 @@ long do_syscall(void *cpu_env, int num, long arg1, long arg2, long arg3, |
| 2604 | 2611 | case TARGET_NR_readdir: |
| 2605 | 2612 | goto unimplemented; |
| 2606 | 2613 | case TARGET_NR_mmap: |
| 2607 | -#if defined(TARGET_I386) || defined(TARGET_ARM) | |
| 2614 | +#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_M68K) | |
| 2608 | 2615 | { |
| 2609 | 2616 | target_ulong *v; |
| 2610 | 2617 | target_ulong v1, v2, v3, v4, v5, v6; | ... | ... |
linux-user/syscall_defs.h
| ... | ... | @@ -48,7 +48,8 @@ |
| 48 | 48 | #define TARGET_IOC_NRBITS 8 |
| 49 | 49 | #define TARGET_IOC_TYPEBITS 8 |
| 50 | 50 | |
| 51 | -#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SH4) | |
| 51 | +#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SH4) \ | |
| 52 | + || defined(TARGET_M68K) | |
| 52 | 53 | |
| 53 | 54 | #define TARGET_IOC_SIZEBITS 14 |
| 54 | 55 | #define TARGET_IOC_DIRBITS 2 |
| ... | ... | @@ -293,7 +294,7 @@ struct target_sigaction; |
| 293 | 294 | int do_sigaction(int sig, const struct target_sigaction *act, |
| 294 | 295 | struct target_sigaction *oact); |
| 295 | 296 | |
| 296 | -#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_MIPS) || defined (TARGET_SH4) | |
| 297 | +#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_MIPS) || defined (TARGET_SH4) || defined(TARGET_M68K) | |
| 297 | 298 | |
| 298 | 299 | #if defined(TARGET_SPARC) |
| 299 | 300 | #define TARGET_SA_NOCLDSTOP 8u |
| ... | ... | @@ -1070,6 +1071,68 @@ struct target_stat64 { |
| 1070 | 1071 | target_ulong __unused5; |
| 1071 | 1072 | }; |
| 1072 | 1073 | |
| 1074 | +#elif defined(TARGET_M68K) | |
| 1075 | + | |
| 1076 | +struct target_stat { | |
| 1077 | + unsigned short st_dev; | |
| 1078 | + unsigned short __pad1; | |
| 1079 | + target_ulong st_ino; | |
| 1080 | + unsigned short st_mode; | |
| 1081 | + unsigned short st_nlink; | |
| 1082 | + unsigned short st_uid; | |
| 1083 | + unsigned short st_gid; | |
| 1084 | + unsigned short st_rdev; | |
| 1085 | + unsigned short __pad2; | |
| 1086 | + target_ulong st_size; | |
| 1087 | + target_ulong st_blksize; | |
| 1088 | + target_ulong st_blocks; | |
| 1089 | + target_ulong target_st_atime; | |
| 1090 | + target_ulong __unused1; | |
| 1091 | + target_ulong target_st_mtime; | |
| 1092 | + target_ulong __unused2; | |
| 1093 | + target_ulong target_st_ctime; | |
| 1094 | + target_ulong __unused3; | |
| 1095 | + target_ulong __unused4; | |
| 1096 | + target_ulong __unused5; | |
| 1097 | +}; | |
| 1098 | + | |
| 1099 | +/* This matches struct stat64 in glibc2.1, hence the absolutely | |
| 1100 | + * insane amounts of padding around dev_t's. | |
| 1101 | + */ | |
| 1102 | +struct target_stat64 { | |
| 1103 | + unsigned long long st_dev; | |
| 1104 | + unsigned char __pad1[2]; | |
| 1105 | + | |
| 1106 | +#define TARGET_STAT64_HAS_BROKEN_ST_INO 1 | |
| 1107 | + target_ulong __st_ino; | |
| 1108 | + | |
| 1109 | + unsigned int st_mode; | |
| 1110 | + unsigned int st_nlink; | |
| 1111 | + | |
| 1112 | + target_ulong st_uid; | |
| 1113 | + target_ulong st_gid; | |
| 1114 | + | |
| 1115 | + unsigned long long st_rdev; | |
| 1116 | + unsigned char __pad3[2]; | |
| 1117 | + | |
| 1118 | + long long st_size; | |
| 1119 | + target_ulong st_blksize; | |
| 1120 | + | |
| 1121 | + target_ulong __pad4; /* future possible st_blocks high bits */ | |
| 1122 | + target_ulong st_blocks; /* Number 512-byte blocks allocated. */ | |
| 1123 | + | |
| 1124 | + target_ulong target_st_atime; | |
| 1125 | + target_ulong target_st_atime_nsec; | |
| 1126 | + | |
| 1127 | + target_ulong target_st_mtime; | |
| 1128 | + target_ulong target_st_mtime_nsec; | |
| 1129 | + | |
| 1130 | + target_ulong target_st_ctime; | |
| 1131 | + target_ulong target_st_ctime_nsec; | |
| 1132 | + | |
| 1133 | + unsigned long long st_ino; | |
| 1134 | +} __attribute__((packed)); | |
| 1135 | + | |
| 1073 | 1136 | #elif defined(TARGET_MIPS) |
| 1074 | 1137 | |
| 1075 | 1138 | struct target_stat { | ... | ... |
qemu-doc.texi
| ... | ... | @@ -81,7 +81,7 @@ For system emulation, the following hardware targets are supported: |
| 81 | 81 | @item ARM Versatile baseboard (ARM926E) |
| 82 | 82 | @end itemize |
| 83 | 83 | |
| 84 | -For user emulation, x86, PowerPC, ARM, MIPS, and Sparc32/64 CPUs are supported. | |
| 84 | +For user emulation, x86, PowerPC, ARM, MIPS, Sparc32/64 and ColdFire(m68k) CPUs are supported. | |
| 85 | 85 | |
| 86 | 86 | @node Installation |
| 87 | 87 | @chapter Installation |
| ... | ... | @@ -1768,6 +1768,10 @@ Act as if the host page size was 'pagesize' bytes |
| 1768 | 1768 | binaries (as implemented by the arm-elf and arm-eabi Newlib/GDB |
| 1769 | 1769 | configurations), and arm-uclinux bFLT format binaries. |
| 1770 | 1770 | |
| 1771 | +@command{qemu-m68k} is capable of running semihosted binaries using the BDM | |
| 1772 | +(m5xxx-ram-hosted.ld) or m68k-sim (sim.ld) syscall interfaces, and | |
| 1773 | +coldfire uClinux bFLT format binaries. | |
| 1774 | + | |
| 1771 | 1775 | The binary format is detected automatically. |
| 1772 | 1776 | |
| 1773 | 1777 | @node compilation | ... | ... |
target-m68k/cpu.h
0 → 100644
| 1 | +/* | |
| 2 | + * m68k virtual CPU header | |
| 3 | + * | |
| 4 | + * Copyright (c) 2005-2006 CodeSourcery | |
| 5 | + * Written by Paul Brook | |
| 6 | + * | |
| 7 | + * This library is free software; you can redistribute it and/or | |
| 8 | + * modify it under the terms of the GNU Lesser General Public | |
| 9 | + * License as published by the Free Software Foundation; either | |
| 10 | + * version 2 of the License, or (at your option) any later version. | |
| 11 | + * | |
| 12 | + * This library is distributed in the hope that it will be useful, | |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 | + * General Public License for more details. | |
| 16 | + * | |
| 17 | + * You should have received a copy of the GNU Lesser General Public | |
| 18 | + * License along with this library; if not, write to the Free Software | |
| 19 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 20 | + */ | |
| 21 | +#ifndef CPU_M68K_H | |
| 22 | +#define CPU_M68K_H | |
| 23 | + | |
| 24 | +#define TARGET_LONG_BITS 32 | |
| 25 | + | |
| 26 | +#include "cpu-defs.h" | |
| 27 | + | |
| 28 | +#include "softfloat.h" | |
| 29 | + | |
| 30 | +#define MAX_QREGS 32 | |
| 31 | + | |
| 32 | +#define TARGET_HAS_ICE 1 | |
| 33 | + | |
| 34 | +#define EXCP_ACCESS 2 /* Access (MMU) error. */ | |
| 35 | +#define EXCP_ADDRESS 3 /* Address error. */ | |
| 36 | +#define EXCP_ILLEGAL 4 /* Illegal instruction. */ | |
| 37 | +#define EXCP_DIV0 5 /* Divide by zero */ | |
| 38 | +#define EXCP_PRIVILEGE 8 /* Privilege violation. */ | |
| 39 | +#define EXCP_TRACE 9 | |
| 40 | +#define EXCP_LINEA 10 /* Unimplemented line-A (MAC) opcode. */ | |
| 41 | +#define EXCP_LINEF 11 /* Unimplemented line-F (FPU) opcode. */ | |
| 42 | +#define EXCP_DEBUGNBP 12 /* Non-breakpoint debug interrupt. */ | |
| 43 | +#define EXCP_DEBEGBP 13 /* Breakpoint debug interrupt. */ | |
| 44 | +#define EXCP_FORMAT 14 /* RTE format error. */ | |
| 45 | +#define EXCP_UNINITIALIZED 15 | |
| 46 | +#define EXCP_TRAP0 32 /* User trap #0. */ | |
| 47 | +#define EXCP_TRAP15 47 /* User trap #15. */ | |
| 48 | +#define EXCP_UNSUPPORTED 61 | |
| 49 | +#define EXCP_ICE 13 | |
| 50 | + | |
| 51 | +typedef struct CPUM68KState { | |
| 52 | + uint32_t dregs[8]; | |
| 53 | + uint32_t aregs[8]; | |
| 54 | + uint32_t pc; | |
| 55 | + uint32_t sr; | |
| 56 | + | |
| 57 | + /* Condition flags. */ | |
| 58 | + uint32_t cc_op; | |
| 59 | + uint32_t cc_dest; | |
| 60 | + uint32_t cc_src; | |
| 61 | + uint32_t cc_x; | |
| 62 | + | |
| 63 | + float64 fregs[8]; | |
| 64 | + float64 fp_result; | |
| 65 | + uint32_t fpcr; | |
| 66 | + uint32_t fpsr; | |
| 67 | + float_status fp_status; | |
| 68 | + | |
| 69 | + /* Temporary storage for DIV helpers. */ | |
| 70 | + uint32_t div1; | |
| 71 | + uint32_t div2; | |
| 72 | + | |
| 73 | + /* MMU status. */ | |
| 74 | + struct { | |
| 75 | + uint32_t ar; | |
| 76 | + } mmu; | |
| 77 | + /* ??? remove this. */ | |
| 78 | + uint32_t t1; | |
| 79 | + | |
| 80 | + /* exception/interrupt handling */ | |
| 81 | + jmp_buf jmp_env; | |
| 82 | + int exception_index; | |
| 83 | + int interrupt_request; | |
| 84 | + int user_mode_only; | |
| 85 | + uint32_t address; | |
| 86 | + | |
| 87 | + uint32_t qregs[MAX_QREGS]; | |
| 88 | + | |
| 89 | + CPU_COMMON | |
| 90 | +} CPUM68KState; | |
| 91 | + | |
| 92 | +CPUM68KState *cpu_m68k_init(void); | |
| 93 | +int cpu_m68k_exec(CPUM68KState *s); | |
| 94 | +void cpu_m68k_close(CPUM68KState *s); | |
| 95 | +/* you can call this signal handler from your SIGBUS and SIGSEGV | |
| 96 | + signal handlers to inform the virtual CPU of exceptions. non zero | |
| 97 | + is returned if the signal was handled by the virtual CPU. */ | |
| 98 | +struct siginfo; | |
| 99 | +int cpu_m68k_signal_handler(int host_signum, struct siginfo *info, | |
| 100 | + void *puc); | |
| 101 | +void cpu_m68k_flush_flags(CPUM68KState *, int); | |
| 102 | + | |
| 103 | +enum { | |
| 104 | + CC_OP_DYNAMIC, /* Use env->cc_op */ | |
| 105 | + CC_OP_FLAGS, /* CC_DEST = CVZN, CC_SRC = unused */ | |
| 106 | + CC_OP_LOGIC, /* CC_DEST = result, CC_SRC = unused */ | |
| 107 | + CC_OP_ADD, /* CC_DEST = result, CC_SRC = source */ | |
| 108 | + CC_OP_SUB, /* CC_DEST = result, CC_SRC = source */ | |
| 109 | + CC_OP_CMPB, /* CC_DEST = result, CC_SRC = source */ | |
| 110 | + CC_OP_CMPW, /* CC_DEST = result, CC_SRC = source */ | |
| 111 | + CC_OP_ADDX, /* CC_DEST = result, CC_SRC = source */ | |
| 112 | + CC_OP_SUBX, /* CC_DEST = result, CC_SRC = source */ | |
| 113 | + CC_OP_SHL, /* CC_DEST = source, CC_SRC = shift */ | |
| 114 | + CC_OP_SHR, /* CC_DEST = source, CC_SRC = shift */ | |
| 115 | + CC_OP_SAR, /* CC_DEST = source, CC_SRC = shift */ | |
| 116 | +}; | |
| 117 | + | |
| 118 | +#define CCF_C 0x01 | |
| 119 | +#define CCF_V 0x02 | |
| 120 | +#define CCF_Z 0x04 | |
| 121 | +#define CCF_N 0x08 | |
| 122 | +#define CCF_X 0x01 | |
| 123 | + | |
| 124 | +typedef struct m68k_def_t m68k_def_t; | |
| 125 | + | |
| 126 | +m68k_def_t *m68k_find_by_name(const char *); | |
| 127 | +void cpu_m68k_register(CPUM68KState *, m68k_def_t *); | |
| 128 | + | |
| 129 | +#define M68K_FPCR_PREC (1 << 6) | |
| 130 | + | |
| 131 | +#ifdef CONFIG_USER_ONLY | |
| 132 | +/* Linux uses 8k pages. */ | |
| 133 | +#define TARGET_PAGE_BITS 13 | |
| 134 | +#else | |
| 135 | +/* Smallest TLB entry size is 1k. */ | |
| 136 | +#define TARGET_PAGE_BITS 10 | |
| 137 | +#endif | |
| 138 | +#include "cpu-all.h" | |
| 139 | + | |
| 140 | +#endif | ... | ... |
target-m68k/exec.h
0 → 100644
| 1 | +/* | |
| 2 | + * m68k execution defines | |
| 3 | + * | |
| 4 | + * Copyright (c) 2005-2006 CodeSourcery | |
| 5 | + * Written by Paul Brook | |
| 6 | + * | |
| 7 | + * This library is free software; you can redistribute it and/or | |
| 8 | + * modify it under the terms of the GNU Lesser General Public | |
| 9 | + * License as published by the Free Software Foundation; either | |
| 10 | + * version 2 of the License, or (at your option) any later version. | |
| 11 | + * | |
| 12 | + * This library is distributed in the hope that it will be useful, | |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 | + * General Public License for more details. | |
| 16 | + * | |
| 17 | + * You should have received a copy of the GNU Lesser General Public | |
| 18 | + * License along with this library; if not, write to the Free Software | |
| 19 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 20 | + */ | |
| 21 | +#include "dyngen-exec.h" | |
| 22 | + | |
| 23 | +register struct CPUM68KState *env asm(AREG0); | |
| 24 | +/* This is only used for tb lookup. */ | |
| 25 | +register uint32_t T0 asm(AREG1); | |
| 26 | +/* ??? We don't use T1, but common code expects it to exist */ | |
| 27 | +#define T1 env->t1 | |
| 28 | + | |
| 29 | +#include "cpu.h" | |
| 30 | +#include "exec-all.h" | |
| 31 | + | |
| 32 | +static inline void env_to_regs(void) | |
| 33 | +{ | |
| 34 | +} | |
| 35 | + | |
| 36 | +static inline void regs_to_env(void) | |
| 37 | +{ | |
| 38 | +} | |
| 39 | + | |
| 40 | +int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw, | |
| 41 | + int is_user, int is_softmmu); | |
| 42 | + | |
| 43 | + | |
| 44 | +void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op); | |
| 45 | +float64 helper_sub_cmpf64(CPUM68KState *env, float64 src0, float64 src1); | |
| 46 | + | |
| 47 | +void cpu_loop_exit(void); | ... | ... |
target-m68k/helper.c
0 → 100644
| 1 | +/* | |
| 2 | + * m68k op helpers | |
| 3 | + * | |
| 4 | + * Copyright (c) 2006 CodeSourcery | |
| 5 | + * Written by Paul Brook | |
| 6 | + * | |
| 7 | + * This library is free software; you can redistribute it and/or | |
| 8 | + * modify it under the terms of the GNU Lesser General Public | |
| 9 | + * License as published by the Free Software Foundation; either | |
| 10 | + * version 2 of the License, or (at your option) any later version. | |
| 11 | + * | |
| 12 | + * This library is distributed in the hope that it will be useful, | |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 | + * General Public License for more details. | |
| 16 | + * | |
| 17 | + * You should have received a copy of the GNU Lesser General Public | |
| 18 | + * License along with this library; if not, write to the Free Software | |
| 19 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 20 | + */ | |
| 21 | + | |
| 22 | +#include <stdio.h> | |
| 23 | + | |
| 24 | +#include "config.h" | |
| 25 | +#include "cpu.h" | |
| 26 | +#include "exec-all.h" | |
| 27 | + | |
| 28 | +void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op) | |
| 29 | +{ | |
| 30 | + int flags; | |
| 31 | + uint32_t src; | |
| 32 | + uint32_t dest; | |
| 33 | + uint32_t tmp; | |
| 34 | + | |
| 35 | +#define HIGHBIT 0x80000000u | |
| 36 | + | |
| 37 | +#define SET_NZ(x) do { \ | |
| 38 | + if ((x) == 0) \ | |
| 39 | + flags |= CCF_Z; \ | |
| 40 | + else if ((int32_t)(x) < 0) \ | |
| 41 | + flags |= CCF_N; \ | |
| 42 | + } while (0) | |
| 43 | + | |
| 44 | +#define SET_FLAGS_SUB(type, utype) do { \ | |
| 45 | + SET_NZ((type)dest); \ | |
| 46 | + tmp = dest + src; \ | |
| 47 | + if ((utype) tmp < (utype) src) \ | |
| 48 | + flags |= CCF_C; \ | |
| 49 | + if ((1u << (sizeof(type) * 8 - 1)) & (tmp ^ dest) & (tmp ^ src)) \ | |
| 50 | + flags |= CCF_V; \ | |
| 51 | + } while (0) | |
| 52 | + | |
| 53 | + flags = 0; | |
| 54 | + src = env->cc_src; | |
| 55 | + dest = env->cc_dest; | |
| 56 | + switch (cc_op) { | |
| 57 | + case CC_OP_FLAGS: | |
| 58 | + flags = dest; | |
| 59 | + break; | |
| 60 | + case CC_OP_LOGIC: | |
| 61 | + SET_NZ(dest); | |
| 62 | + break; | |
| 63 | + case CC_OP_ADD: | |
| 64 | + SET_NZ(dest); | |
| 65 | + if (dest < src) | |
| 66 | + flags |= CCF_C; | |
| 67 | + tmp = dest - src; | |
| 68 | + if (HIGHBIT & (src ^ dest) & ~(tmp ^ src)) | |
| 69 | + flags |= CCF_V; | |
| 70 | + break; | |
| 71 | + case CC_OP_SUB: | |
| 72 | + SET_FLAGS_SUB(int32_t, uint32_t); | |
| 73 | + break; | |
| 74 | + case CC_OP_CMPB: | |
| 75 | + SET_FLAGS_SUB(int8_t, uint8_t); | |
| 76 | + break; | |
| 77 | + case CC_OP_CMPW: | |
| 78 | + SET_FLAGS_SUB(int16_t, uint16_t); | |
| 79 | + break; | |
| 80 | + case CC_OP_ADDX: | |
| 81 | + SET_NZ(dest); | |
| 82 | + if (dest <= src) | |
| 83 | + flags |= CCF_C; | |
| 84 | + tmp = dest - src - 1; | |
| 85 | + if (HIGHBIT & (src ^ dest) & ~(tmp ^ src)) | |
| 86 | + flags |= CCF_V; | |
| 87 | + break; | |
| 88 | + case CC_OP_SUBX: | |
| 89 | + SET_NZ(dest); | |
| 90 | + tmp = dest + src + 1; | |
| 91 | + if (tmp <= src) | |
| 92 | + flags |= CCF_C; | |
| 93 | + if (HIGHBIT & (tmp ^ dest) & (tmp ^ src)) | |
| 94 | + flags |= CCF_V; | |
| 95 | + break; | |
| 96 | + case CC_OP_SHL: | |
| 97 | + if (src >= 32) { | |
| 98 | + SET_NZ(0); | |
| 99 | + } else { | |
| 100 | + tmp = dest << src; | |
| 101 | + SET_NZ(tmp); | |
| 102 | + } | |
| 103 | + if (src && src <= 32 && (dest & (1 << (32 - src)))) | |
| 104 | + flags |= CCF_C; | |
| 105 | + break; | |
| 106 | + case CC_OP_SHR: | |
| 107 | + if (src >= 32) { | |
| 108 | + SET_NZ(0); | |
| 109 | + } else { | |
| 110 | + tmp = dest >> src; | |
| 111 | + SET_NZ(tmp); | |
| 112 | + } | |
| 113 | + if (src && src <= 32 && ((dest >> (src - 1)) & 1)) | |
| 114 | + flags |= CCF_C; | |
| 115 | + break; | |
| 116 | + case CC_OP_SAR: | |
| 117 | + if (src >= 32) { | |
| 118 | + SET_NZ(-1); | |
| 119 | + } else { | |
| 120 | + tmp = (int32_t)dest >> src; | |
| 121 | + SET_NZ(tmp); | |
| 122 | + } | |
| 123 | + if (src && src <= 32 && (((int32_t)dest >> (src - 1)) & 1)) | |
| 124 | + flags |= CCF_C; | |
| 125 | + break; | |
| 126 | + default: | |
| 127 | + cpu_abort(env, "Bad CC_OP %d", cc_op); | |
| 128 | + } | |
| 129 | + env->cc_op = CC_OP_FLAGS; | |
| 130 | + env->cc_dest = flags; | |
| 131 | +} | |
| 132 | + | |
| 133 | +float64 helper_sub_cmpf64(CPUM68KState *env, float64 src0, float64 src1) | |
| 134 | +{ | |
| 135 | + /* ??? This may incorrectly raise exceptions. */ | |
| 136 | + /* ??? Should flush denormals to zero. */ | |
| 137 | + float64 res; | |
| 138 | + res = float64_sub(src0, src1, &env->fp_status); | |
| 139 | + if (float64_is_nan(res)) { | |
| 140 | + /* +/-inf compares equal against itself, but sub returns nan. */ | |
| 141 | + if (!float64_is_nan(src0) | |
| 142 | + && !float64_is_nan(src1)) { | |
| 143 | + res = 0; | |
| 144 | + if (float64_lt_quiet(src0, res, &env->fp_status)) | |
| 145 | + res = float64_chs(res); | |
| 146 | + } | |
| 147 | + } | |
| 148 | + return res; | |
| 149 | +} | ... | ... |
target-m68k/m68k-qreg.h
0 → 100644
target-m68k/op-hacks.h
0 → 100644
| 1 | +/* Various hacks to make code written for a dynamic code generator work | |
| 2 | + with regular QEMU. */ | |
| 3 | + | |
| 4 | +static int free_qreg; | |
| 5 | + | |
| 6 | +#define QMODE_I32 1 | |
| 7 | +#define QMODE_F32 1 | |
| 8 | +#define QMODE_F64 2 | |
| 9 | + | |
| 10 | +static inline int gen_new_qreg(int mode) | |
| 11 | +{ | |
| 12 | + int qreg; | |
| 13 | + | |
| 14 | + qreg = free_qreg; | |
| 15 | + free_qreg += mode; | |
| 16 | + if (free_qreg > MAX_QREGS) { | |
| 17 | + fprintf(stderr, "qreg overflow\n"); | |
| 18 | + abort(); | |
| 19 | + } | |
| 20 | + return qreg + TARGET_NUM_QREGS; | |
| 21 | +} | |
| 22 | + | |
| 23 | +static inline int gen_im32(uint32_t i) | |
| 24 | +{ | |
| 25 | + int qreg = gen_new_qreg(QMODE_I32); | |
| 26 | + gen_op_mov32_im(qreg, i); | |
| 27 | + return qreg; | |
| 28 | +} | |
| 29 | + | |
| 30 | +static inline void gen_op_ldf32(int dest, int addr) | |
| 31 | +{ | |
| 32 | + gen_op_ld32(dest, addr); | |
| 33 | +} | |
| 34 | + | |
| 35 | +static inline void gen_op_stf32(int addr, int dest) | |
| 36 | +{ | |
| 37 | + gen_op_st32(addr, dest); | |
| 38 | +} | |
| 39 | + | |
| 40 | +static inline void gen_op_pack_32_f32(int dest, int src) | |
| 41 | +{ | |
| 42 | + gen_op_mov32(dest, src); | |
| 43 | +} | |
| 44 | + | |
| 45 | +static inline void gen_op_pack_f32_32(int dest, int src) | |
| 46 | +{ | |
| 47 | + gen_op_mov32(dest, src); | |
| 48 | +} | |
| 49 | + | |
| 50 | +static inline void gen_op_flags_set(void) | |
| 51 | +{ | |
| 52 | + /* Dummy op. */ | |
| 53 | +} | |
| 54 | + | |
| 55 | +static inline void gen_op_shl_im_cc(int val, int shift) | |
| 56 | +{ | |
| 57 | + gen_op_shl_cc(val, gen_im32(shift)); | |
| 58 | +} | |
| 59 | + | |
| 60 | +static inline void gen_op_shr_im_cc(int val, int shift) | |
| 61 | +{ | |
| 62 | + gen_op_shr_cc(val, gen_im32(shift)); | |
| 63 | +} | |
| 64 | + | |
| 65 | +static inline void gen_op_sar_im_cc(int val, int shift) | |
| 66 | +{ | |
| 67 | + gen_op_sar_cc(val, gen_im32(shift)); | |
| 68 | +} | |
| 69 | + | |
| 70 | +#ifdef USE_DIRECT_JUMP | |
| 71 | +#define TBPARAM(x) | |
| 72 | +#else | |
| 73 | +#define TBPARAM(x) (long)(x) | |
| 74 | +#endif | |
| 75 | + | |
| 76 | +static inline void gen_op_goto_tb(int dummy, int n, long tb) | |
| 77 | +{ | |
| 78 | + if (n == 0) { | |
| 79 | + gen_op_goto_tb0(TBPARAM(tb)); | |
| 80 | + } else { | |
| 81 | + gen_op_goto_tb1(TBPARAM(tb)); | |
| 82 | + } | |
| 83 | +} | ... | ... |
target-m68k/op.c
0 → 100644
| 1 | +/* | |
| 2 | + * m68k micro operations | |
| 3 | + * | |
| 4 | + * Copyright (c) 2006 CodeSourcery | |
| 5 | + * Written by Paul Brook | |
| 6 | + * | |
| 7 | + * This library is free software; you can redistribute it and/or | |
| 8 | + * modify it under the terms of the GNU Lesser General Public | |
| 9 | + * License as published by the Free Software Foundation; either | |
| 10 | + * version 2 of the License, or (at your option) any later version. | |
| 11 | + * | |
| 12 | + * This library is distributed in the hope that it will be useful, | |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 | + * General Public License for more details. | |
| 16 | + * | |
| 17 | + * You should have received a copy of the GNU Lesser General Public | |
| 18 | + * License along with this library; if not, write to the Free Software | |
| 19 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 20 | + */ | |
| 21 | + | |
| 22 | +#include "exec.h" | |
| 23 | +#include "m68k-qreg.h" | |
| 24 | + | |
| 25 | +#ifndef offsetof | |
| 26 | +#define offsetof(type, field) ((size_t) &((type *)0)->field) | |
| 27 | +#endif | |
| 28 | + | |
| 29 | +static long qreg_offsets[] = { | |
| 30 | +#define DEFO32(name, offset) offsetof(CPUState, offset), | |
| 31 | +#define DEFR(name, reg, mode) -1, | |
| 32 | +#define DEFF64(name, offset) offsetof(CPUState, offset), | |
| 33 | + 0, | |
| 34 | +#include "qregs.def" | |
| 35 | +}; | |
| 36 | + | |
| 37 | +#define CPU_FP_STATUS env->fp_status | |
| 38 | + | |
| 39 | +#define RAISE_EXCEPTION(n) do { \ | |
| 40 | + env->exception_index = n; \ | |
| 41 | + cpu_loop_exit(); \ | |
| 42 | + } while(0) | |
| 43 | + | |
| 44 | +#define get_op helper_get_op | |
| 45 | +#define set_op helper_set_op | |
| 46 | +#define get_opf64 helper_get_opf64 | |
| 47 | +#define set_opf64 helper_set_opf64 | |
| 48 | +uint32_t | |
| 49 | +get_op(int qreg) | |
| 50 | +{ | |
| 51 | + if (qreg == QREG_T0) { | |
| 52 | + return T0; | |
| 53 | + } else if (qreg < TARGET_NUM_QREGS) { | |
| 54 | + return *(uint32_t *)(((long)env) + qreg_offsets[qreg]); | |
| 55 | + } else { | |
| 56 | + return env->qregs[qreg - TARGET_NUM_QREGS]; | |
| 57 | + } | |
| 58 | +} | |
| 59 | + | |
| 60 | +void set_op(int qreg, uint32_t val) | |
| 61 | +{ | |
| 62 | + if (qreg == QREG_T0) { | |
| 63 | + T0 = val; | |
| 64 | + } else if (qreg < TARGET_NUM_QREGS) { | |
| 65 | + *(uint32_t *)(((long)env) + qreg_offsets[qreg]) = val; | |
| 66 | + } else { | |
| 67 | + env->qregs[qreg - TARGET_NUM_QREGS] = val; | |
| 68 | + } | |
| 69 | +} | |
| 70 | + | |
| 71 | +float64 get_opf64(int qreg) | |
| 72 | +{ | |
| 73 | + if (qreg < TARGET_NUM_QREGS) { | |
| 74 | + return *(float64 *)(((long)env) + qreg_offsets[qreg]); | |
| 75 | + } else { | |
| 76 | + return *(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS]; | |
| 77 | + } | |
| 78 | +} | |
| 79 | + | |
| 80 | +void set_opf64(int qreg, float64 val) | |
| 81 | +{ | |
| 82 | + if (qreg < TARGET_NUM_QREGS) { | |
| 83 | + *(float64 *)(((long)env) + qreg_offsets[qreg]) = val; | |
| 84 | + } else { | |
| 85 | + *(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS] = val; | |
| 86 | + } | |
| 87 | +} | |
| 88 | + | |
| 89 | +#define OP(name) void OPPROTO op_##name (void) | |
| 90 | + | |
| 91 | +OP(mov32) | |
| 92 | +{ | |
| 93 | + set_op(PARAM1, get_op(PARAM2)); | |
| 94 | + FORCE_RET(); | |
| 95 | +} | |
| 96 | + | |
| 97 | +OP(mov32_im) | |
| 98 | +{ | |
| 99 | + set_op(PARAM1, PARAM2); | |
| 100 | + FORCE_RET(); | |
| 101 | +} | |
| 102 | + | |
| 103 | +OP(movf64) | |
| 104 | +{ | |
| 105 | + set_opf64(PARAM1, get_opf64(PARAM2)); | |
| 106 | + FORCE_RET(); | |
| 107 | +} | |
| 108 | + | |
| 109 | +OP(zerof64) | |
| 110 | +{ | |
| 111 | + set_opf64(PARAM1, 0); | |
| 112 | + FORCE_RET(); | |
| 113 | +} | |
| 114 | + | |
| 115 | +OP(add32) | |
| 116 | +{ | |
| 117 | + uint32_t op2 = get_op(PARAM2); | |
| 118 | + uint32_t op3 = get_op(PARAM3); | |
| 119 | + set_op(PARAM1, op2 + op3); | |
| 120 | + FORCE_RET(); | |
| 121 | +} | |
| 122 | + | |
| 123 | +OP(sub32) | |
| 124 | +{ | |
| 125 | + uint32_t op2 = get_op(PARAM2); | |
| 126 | + uint32_t op3 = get_op(PARAM3); | |
| 127 | + set_op(PARAM1, op2 - op3); | |
| 128 | + FORCE_RET(); | |
| 129 | +} | |
| 130 | + | |
| 131 | +OP(mul32) | |
| 132 | +{ | |
| 133 | + uint32_t op2 = get_op(PARAM2); | |
| 134 | + uint32_t op3 = get_op(PARAM3); | |
| 135 | + set_op(PARAM1, op2 * op3); | |
| 136 | + FORCE_RET(); | |
| 137 | +} | |
| 138 | + | |
| 139 | +OP(not32) | |
| 140 | +{ | |
| 141 | + uint32_t arg = get_op(PARAM2); | |
| 142 | + set_op(PARAM1, ~arg); | |
| 143 | + FORCE_RET(); | |
| 144 | +} | |
| 145 | + | |
| 146 | +OP(neg32) | |
| 147 | +{ | |
| 148 | + uint32_t arg = get_op(PARAM2); | |
| 149 | + set_op(PARAM1, -arg); | |
| 150 | + FORCE_RET(); | |
| 151 | +} | |
| 152 | + | |
| 153 | +OP(bswap32) | |
| 154 | +{ | |
| 155 | + uint32_t arg = get_op(PARAM2); | |
| 156 | + arg = (arg >> 24) | (arg << 24) | |
| 157 | + | ((arg >> 16) & 0xff00) | ((arg << 16) & 0xff0000); | |
| 158 | + set_op(PARAM1, arg); | |
| 159 | + FORCE_RET(); | |
| 160 | +} | |
| 161 | + | |
| 162 | +OP(btest) | |
| 163 | +{ | |
| 164 | + uint32_t op1 = get_op(PARAM1); | |
| 165 | + uint32_t op2 = get_op(PARAM2); | |
| 166 | + if (op1 & op2) | |
| 167 | + env->cc_dest &= ~CCF_Z; | |
| 168 | + else | |
| 169 | + env->cc_dest |= CCF_Z; | |
| 170 | + FORCE_RET(); | |
| 171 | +} | |
| 172 | + | |
| 173 | +OP(addx_cc) | |
| 174 | +{ | |
| 175 | + uint32_t op1 = get_op(PARAM1); | |
| 176 | + uint32_t op2 = get_op(PARAM2); | |
| 177 | + uint32_t res; | |
| 178 | + if (env->cc_x) { | |
| 179 | + env->cc_x = (op1 <= op2); | |
| 180 | + env->cc_op = CC_OP_SUBX; | |
| 181 | + res = op1 - (op2 + 1); | |
| 182 | + } else { | |
| 183 | + env->cc_x = (op1 < op2); | |
| 184 | + env->cc_op = CC_OP_SUB; | |
| 185 | + res = op1 - op2; | |
| 186 | + } | |
| 187 | + set_op(PARAM1, res); | |
| 188 | + FORCE_RET(); | |
| 189 | +} | |
| 190 | + | |
| 191 | +OP(subx_cc) | |
| 192 | +{ | |
| 193 | + uint32_t op1 = get_op(PARAM1); | |
| 194 | + uint32_t op2 = get_op(PARAM2); | |
| 195 | + uint32_t res; | |
| 196 | + if (env->cc_x) { | |
| 197 | + res = op1 + op2 + 1; | |
| 198 | + env->cc_x = (res <= op2); | |
| 199 | + env->cc_op = CC_OP_ADDX; | |
| 200 | + } else { | |
| 201 | + res = op1 + op2; | |
| 202 | + env->cc_x = (res < op2); | |
| 203 | + env->cc_op = CC_OP_ADD; | |
| 204 | + } | |
| 205 | + set_op(PARAM1, res); | |
| 206 | + FORCE_RET(); | |
| 207 | +} | |
| 208 | + | |
| 209 | +/* Logic ops. */ | |
| 210 | + | |
| 211 | +OP(and32) | |
| 212 | +{ | |
| 213 | + uint32_t op2 = get_op(PARAM2); | |
| 214 | + uint32_t op3 = get_op(PARAM3); | |
| 215 | + set_op(PARAM1, op2 & op3); | |
| 216 | + FORCE_RET(); | |
| 217 | +} | |
| 218 | + | |
| 219 | +OP(or32) | |
| 220 | +{ | |
| 221 | + uint32_t op2 = get_op(PARAM2); | |
| 222 | + uint32_t op3 = get_op(PARAM3); | |
| 223 | + set_op(PARAM1, op2 | op3); | |
| 224 | + FORCE_RET(); | |
| 225 | +} | |
| 226 | + | |
| 227 | +OP(xor32) | |
| 228 | +{ | |
| 229 | + uint32_t op2 = get_op(PARAM2); | |
| 230 | + uint32_t op3 = get_op(PARAM3); | |
| 231 | + set_op(PARAM1, op2 ^ op3); | |
| 232 | + FORCE_RET(); | |
| 233 | +} | |
| 234 | + | |
| 235 | +/* Shifts. */ | |
| 236 | +OP(shl32) | |
| 237 | +{ | |
| 238 | + uint32_t op2 = get_op(PARAM2); | |
| 239 | + uint32_t op3 = get_op(PARAM3); | |
| 240 | + uint32_t result; | |
| 241 | + result = op2 << op3; | |
| 242 | + set_op(PARAM1, result); | |
| 243 | + FORCE_RET(); | |
| 244 | +} | |
| 245 | + | |
| 246 | +OP(shl_cc) | |
| 247 | +{ | |
| 248 | + uint32_t op1 = get_op(PARAM1); | |
| 249 | + uint32_t op2 = get_op(PARAM2); | |
| 250 | + uint32_t result; | |
| 251 | + result = op1 << op2; | |
| 252 | + set_op(PARAM1, result); | |
| 253 | + env->cc_x = (op1 << (op2 - 1)) & 1; | |
| 254 | + FORCE_RET(); | |
| 255 | +} | |
| 256 | + | |
| 257 | +OP(shr32) | |
| 258 | +{ | |
| 259 | + uint32_t op2 = get_op(PARAM2); | |
| 260 | + uint32_t op3 = get_op(PARAM3); | |
| 261 | + uint32_t result; | |
| 262 | + result = op2 >> op3; | |
| 263 | + set_op(PARAM1, result); | |
| 264 | + FORCE_RET(); | |
| 265 | +} | |
| 266 | + | |
| 267 | +OP(shr_cc) | |
| 268 | +{ | |
| 269 | + uint32_t op1 = get_op(PARAM1); | |
| 270 | + uint32_t op2 = get_op(PARAM2); | |
| 271 | + uint32_t result; | |
| 272 | + result = op1 >> op2; | |
| 273 | + set_op(PARAM1, result); | |
| 274 | + env->cc_x = (op1 >> (op2 - 1)) & 1; | |
| 275 | + FORCE_RET(); | |
| 276 | +} | |
| 277 | + | |
| 278 | +OP(sar_cc) | |
| 279 | +{ | |
| 280 | + int32_t op1 = get_op(PARAM1); | |
| 281 | + uint32_t op2 = get_op(PARAM2); | |
| 282 | + uint32_t result; | |
| 283 | + result = op1 >> op2; | |
| 284 | + set_op(PARAM1, result); | |
| 285 | + env->cc_x = (op1 >> (op2 - 1)) & 1; | |
| 286 | + FORCE_RET(); | |
| 287 | +} | |
| 288 | + | |
| 289 | +/* Value extend. */ | |
| 290 | + | |
| 291 | +OP(ext8u32) | |
| 292 | +{ | |
| 293 | + uint32_t op2 = get_op(PARAM2); | |
| 294 | + set_op(PARAM1, (uint8_t)op2); | |
| 295 | + FORCE_RET(); | |
| 296 | +} | |
| 297 | + | |
| 298 | +OP(ext8s32) | |
| 299 | +{ | |
| 300 | + uint32_t op2 = get_op(PARAM2); | |
| 301 | + set_op(PARAM1, (int8_t)op2); | |
| 302 | + FORCE_RET(); | |
| 303 | +} | |
| 304 | + | |
| 305 | +OP(ext16u32) | |
| 306 | +{ | |
| 307 | + uint32_t op2 = get_op(PARAM2); | |
| 308 | + set_op(PARAM1, (uint16_t)op2); | |
| 309 | + FORCE_RET(); | |
| 310 | +} | |
| 311 | + | |
| 312 | +OP(ext16s32) | |
| 313 | +{ | |
| 314 | + uint32_t op2 = get_op(PARAM2); | |
| 315 | + set_op(PARAM1, (int16_t)op2); | |
| 316 | + FORCE_RET(); | |
| 317 | +} | |
| 318 | + | |
| 319 | +/* Load/store ops. */ | |
| 320 | +OP(ld8u32) | |
| 321 | +{ | |
| 322 | + uint32_t addr = get_op(PARAM2); | |
| 323 | + set_op(PARAM1, ldub(addr)); | |
| 324 | + FORCE_RET(); | |
| 325 | +} | |
| 326 | + | |
| 327 | +OP(ld8s32) | |
| 328 | +{ | |
| 329 | + uint32_t addr = get_op(PARAM2); | |
| 330 | + set_op(PARAM1, ldsb(addr)); | |
| 331 | + FORCE_RET(); | |
| 332 | +} | |
| 333 | + | |
| 334 | +OP(ld16u32) | |
| 335 | +{ | |
| 336 | + uint32_t addr = get_op(PARAM2); | |
| 337 | + set_op(PARAM1, lduw(addr)); | |
| 338 | + FORCE_RET(); | |
| 339 | +} | |
| 340 | + | |
| 341 | +OP(ld16s32) | |
| 342 | +{ | |
| 343 | + uint32_t addr = get_op(PARAM2); | |
| 344 | + set_op(PARAM1, ldsw(addr)); | |
| 345 | + FORCE_RET(); | |
| 346 | +} | |
| 347 | + | |
| 348 | +OP(ld32) | |
| 349 | +{ | |
| 350 | + uint32_t addr = get_op(PARAM2); | |
| 351 | + set_op(PARAM1, ldl(addr)); | |
| 352 | + FORCE_RET(); | |
| 353 | +} | |
| 354 | + | |
| 355 | +OP(st8) | |
| 356 | +{ | |
| 357 | + uint32_t addr = get_op(PARAM1); | |
| 358 | + stb(addr, get_op(PARAM2)); | |
| 359 | + FORCE_RET(); | |
| 360 | +} | |
| 361 | + | |
| 362 | +OP(st16) | |
| 363 | +{ | |
| 364 | + uint32_t addr = get_op(PARAM1); | |
| 365 | + stw(addr, get_op(PARAM2)); | |
| 366 | + FORCE_RET(); | |
| 367 | +} | |
| 368 | + | |
| 369 | +OP(st32) | |
| 370 | +{ | |
| 371 | + uint32_t addr = get_op(PARAM1); | |
| 372 | + stl(addr, get_op(PARAM2)); | |
| 373 | + FORCE_RET(); | |
| 374 | +} | |
| 375 | + | |
| 376 | +OP(ldf64) | |
| 377 | +{ | |
| 378 | + uint32_t addr = get_op(PARAM2); | |
| 379 | + set_opf64(PARAM1, ldfq(addr)); | |
| 380 | + FORCE_RET(); | |
| 381 | +} | |
| 382 | + | |
| 383 | +OP(stf64) | |
| 384 | +{ | |
| 385 | + uint32_t addr = get_op(PARAM1); | |
| 386 | + stfq(addr, get_opf64(PARAM2)); | |
| 387 | + FORCE_RET(); | |
| 388 | +} | |
| 389 | + | |
| 390 | +OP(flush_flags) | |
| 391 | +{ | |
| 392 | + int cc_op = PARAM1; | |
| 393 | + if (cc_op == CC_OP_DYNAMIC) | |
| 394 | + cc_op = env->cc_op; | |
| 395 | + cpu_m68k_flush_flags(env, cc_op); | |
| 396 | + FORCE_RET(); | |
| 397 | +} | |
| 398 | + | |
| 399 | +OP(divu) | |
| 400 | +{ | |
| 401 | + uint32_t num; | |
| 402 | + uint32_t den; | |
| 403 | + uint32_t quot; | |
| 404 | + uint32_t rem; | |
| 405 | + uint32_t flags; | |
| 406 | + | |
| 407 | + num = env->div1; | |
| 408 | + den = env->div2; | |
| 409 | + /* ??? This needs to make sure the throwing location is accurate. */ | |
| 410 | + if (den == 0) | |
| 411 | + RAISE_EXCEPTION(EXCP_DIV0); | |
| 412 | + quot = num / den; | |
| 413 | + rem = num % den; | |
| 414 | + flags = 0; | |
| 415 | + if (PARAM1 && quot > 0xffff) | |
| 416 | + flags |= CCF_V; | |
| 417 | + if (quot == 0) | |
| 418 | + flags |= CCF_Z; | |
| 419 | + else if ((int32_t)quot < 0) | |
| 420 | + flags |= CCF_N; | |
| 421 | + env->div1 = quot; | |
| 422 | + env->div2 = rem; | |
| 423 | + env->cc_dest = flags; | |
| 424 | + FORCE_RET(); | |
| 425 | +} | |
| 426 | + | |
| 427 | +OP(divs) | |
| 428 | +{ | |
| 429 | + int32_t num; | |
| 430 | + int32_t den; | |
| 431 | + int32_t quot; | |
| 432 | + int32_t rem; | |
| 433 | + int32_t flags; | |
| 434 | + | |
| 435 | + num = env->div1; | |
| 436 | + den = env->div2; | |
| 437 | + if (den == 0) | |
| 438 | + RAISE_EXCEPTION(EXCP_DIV0); | |
| 439 | + quot = num / den; | |
| 440 | + rem = num % den; | |
| 441 | + flags = 0; | |
| 442 | + if (PARAM1 && quot != (int16_t)quot) | |
| 443 | + flags |= CCF_V; | |
| 444 | + if (quot == 0) | |
| 445 | + flags |= CCF_Z; | |
| 446 | + else if (quot < 0) | |
| 447 | + flags |= CCF_N; | |
| 448 | + env->div1 = quot; | |
| 449 | + env->div2 = rem; | |
| 450 | + env->cc_dest = flags; | |
| 451 | + FORCE_RET(); | |
| 452 | +} | |
| 453 | + | |
| 454 | +OP(raise_exception) | |
| 455 | +{ | |
| 456 | + RAISE_EXCEPTION(PARAM1); | |
| 457 | + FORCE_RET(); | |
| 458 | +} | |
| 459 | + | |
| 460 | +/* Floating point comparison sets flags differently to other instructions. */ | |
| 461 | + | |
| 462 | +OP(sub_cmpf64) | |
| 463 | +{ | |
| 464 | + float64 src0; | |
| 465 | + float64 src1; | |
| 466 | + src0 = get_opf64(PARAM2); | |
| 467 | + src1 = get_opf64(PARAM3); | |
| 468 | + set_opf64(PARAM1, helper_sub_cmpf64(env, src0, src1)); | |
| 469 | + FORCE_RET(); | |
| 470 | +} | |
| 471 | + | |
| 472 | +OP(update_xflag_tst) | |
| 473 | +{ | |
| 474 | + uint32_t op1 = get_op(PARAM1); | |
| 475 | + env->cc_x = op1; | |
| 476 | + FORCE_RET(); | |
| 477 | +} | |
| 478 | + | |
| 479 | +OP(update_xflag_lt) | |
| 480 | +{ | |
| 481 | + uint32_t op1 = get_op(PARAM1); | |
| 482 | + uint32_t op2 = get_op(PARAM2); | |
| 483 | + env->cc_x = (op1 < op2); | |
| 484 | + FORCE_RET(); | |
| 485 | +} | |
| 486 | + | |
| 487 | +OP(get_xflag) | |
| 488 | +{ | |
| 489 | + set_op(PARAM1, env->cc_x); | |
| 490 | + FORCE_RET(); | |
| 491 | +} | |
| 492 | + | |
| 493 | +OP(logic_cc) | |
| 494 | +{ | |
| 495 | + uint32_t op1 = get_op(PARAM1); | |
| 496 | + env->cc_dest = op1; | |
| 497 | + FORCE_RET(); | |
| 498 | +} | |
| 499 | + | |
| 500 | +OP(update_cc_add) | |
| 501 | +{ | |
| 502 | + uint32_t op1 = get_op(PARAM1); | |
| 503 | + uint32_t op2 = get_op(PARAM2); | |
| 504 | + env->cc_dest = op1; | |
| 505 | + env->cc_src = op2; | |
| 506 | + FORCE_RET(); | |
| 507 | +} | |
| 508 | + | |
| 509 | +OP(fp_result) | |
| 510 | +{ | |
| 511 | + env->fp_result = get_opf64(PARAM1); | |
| 512 | + FORCE_RET(); | |
| 513 | +} | |
| 514 | + | |
| 515 | +OP(jmp) | |
| 516 | +{ | |
| 517 | + GOTO_LABEL_PARAM(1); | |
| 518 | +} | |
| 519 | + | |
| 520 | +/* These ops involve a function call, which probably requires a stack frame | |
| 521 | + and breaks things on some hosts. */ | |
| 522 | +OP(jmp_z32) | |
| 523 | +{ | |
| 524 | + uint32_t arg = get_op(PARAM1); | |
| 525 | + if (arg == 0) | |
| 526 | + GOTO_LABEL_PARAM(2); | |
| 527 | + FORCE_RET(); | |
| 528 | +} | |
| 529 | + | |
| 530 | +OP(jmp_nz32) | |
| 531 | +{ | |
| 532 | + uint32_t arg = get_op(PARAM1); | |
| 533 | + if (arg != 0) | |
| 534 | + GOTO_LABEL_PARAM(2); | |
| 535 | + FORCE_RET(); | |
| 536 | +} | |
| 537 | + | |
| 538 | +OP(jmp_s32) | |
| 539 | +{ | |
| 540 | + int32_t arg = get_op(PARAM1); | |
| 541 | + if (arg < 0) | |
| 542 | + GOTO_LABEL_PARAM(2); | |
| 543 | + FORCE_RET(); | |
| 544 | +} | |
| 545 | + | |
| 546 | +OP(jmp_ns32) | |
| 547 | +{ | |
| 548 | + int32_t arg = get_op(PARAM1); | |
| 549 | + if (arg >= 0) | |
| 550 | + GOTO_LABEL_PARAM(2); | |
| 551 | + FORCE_RET(); | |
| 552 | +} | |
| 553 | + | |
| 554 | +void OPPROTO op_goto_tb0(void) | |
| 555 | +{ | |
| 556 | + GOTO_TB(op_goto_tb0, PARAM1, 0); | |
| 557 | +} | |
| 558 | + | |
| 559 | +void OPPROTO op_goto_tb1(void) | |
| 560 | +{ | |
| 561 | + GOTO_TB(op_goto_tb1, PARAM1, 1); | |
| 562 | +} | |
| 563 | + | |
| 564 | +OP(exit_tb) | |
| 565 | +{ | |
| 566 | + EXIT_TB(); | |
| 567 | +} | |
| 568 | + | |
| 569 | + | |
| 570 | +/* Floating point. */ | |
| 571 | +OP(f64_to_i32) | |
| 572 | +{ | |
| 573 | + set_op(PARAM1, float64_to_int32(get_opf64(PARAM2), &CPU_FP_STATUS)); | |
| 574 | + FORCE_RET(); | |
| 575 | +} | |
| 576 | + | |
| 577 | +OP(f64_to_f32) | |
| 578 | +{ | |
| 579 | + union { | |
| 580 | + float32 f; | |
| 581 | + uint32_t i; | |
| 582 | + } u; | |
| 583 | + u.f = float64_to_float32(get_opf64(PARAM2), &CPU_FP_STATUS); | |
| 584 | + set_op(PARAM1, u.i); | |
| 585 | + FORCE_RET(); | |
| 586 | +} | |
| 587 | + | |
| 588 | +OP(i32_to_f64) | |
| 589 | +{ | |
| 590 | + set_opf64(PARAM1, int32_to_float64(get_op(PARAM2), &CPU_FP_STATUS)); | |
| 591 | + FORCE_RET(); | |
| 592 | +} | |
| 593 | + | |
| 594 | +OP(f32_to_f64) | |
| 595 | +{ | |
| 596 | + union { | |
| 597 | + float32 f; | |
| 598 | + uint32_t i; | |
| 599 | + } u; | |
| 600 | + u.i = get_op(PARAM2); | |
| 601 | + set_opf64(PARAM1, float32_to_float64(u.f, &CPU_FP_STATUS)); | |
| 602 | + FORCE_RET(); | |
| 603 | +} | |
| 604 | + | |
| 605 | +OP(absf64) | |
| 606 | +{ | |
| 607 | + float64 op0 = get_opf64(PARAM2); | |
| 608 | + set_opf64(PARAM1, float64_abs(op0)); | |
| 609 | + FORCE_RET(); | |
| 610 | +} | |
| 611 | + | |
| 612 | +OP(chsf64) | |
| 613 | +{ | |
| 614 | + float64 op0 = get_opf64(PARAM2); | |
| 615 | + set_opf64(PARAM1, float64_chs(op0)); | |
| 616 | + FORCE_RET(); | |
| 617 | +} | |
| 618 | + | |
| 619 | +OP(sqrtf64) | |
| 620 | +{ | |
| 621 | + float64 op0 = get_opf64(PARAM2); | |
| 622 | + set_opf64(PARAM1, float64_sqrt(op0, &CPU_FP_STATUS)); | |
| 623 | + FORCE_RET(); | |
| 624 | +} | |
| 625 | + | |
| 626 | +OP(addf64) | |
| 627 | +{ | |
| 628 | + float64 op0 = get_opf64(PARAM2); | |
| 629 | + float64 op1 = get_opf64(PARAM3); | |
| 630 | + set_opf64(PARAM1, float64_add(op0, op1, &CPU_FP_STATUS)); | |
| 631 | + FORCE_RET(); | |
| 632 | +} | |
| 633 | + | |
| 634 | +OP(subf64) | |
| 635 | +{ | |
| 636 | + float64 op0 = get_opf64(PARAM2); | |
| 637 | + float64 op1 = get_opf64(PARAM3); | |
| 638 | + set_opf64(PARAM1, float64_sub(op0, op1, &CPU_FP_STATUS)); | |
| 639 | + FORCE_RET(); | |
| 640 | +} | |
| 641 | + | |
| 642 | +OP(mulf64) | |
| 643 | +{ | |
| 644 | + float64 op0 = get_opf64(PARAM2); | |
| 645 | + float64 op1 = get_opf64(PARAM3); | |
| 646 | + set_opf64(PARAM1, float64_mul(op0, op1, &CPU_FP_STATUS)); | |
| 647 | + FORCE_RET(); | |
| 648 | +} | |
| 649 | + | |
| 650 | +OP(divf64) | |
| 651 | +{ | |
| 652 | + float64 op0 = get_opf64(PARAM2); | |
| 653 | + float64 op1 = get_opf64(PARAM3); | |
| 654 | + set_opf64(PARAM1, float64_div(op0, op1, &CPU_FP_STATUS)); | |
| 655 | + FORCE_RET(); | |
| 656 | +} | |
| 657 | + | |
| 658 | +OP(iround_f64) | |
| 659 | +{ | |
| 660 | + float64 op0 = get_opf64(PARAM2); | |
| 661 | + set_opf64(PARAM1, float64_round_to_int(op0, &CPU_FP_STATUS)); | |
| 662 | + FORCE_RET(); | |
| 663 | +} | |
| 664 | + | |
| 665 | +OP(itrunc_f64) | |
| 666 | +{ | |
| 667 | + float64 op0 = get_opf64(PARAM2); | |
| 668 | + set_opf64(PARAM1, float64_trunc_to_int(op0, &CPU_FP_STATUS)); | |
| 669 | + FORCE_RET(); | |
| 670 | +} | |
| 671 | + | |
| 672 | +OP(compare_quietf64) | |
| 673 | +{ | |
| 674 | + float64 op0 = get_opf64(PARAM2); | |
| 675 | + float64 op1 = get_opf64(PARAM3); | |
| 676 | + set_op(PARAM1, float64_compare_quiet(op0, op1, &CPU_FP_STATUS)); | |
| 677 | + FORCE_RET(); | |
| 678 | +} | ... | ... |
target-m68k/qregs.def
0 → 100644
| 1 | +DEFO32(D0, dregs[0]) | |
| 2 | +DEFO32(D1, dregs[1]) | |
| 3 | +DEFO32(D2, dregs[2]) | |
| 4 | +DEFO32(D3, dregs[3]) | |
| 5 | +DEFO32(D4, dregs[4]) | |
| 6 | +DEFO32(D5, dregs[5]) | |
| 7 | +DEFO32(D6, dregs[6]) | |
| 8 | +DEFO32(D7, dregs[7]) | |
| 9 | +DEFO32(A0, aregs[0]) | |
| 10 | +DEFO32(A1, aregs[1]) | |
| 11 | +DEFO32(A2, aregs[2]) | |
| 12 | +DEFO32(A3, aregs[3]) | |
| 13 | +DEFO32(A4, aregs[4]) | |
| 14 | +DEFO32(A5, aregs[5]) | |
| 15 | +DEFO32(A6, aregs[6]) | |
| 16 | +DEFO32(SP, aregs[7]) /* A7 */ | |
| 17 | +DEFF64(F0, fregs[0]) | |
| 18 | +DEFF64(F1, fregs[1]) | |
| 19 | +DEFF64(F2, fregs[2]) | |
| 20 | +DEFF64(F3, fregs[3]) | |
| 21 | +DEFF64(F4, fregs[4]) | |
| 22 | +DEFF64(F5, fregs[5]) | |
| 23 | +DEFF64(F6, fregs[6]) | |
| 24 | +DEFF64(F7, fregs[7]) | |
| 25 | +DEFF64(FP_RESULT, fp_result) | |
| 26 | +DEFO32(PC, pc) | |
| 27 | +DEFO32(CC_OP, cc_op) | |
| 28 | +DEFR(T0, AREG1, QMODE_I32) | |
| 29 | +DEFO32(CC_DEST, cc_dest) | |
| 30 | +DEFO32(CC_SRC, cc_src) | |
| 31 | +DEFO32(CC_X, cc_x) | |
| 32 | +DEFO32(DIV1, div1) | |
| 33 | +DEFO32(DIV2, div2) | |
| 34 | +DEFO32(EXCEPTION, exception_index) | ... | ... |