gwj / at91sam9263 · Commits

Commit 798085733c81a33b4185a0f06c2b591544372fce

Authored by bellard
1 parent b6f97c14

x86_64 and better i386 support 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4394 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 147 additions and 86 deletions
gdbstub.c
  View file @7980857
... ... @@ -240,112 +240,173 @@ static int put_packet(GDBState *s, char *buf)
240 240 }
241 241  
242 242 #if defined(TARGET_I386)
  243 +
  244 +#ifdef TARGET_X86_64
  245 +static const uint8_t gdb_x86_64_regs[16] = {
  246 + R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
  247 + 8, 9, 10, 11, 12, 13, 14, 15,
  248 +};
  249 +#endif
  250 +
243 251 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
244 252 {
245   - int i, fpus;
246   - uint32_t *registers = (uint32_t *)mem_buf;
  253 + int i, fpus, nb_regs;
  254 + uint8_t *p;
247 255  
  256 + p = mem_buf;
248 257 #ifdef TARGET_X86_64
249   - /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
250   - uint64_t *registers64 = (uint64_t *)mem_buf;
251   -
252 258 if (env->hflags & HF_CS64_MASK) {
253   - registers64[0] = tswap64(env->regs[R_EAX]);
254   - registers64[1] = tswap64(env->regs[R_EBX]);
255   - registers64[2] = tswap64(env->regs[R_ECX]);
256   - registers64[3] = tswap64(env->regs[R_EDX]);
257   - registers64[4] = tswap64(env->regs[R_ESI]);
258   - registers64[5] = tswap64(env->regs[R_EDI]);
259   - registers64[6] = tswap64(env->regs[R_EBP]);
260   - registers64[7] = tswap64(env->regs[R_ESP]);
261   - for(i = 8; i < 16; i++) {
262   - registers64[i] = tswap64(env->regs[i]);
  259 + nb_regs = 16;
  260 + for(i = 0; i < 16; i++) {
  261 + *(uint64_t *)p = tswap64(env->regs[gdb_x86_64_regs[i]]);
  262 + p += 8;
263 263 }
264   - registers64[16] = tswap64(env->eip);
265   -
266   - registers = (uint32_t *)&registers64[17];
267   - registers[0] = tswap32(env->eflags);
268   - registers[1] = tswap32(env->segs[R_CS].selector);
269   - registers[2] = tswap32(env->segs[R_SS].selector);
270   - registers[3] = tswap32(env->segs[R_DS].selector);
271   - registers[4] = tswap32(env->segs[R_ES].selector);
272   - registers[5] = tswap32(env->segs[R_FS].selector);
273   - registers[6] = tswap32(env->segs[R_GS].selector);
274   - /* XXX: convert floats */
  264 + *(uint64_t *)p = tswap64(env->eip);
  265 + p += 8;
  266 + } else
  267 +#endif
  268 + {
  269 + nb_regs = 8;
275 270 for(i = 0; i < 8; i++) {
276   - memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
277   - }
278   - registers[27] = tswap32(env->fpuc); /* fctrl */
279   - fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
280   - registers[28] = tswap32(fpus); /* fstat */
281   - registers[29] = 0; /* ftag */
282   - registers[30] = 0; /* fiseg */
283   - registers[31] = 0; /* fioff */
284   - registers[32] = 0; /* foseg */
285   - registers[33] = 0; /* fooff */
286   - registers[34] = 0; /* fop */
287   - for(i = 0; i < 16; i++) {
288   - memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
  271 + *(uint32_t *)p = tswap32(env->regs[i]);
  272 + p += 4;
289 273 }
290   - registers[99] = tswap32(env->mxcsr);
291   -
292   - return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
  274 + *(uint32_t *)p = tswap32(env->eip);
  275 + p += 4;
293 276 }
294   -#endif
295 277  
  278 + *(uint32_t *)p = tswap32(env->eflags);
  279 + p += 4;
  280 + *(uint32_t *)p = tswap32(env->segs[R_CS].selector);
  281 + p += 4;
  282 + *(uint32_t *)p = tswap32(env->segs[R_SS].selector);
  283 + p += 4;
  284 + *(uint32_t *)p = tswap32(env->segs[R_DS].selector);
  285 + p += 4;
  286 + *(uint32_t *)p = tswap32(env->segs[R_ES].selector);
  287 + p += 4;
  288 + *(uint32_t *)p = tswap32(env->segs[R_FS].selector);
  289 + p += 4;
  290 + *(uint32_t *)p = tswap32(env->segs[R_GS].selector);
  291 + p += 4;
296 292 for(i = 0; i < 8; i++) {
297   - registers[i] = env->regs[i];
298   - }
299   - registers[8] = env->eip;
300   - registers[9] = env->eflags;
301   - registers[10] = env->segs[R_CS].selector;
302   - registers[11] = env->segs[R_SS].selector;
303   - registers[12] = env->segs[R_DS].selector;
304   - registers[13] = env->segs[R_ES].selector;
305   - registers[14] = env->segs[R_FS].selector;
306   - registers[15] = env->segs[R_GS].selector;
307   - /* XXX: convert floats */
308   - for(i = 0; i < 8; i++) {
309   - memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
  293 + /* XXX: convert floats */
  294 +#ifdef USE_X86LDOUBLE
  295 + memcpy(p, &env->fpregs[i], 10);
  296 +#else
  297 + memset(p, 0, 10);
  298 +#endif
  299 + p += 10;
310 300 }
311   - registers[36] = env->fpuc;
  301 + *(uint32_t *)p = tswap32(env->fpuc); /* fctrl */
  302 + p += 4;
312 303 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
313   - registers[37] = fpus;
314   - registers[38] = 0; /* XXX: convert tags */
315   - registers[39] = 0; /* fiseg */
316   - registers[40] = 0; /* fioff */
317   - registers[41] = 0; /* foseg */
318   - registers[42] = 0; /* fooff */
319   - registers[43] = 0; /* fop */
320   -
321   - for(i = 0; i < 16; i++)
322   - tswapls(&registers[i]);
323   - for(i = 36; i < 44; i++)
324   - tswapls(&registers[i]);
325   - return 44 * 4;
  304 + *(uint32_t *)p = tswap32(fpus); /* fstat */
  305 + p += 4;
  306 + *(uint32_t *)p = 0; /* ftag */
  307 + p += 4;
  308 + *(uint32_t *)p = 0; /* fiseg */
  309 + p += 4;
  310 + *(uint32_t *)p = 0; /* fioff */
  311 + p += 4;
  312 + *(uint32_t *)p = 0; /* foseg */
  313 + p += 4;
  314 + *(uint32_t *)p = 0; /* fooff */
  315 + p += 4;
  316 + *(uint32_t *)p = 0; /* fop */
  317 + p += 4;
  318 + for(i = 0; i < nb_regs; i++) {
  319 + *(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(0));
  320 + p += 8;
  321 + *(uint64_t *)p = tswap64(env->xmm_regs[i].XMM_Q(1));
  322 + p += 8;
  323 + }
  324 + *(uint32_t *)p = tswap32(env->mxcsr);
  325 + p += 4;
  326 + return p - mem_buf;
  327 +}
  328 +
  329 +static inline void cpu_gdb_load_seg(CPUState *env, const uint8_t **pp,
  330 + int sreg)
  331 +{
  332 + const uint8_t *p;
  333 + uint32_t sel;
  334 + p = *pp;
  335 + sel = tswap32(*(uint32_t *)p);
  336 + p += 4;
  337 + if (sel != env->segs[sreg].selector) {
  338 +#if defined(CONFIG_USER_ONLY)
  339 + cpu_x86_load_seg(env, sreg, sel);
  340 +#else
  341 + /* XXX: do it with a debug function which does not raise an
  342 + exception */
  343 +#endif
  344 + }
  345 + *pp = p;
326 346 }
327 347  
328 348 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
329 349 {
330   - uint32_t *registers = (uint32_t *)mem_buf;
331   - int i;
  350 + const uint8_t *p = mem_buf;
  351 + int i, nb_regs;
  352 + uint16_t fpus;
332 353  
333   - for(i = 0; i < 8; i++) {
334   - env->regs[i] = tswapl(registers[i]);
  354 +#ifdef TARGET_X86_64
  355 + if (env->hflags & HF_CS64_MASK) {
  356 + nb_regs = 16;
  357 + for(i = 0; i < 16; i++) {
  358 + env->regs[gdb_x86_64_regs[i]] = tswap64(*(uint64_t *)p);
  359 + p += 8;
  360 + }
  361 + env->eip = tswap64(*(uint64_t *)p);
  362 + p += 8;
  363 + } else
  364 +#endif
  365 + {
  366 + nb_regs = 8;
  367 + for(i = 0; i < 8; i++) {
  368 + env->regs[i] = tswap32(*(uint32_t *)p);
  369 + p += 4;
  370 + }
  371 + env->eip = tswap32(*(uint32_t *)p);
  372 + p += 4;
335 373 }
336   - env->eip = tswapl(registers[8]);
337   - env->eflags = tswapl(registers[9]);
338   -#if defined(CONFIG_USER_ONLY)
339   -#define LOAD_SEG(index, sreg)\
340   - if (tswapl(registers[index]) != env->segs[sreg].selector)\
341   - cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
342   - LOAD_SEG(10, R_CS);
343   - LOAD_SEG(11, R_SS);
344   - LOAD_SEG(12, R_DS);
345   - LOAD_SEG(13, R_ES);
346   - LOAD_SEG(14, R_FS);
347   - LOAD_SEG(15, R_GS);
  374 + env->eflags = tswap32(*(uint32_t *)p);
  375 + p += 4;
  376 + cpu_gdb_load_seg(env, &p, R_CS);
  377 + cpu_gdb_load_seg(env, &p, R_SS);
  378 + cpu_gdb_load_seg(env, &p, R_DS);
  379 + cpu_gdb_load_seg(env, &p, R_ES);
  380 + cpu_gdb_load_seg(env, &p, R_FS);
  381 + cpu_gdb_load_seg(env, &p, R_GS);
  382 +
  383 + /* FPU state */
  384 + for(i = 0; i < 8; i++) {
  385 + /* XXX: convert floats */
  386 +#ifdef USE_X86LDOUBLE
  387 + memcpy(&env->fpregs[i], p, 10);
348 388 #endif
  389 + p += 10;
  390 + }
  391 + env->fpuc = tswap32(*(uint32_t *)p); /* fctrl */
  392 + p += 4;
  393 + fpus = tswap32(*(uint32_t *)p);
  394 + p += 4;
  395 + env->fpstt = (fpus >> 11) & 7;
  396 + env->fpus = fpus & ~0x3800;
  397 + p += 4 * 6;
  398 +
  399 + if (size >= ((p - mem_buf) + 16 * nb_regs + 4)) {
  400 + /* SSE state */
  401 + for(i = 0; i < nb_regs; i++) {
  402 + env->xmm_regs[i].XMM_Q(0) = tswap64(*(uint64_t *)p);
  403 + p += 8;
  404 + env->xmm_regs[i].XMM_Q(1) = tswap64(*(uint64_t *)p);
  405 + p += 8;
  406 + }
  407 + env->mxcsr = tswap32(*(uint32_t *)p);
  408 + p += 4;
  409 + }
349 410 }
350 411  
351 412 #elif defined (TARGET_PPC)
... ...