Commit aa1f17c18d3778b10a93b858c10c075ee023487a

Authored by ths
1 parent 4a1a1707

Spelling fixes, by Stefan Weil.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3066 c046a42c-6fe2-441c-8c8c-71466251a162
block-raw.c
... ... @@ -1295,7 +1295,7 @@ static int hdev_open(BlockDriverState *bs, const char *filename, int flags)
1295 1295  
1296 1296 #if 0
1297 1297 /***********************************************/
1298   -/* removable device additionnal commands */
  1298 +/* removable device additional commands */
1299 1299  
1300 1300 static int raw_is_inserted(BlockDriverState *bs)
1301 1301 {
... ...
dis-asm.h
... ... @@ -421,7 +421,7 @@ extern int generic_symbol_at_address
421 421 /* Call this macro to initialize only the internal variables for the
422 422 disassembler. Architecture dependent things such as byte order, or machine
423 423 variant are not touched by this macro. This makes things much easier for
424   - GDB which must initialize these things seperatly. */
  424 + GDB which must initialize these things separately. */
425 425  
426 426 #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
427 427 (INFO).fprintf_func = (FPRINTF_FUNC), \
... ...
gdbstub.c
... ... @@ -1248,12 +1248,12 @@ int gdbserver_start(int port)
1248 1248 return 0;
1249 1249 }
1250 1250 #else
1251   -static int gdb_chr_can_recieve(void *opaque)
  1251 +static int gdb_chr_can_receive(void *opaque)
1252 1252 {
1253 1253 return 1;
1254 1254 }
1255 1255  
1256   -static void gdb_chr_recieve(void *opaque, const uint8_t *buf, int size)
  1256 +static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1257 1257 {
1258 1258 GDBState *s = opaque;
1259 1259 int i;
... ... @@ -1304,7 +1304,7 @@ int gdbserver_start(const char *port)
1304 1304 }
1305 1305 s->env = first_cpu; /* XXX: allow to change CPU */
1306 1306 s->chr = chr;
1307   - qemu_chr_add_handlers(chr, gdb_chr_can_recieve, gdb_chr_recieve,
  1307 + qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1308 1308 gdb_chr_event, s);
1309 1309 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1310 1310 return 0;
... ...
hw/i2c.h
... ... @@ -10,7 +10,7 @@ enum i2c_event {
10 10 I2C_START_RECV,
11 11 I2C_START_SEND,
12 12 I2C_FINISH,
13   - I2C_NACK /* Masker NACKed a recieve byte. */
  13 + I2C_NACK /* Masker NACKed a receive byte. */
14 14 };
15 15  
16 16 typedef struct i2c_slave i2c_slave;
... ...
hw/ide.c
... ... @@ -1567,7 +1567,7 @@ static void ide_atapi_cmd(IDEState *s)
1567 1567 buf[1] = 0x80; /* removable */
1568 1568 buf[2] = 0x00; /* ISO */
1569 1569 buf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */
1570   - buf[4] = 31; /* additionnal length */
  1570 + buf[4] = 31; /* additional length */
1571 1571 buf[5] = 0; /* reserved */
1572 1572 buf[6] = 0; /* reserved */
1573 1573 buf[7] = 0; /* reserved */
... ...
hw/pl011.c
... ... @@ -176,7 +176,7 @@ static void pl011_write(void *opaque, target_phys_addr_t offset,
176 176 }
177 177 }
178 178  
179   -static int pl011_can_recieve(void *opaque)
  179 +static int pl011_can_receive(void *opaque)
180 180 {
181 181 pl011_state *s = (pl011_state *)opaque;
182 182  
... ... @@ -186,7 +186,7 @@ static int pl011_can_recieve(void *opaque)
186 186 return s->read_count < 1;
187 187 }
188 188  
189   -static void pl011_recieve(void *opaque, const uint8_t *buf, int size)
  189 +static void pl011_receive(void *opaque, const uint8_t *buf, int size)
190 190 {
191 191 pl011_state *s = (pl011_state *)opaque;
192 192 int slot;
... ... @@ -241,7 +241,7 @@ void pl011_init(uint32_t base, qemu_irq irq,
241 241 s->cr = 0x300;
242 242 s->flags = 0x90;
243 243 if (chr){
244   - qemu_chr_add_handlers(chr, pl011_can_recieve, pl011_recieve,
  244 + qemu_chr_add_handlers(chr, pl011_can_receive, pl011_receive,
245 245 pl011_event, s);
246 246 }
247 247 /* ??? Save/restore. */
... ...
hw/pl181.c
... ... @@ -160,7 +160,7 @@ static void pl181_send_command(pl181_state *s)
160 160 s->response[2] = RWORD(8);
161 161 s->response[3] = RWORD(12) & ~1;
162 162 }
163   - DPRINTF("Response recieved\n");
  163 + DPRINTF("Response received\n");
164 164 s->status |= PL181_STATUS_CMDRESPEND;
165 165 #undef RWORD
166 166 } else {
... ... @@ -174,7 +174,7 @@ error:
174 174 s->status |= PL181_STATUS_CMDTIMEOUT;
175 175 }
176 176  
177   -/* Transfer data between teh card and the FIFO. This is complicated by
  177 +/* Transfer data between the card and the FIFO. This is complicated by
178 178 the FIFO holding 32-bit words and the card taking data in single byte
179 179 chunks. FIFO bytes are transferred in little-endian order. */
180 180  
... ...
hw/rtl8139.c
... ... @@ -790,7 +790,7 @@ static int rtl8139_can_receive(void *opaque)
790 790 RTL8139State *s = opaque;
791 791 int avail;
792 792  
793   - /* Recieve (drop) packets if card is disabled. */
  793 + /* Receive (drop) packets if card is disabled. */
794 794 if (!s->clock_enabled)
795 795 return 1;
796 796 if (!rtl8139_receiver_enabled(s))
... ...
hw/usb.c
... ... @@ -140,7 +140,7 @@ int usb_generic_handle_packet(USBDevice *s, USBPacket *p)
140 140 s->setup_state = SETUP_STATE_IDLE;
141 141 /* transfer OK */
142 142 } else {
143   - /* ignore additionnal output */
  143 + /* ignore additional output */
144 144 }
145 145 break;
146 146 case SETUP_STATE_DATA:
... ...
linux-user/signal.c
... ... @@ -244,7 +244,7 @@ void host_to_target_siginfo(target_siginfo_t *tinfo, const siginfo_t *info)
244 244 }
245 245  
246 246 /* XXX: we support only POSIX RT signals are used. */
247   -/* XXX: find a solution for 64 bit (additionnal malloced data is needed) */
  247 +/* XXX: find a solution for 64 bit (additional malloced data is needed) */
248 248 void target_to_host_siginfo(siginfo_t *info, const target_siginfo_t *tinfo)
249 249 {
250 250 info->si_signo = tswap32(tinfo->si_signo);
... ...
m68k-dis.c
... ... @@ -560,7 +560,7 @@ static char *const reg_names[] =
560 560 };
561 561  
562 562 /* Name of register halves for MAC/EMAC.
563   - Seperate from reg_names since 'spu', 'fpl' look weird. */
  563 + Separate from reg_names since 'spu', 'fpl' look weird. */
564 564 static char *const reg_half_names[] =
565 565 {
566 566 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
... ...
target-i386/cpu.h
... ... @@ -121,7 +121,7 @@
121 121 #define VIP_MASK 0x00100000
122 122 #define ID_MASK 0x00200000
123 123  
124   -/* hidden flags - used internally by qemu to represent additionnal cpu
  124 +/* hidden flags - used internally by qemu to represent additional cpu
125 125 states. Only the CPL, INHIBIT_IRQ and HALTED are not redundant. We avoid
126 126 using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring
127 127 with eflags. */
... ...