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gdbstub.c 57.4 KB
bellard authored
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/*
 * gdb server stub
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 *
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 * Copyright (c) 2003-2005 Fabrice Bellard
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 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
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 */
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#include "config.h"
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#include "qemu-common.h"
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#ifdef CONFIG_USER_ONLY
#include <stdlib.h>
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
#include <errno.h>
#include <unistd.h>
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#include <fcntl.h>
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#include "qemu.h"
#else
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#include "qemu-char.h"
#include "sysemu.h"
#include "gdbstub.h"
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#endif
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#define MAX_PACKET_LENGTH 4096
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#include "qemu_socket.h"
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enum {
    GDB_SIGNAL_0 = 0,
    GDB_SIGNAL_INT = 2,
    GDB_SIGNAL_TRAP = 5,
    GDB_SIGNAL_UNKNOWN = 143
};

#ifdef CONFIG_USER_ONLY

/* Map target signal numbers to GDB protocol signal numbers and vice
 * versa.  For user emulation's currently supported systems, we can
 * assume most signals are defined.
 */

static int gdb_signal_table[] = {
    0,
    TARGET_SIGHUP,
    TARGET_SIGINT,
    TARGET_SIGQUIT,
    TARGET_SIGILL,
    TARGET_SIGTRAP,
    TARGET_SIGABRT,
    -1, /* SIGEMT */
    TARGET_SIGFPE,
    TARGET_SIGKILL,
    TARGET_SIGBUS,
    TARGET_SIGSEGV,
    TARGET_SIGSYS,
    TARGET_SIGPIPE,
    TARGET_SIGALRM,
    TARGET_SIGTERM,
    TARGET_SIGURG,
    TARGET_SIGSTOP,
    TARGET_SIGTSTP,
    TARGET_SIGCONT,
    TARGET_SIGCHLD,
    TARGET_SIGTTIN,
    TARGET_SIGTTOU,
    TARGET_SIGIO,
    TARGET_SIGXCPU,
    TARGET_SIGXFSZ,
    TARGET_SIGVTALRM,
    TARGET_SIGPROF,
    TARGET_SIGWINCH,
    -1, /* SIGLOST */
    TARGET_SIGUSR1,
    TARGET_SIGUSR2,
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#ifdef TARGET_SIGPWR
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    TARGET_SIGPWR,
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#else
    -1,
#endif
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    -1, /* SIGPOLL */
    -1,
    -1,
    -1,
    -1,
    -1,
    -1,
    -1,
    -1,
    -1,
    -1,
    -1,
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#ifdef __SIGRTMIN
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    __SIGRTMIN + 1,
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    -1, /* SIGCANCEL */
    __SIGRTMIN,
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    -1, /* SIGINFO */
    -1, /* UNKNOWN */
    -1, /* DEFAULT */
    -1,
    -1,
    -1,
    -1,
    -1,
    -1
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#endif
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};
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#else
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/* In system mode we only need SIGINT and SIGTRAP; other signals
   are not yet supported.  */

enum {
    TARGET_SIGINT = 2,
    TARGET_SIGTRAP = 5
};

static int gdb_signal_table[] = {
    -1,
    -1,
    TARGET_SIGINT,
    -1,
    -1,
    TARGET_SIGTRAP
};
#endif

#ifdef CONFIG_USER_ONLY
static int target_signal_to_gdb (int sig)
{
    int i;
    for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
        if (gdb_signal_table[i] == sig)
            return i;
    return GDB_SIGNAL_UNKNOWN;
}
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#endif
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static int gdb_signal_to_target (int sig)
{
    if (sig < ARRAY_SIZE (gdb_signal_table))
        return gdb_signal_table[sig];
    else
        return -1;
}
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//#define DEBUG_GDB
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typedef struct GDBRegisterState {
    int base_reg;
    int num_regs;
    gdb_reg_cb get_reg;
    gdb_reg_cb set_reg;
    const char *xml;
    struct GDBRegisterState *next;
} GDBRegisterState;
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enum RSState {
    RS_IDLE,
    RS_GETLINE,
    RS_CHKSUM1,
    RS_CHKSUM2,
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    RS_SYSCALL,
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};
typedef struct GDBState {
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    CPUState *c_cpu; /* current CPU for step/continue ops */
    CPUState *g_cpu; /* current CPU for other ops */
    CPUState *query_cpu; /* for q{f|s}ThreadInfo */
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    enum RSState state; /* parsing state */
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    char line_buf[MAX_PACKET_LENGTH];
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    int line_buf_index;
    int line_csum;
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    uint8_t last_packet[MAX_PACKET_LENGTH + 4];
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    int last_packet_len;
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    int signal;
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#ifdef CONFIG_USER_ONLY
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    int fd;
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    int running_state;
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#else
    CharDriverState *chr;
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#endif
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} GDBState;
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/* By default use no IRQs and no timers while single stepping so as to
 * make single stepping like an ICE HW step.
 */
static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
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static GDBState *gdbserver_state;
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/* This is an ugly hack to cope with both new and old gdb.
   If gdb sends qXfer:features:read then assume we're talking to a newish
   gdb that understands target descriptions.  */
static int gdb_has_xml;
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#ifdef CONFIG_USER_ONLY
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/* XXX: This is not thread safe.  Do we care?  */
static int gdbserver_fd = -1;
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static int get_char(GDBState *s)
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{
    uint8_t ch;
    int ret;

    for(;;) {
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        ret = recv(s->fd, &ch, 1, 0);
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        if (ret < 0) {
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            if (errno == ECONNRESET)
                s->fd = -1;
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            if (errno != EINTR && errno != EAGAIN)
                return -1;
        } else if (ret == 0) {
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            close(s->fd);
            s->fd = -1;
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            return -1;
        } else {
            break;
        }
    }
    return ch;
}
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#endif
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static gdb_syscall_complete_cb gdb_current_syscall_cb;

enum {
    GDB_SYS_UNKNOWN,
    GDB_SYS_ENABLED,
    GDB_SYS_DISABLED,
} gdb_syscall_mode;

/* If gdb is connected when the first semihosting syscall occurs then use
   remote gdb syscalls.  Otherwise use native file IO.  */
int use_gdb_syscalls(void)
{
    if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
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        gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
                                            : GDB_SYS_DISABLED);
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    }
    return gdb_syscall_mode == GDB_SYS_ENABLED;
}
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/* Resume execution.  */
static inline void gdb_continue(GDBState *s)
{
#ifdef CONFIG_USER_ONLY
    s->running_state = 1;
#else
    vm_start();
#endif
}
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static void put_buffer(GDBState *s, const uint8_t *buf, int len)
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{
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#ifdef CONFIG_USER_ONLY
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    int ret;

    while (len > 0) {
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        ret = send(s->fd, buf, len, 0);
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        if (ret < 0) {
            if (errno != EINTR && errno != EAGAIN)
                return;
        } else {
            buf += ret;
            len -= ret;
        }
    }
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#else
    qemu_chr_write(s->chr, buf, len);
#endif
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}

static inline int fromhex(int v)
{
    if (v >= '0' && v <= '9')
        return v - '0';
    else if (v >= 'A' && v <= 'F')
        return v - 'A' + 10;
    else if (v >= 'a' && v <= 'f')
        return v - 'a' + 10;
    else
        return 0;
}

static inline int tohex(int v)
{
    if (v < 10)
        return v + '0';
    else
        return v - 10 + 'a';
}

static void memtohex(char *buf, const uint8_t *mem, int len)
{
    int i, c;
    char *q;
    q = buf;
    for(i = 0; i < len; i++) {
        c = mem[i];
        *q++ = tohex(c >> 4);
        *q++ = tohex(c & 0xf);
    }
    *q = '\0';
}

static void hextomem(uint8_t *mem, const char *buf, int len)
{
    int i;

    for(i = 0; i < len; i++) {
        mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
        buf += 2;
    }
}

/* return -1 if error, 0 if OK */
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static int put_packet_binary(GDBState *s, const char *buf, int len)
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{
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    int csum, i;
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    uint8_t *p;
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    for(;;) {
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        p = s->last_packet;
        *(p++) = '$';
        memcpy(p, buf, len);
        p += len;
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        csum = 0;
        for(i = 0; i < len; i++) {
            csum += buf[i];
        }
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        *(p++) = '#';
        *(p++) = tohex((csum >> 4) & 0xf);
        *(p++) = tohex((csum) & 0xf);
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        s->last_packet_len = p - s->last_packet;
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        put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
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#ifdef CONFIG_USER_ONLY
        i = get_char(s);
        if (i < 0)
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            return -1;
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        if (i == '+')
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            break;
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#else
        break;
#endif
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    }
    return 0;
}
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/* return -1 if error, 0 if OK */
static int put_packet(GDBState *s, const char *buf)
{
#ifdef DEBUG_GDB
    printf("reply='%s'\n", buf);
#endif
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    return put_packet_binary(s, buf, strlen(buf));
}

/* The GDB remote protocol transfers values in target byte order.  This means
   we can use the raw memory access routines to access the value buffer.
   Conveniently, these also handle the case where the buffer is mis-aligned.
 */
#define GET_REG8(val) do { \
    stb_p(mem_buf, val); \
    return 1; \
    } while(0)
#define GET_REG16(val) do { \
    stw_p(mem_buf, val); \
    return 2; \
    } while(0)
#define GET_REG32(val) do { \
    stl_p(mem_buf, val); \
    return 4; \
    } while(0)
#define GET_REG64(val) do { \
    stq_p(mem_buf, val); \
    return 8; \
    } while(0)

#if TARGET_LONG_BITS == 64
#define GET_REGL(val) GET_REG64(val)
#define ldtul_p(addr) ldq_p(addr)
#else
#define GET_REGL(val) GET_REG32(val)
#define ldtul_p(addr) ldl_p(addr)
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#endif
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#if defined(TARGET_I386)
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#ifdef TARGET_X86_64
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static const int gpr_map[16] = {
    R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
    8, 9, 10, 11, 12, 13, 14, 15
};
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#else
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static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7};
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#endif
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#define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)

static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
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{
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    if (n < CPU_NB_REGS) {
        GET_REGL(env->regs[gpr_map[n]]);
    } else if (n >= CPU_NB_REGS + 8 && n < CPU_NB_REGS + 16) {
        /* FIXME: byteswap float values.  */
#ifdef USE_X86LDOUBLE
        memcpy(mem_buf, &env->fpregs[n - (CPU_NB_REGS + 8)], 10);
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#else
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        memset(mem_buf, 0, 10);
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#endif
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        return 10;
    } else if (n >= CPU_NB_REGS + 24) {
        n -= CPU_NB_REGS + 24;
        if (n < CPU_NB_REGS) {
            stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
            stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
            return 16;
        } else if (n == CPU_NB_REGS) {
            GET_REG32(env->mxcsr);
        } 
    } else {
        n -= CPU_NB_REGS;
        switch (n) {
        case 0: GET_REGL(env->eip);
        case 1: GET_REG32(env->eflags);
        case 2: GET_REG32(env->segs[R_CS].selector);
        case 3: GET_REG32(env->segs[R_SS].selector);
        case 4: GET_REG32(env->segs[R_DS].selector);
        case 5: GET_REG32(env->segs[R_ES].selector);
        case 6: GET_REG32(env->segs[R_FS].selector);
        case 7: GET_REG32(env->segs[R_GS].selector);
        /* 8...15 x87 regs.  */
        case 16: GET_REG32(env->fpuc);
        case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11);
        case 18: GET_REG32(0); /* ftag */
        case 19: GET_REG32(0); /* fiseg */
        case 20: GET_REG32(0); /* fioff */
        case 21: GET_REG32(0); /* foseg */
        case 22: GET_REG32(0); /* fooff */
        case 23: GET_REG32(0); /* fop */
        /* 24+ xmm regs.  */
        }
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    }
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    return 0;
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}
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static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i)
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{
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    uint32_t tmp;
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    if (i < CPU_NB_REGS) {
        env->regs[gpr_map[i]] = ldtul_p(mem_buf);
        return sizeof(target_ulong);
    } else if (i >= CPU_NB_REGS + 8 && i < CPU_NB_REGS + 16) {
        i -= CPU_NB_REGS + 8;
#ifdef USE_X86LDOUBLE
        memcpy(&env->fpregs[i], mem_buf, 10);
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#endif
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        return 10;
    } else if (i >= CPU_NB_REGS + 24) {
        i -= CPU_NB_REGS + 24;
        if (i < CPU_NB_REGS) {
            env->xmm_regs[i].XMM_Q(0) = ldq_p(mem_buf);
            env->xmm_regs[i].XMM_Q(1) = ldq_p(mem_buf + 8);
            return 16;
        } else if (i == CPU_NB_REGS) {
            env->mxcsr = ldl_p(mem_buf);
            return 4;
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        }
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    } else {
        i -= CPU_NB_REGS;
        switch (i) {
        case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong);
        case 1: env->eflags = ldl_p(mem_buf); return 4;
#if defined(CONFIG_USER_ONLY)
#define LOAD_SEG(index, sreg)\
            tmp = ldl_p(mem_buf);\
            if (tmp != env->segs[sreg].selector)\
                cpu_x86_load_seg(env, sreg, tmp);
#else
/* FIXME: Honor segment registers.  Needs to avoid raising an exception
   when the selector is invalid.  */
#define LOAD_SEG(index, sreg) do {} while(0)
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#endif
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        case 2: LOAD_SEG(10, R_CS); return 4;
        case 3: LOAD_SEG(11, R_SS); return 4;
        case 4: LOAD_SEG(12, R_DS); return 4;
        case 5: LOAD_SEG(13, R_ES); return 4;
        case 6: LOAD_SEG(14, R_FS); return 4;
        case 7: LOAD_SEG(15, R_GS); return 4;
        /* 8...15 x87 regs.  */
        case 16: env->fpuc = ldl_p(mem_buf); return 4;
        case 17:
                 tmp = ldl_p(mem_buf);
                 env->fpstt = (tmp >> 11) & 7;
                 env->fpus = tmp & ~0x3800;
                 return 4;
        case 18: /* ftag */ return 4;
        case 19: /* fiseg */ return 4;
        case 20: /* fioff */ return 4;
        case 21: /* foseg */ return 4;
        case 22: /* fooff */ return 4;
        case 23: /* fop */ return 4;
        /* 24+ xmm regs.  */
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        }
    }
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    /* Unrecognised register.  */
    return 0;
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}
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#elif defined (TARGET_PPC)
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static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
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{
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    if (n < 32) {
        /* gprs */
        GET_REGL(env->gpr[n]);
    } else if (n < 64) {
        /* fprs */
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        stfq_p(mem_buf, env->fpr[n-32]);
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        return 8;
    } else {
        switch (n) {
        case 64: GET_REGL(env->nip);
        case 65: GET_REGL(env->msr);
        case 66:
            {
                uint32_t cr = 0;
                int i;
                for (i = 0; i < 8; i++)
                    cr |= env->crf[i] << (32 - ((i + 1) * 4));
                GET_REG32(cr);
            }
        case 67: GET_REGL(env->lr);
        case 68: GET_REGL(env->ctr);
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        case 69: GET_REGL(env->xer);
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        case 70: GET_REG32(0); /* fpscr */
        }
    }
    return 0;
}
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static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
{
    if (n < 32) {
        /* gprs */
        env->gpr[n] = ldtul_p(mem_buf);
        return sizeof(target_ulong);
    } else if (n < 64) {
        /* fprs */
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        env->fpr[n-32] = ldfq_p(mem_buf);
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        return 8;
    } else {
        switch (n) {
        case 64:
            env->nip = ldtul_p(mem_buf);
            return sizeof(target_ulong);
        case 65:
            ppc_store_msr(env, ldtul_p(mem_buf));
            return sizeof(target_ulong);
        case 66:
            {
                uint32_t cr = ldl_p(mem_buf);
                int i;
                for (i = 0; i < 8; i++)
                    env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
                return 4;
            }
        case 67:
            env->lr = ldtul_p(mem_buf);
            return sizeof(target_ulong);
        case 68:
            env->ctr = ldtul_p(mem_buf);
            return sizeof(target_ulong);
        case 69:
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            env->xer = ldtul_p(mem_buf);
            return sizeof(target_ulong);
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        case 70:
            /* fpscr */
            return 4;
        }
    }
    return 0;
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}
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#elif defined (TARGET_SPARC)
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#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
#define NUM_CORE_REGS 86
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#else
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#define NUM_CORE_REGS 72
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#endif
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#ifdef TARGET_ABI32
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#define GET_REGA(val) GET_REG32(val)
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#else
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#define GET_REGA(val) GET_REGL(val)
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#endif
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static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
{
    if (n < 8) {
        /* g0..g7 */
        GET_REGA(env->gregs[n]);
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    }
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    if (n < 32) {
        /* register window */
        GET_REGA(env->regwptr[n - 8]);
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    }
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#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
    if (n < 64) {
        /* fprs */
        GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
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    }
    /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
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    switch (n) {
    case 64: GET_REGA(env->y);
    case 65: GET_REGA(GET_PSR(env));
    case 66: GET_REGA(env->wim);
    case 67: GET_REGA(env->tbr);
    case 68: GET_REGA(env->pc);
    case 69: GET_REGA(env->npc);
    case 70: GET_REGA(env->fsr);
    case 71: GET_REGA(0); /* csr */
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    default: GET_REGA(0);
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    }
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#else
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    if (n < 64) {
        /* f0-f31 */
        GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
    }
    if (n < 80) {
        /* f32-f62 (double width, even numbers only) */
        uint64_t val;
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        val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
        val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
        GET_REG64(val);
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    }
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    switch (n) {
    case 80: GET_REGL(env->pc);
    case 81: GET_REGL(env->npc);
    case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
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                           ((env->asi & 0xff) << 24) |
                           ((env->pstate & 0xfff) << 8) |
                           GET_CWP64(env));
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    case 83: GET_REGL(env->fsr);
    case 84: GET_REGL(env->fprs);
    case 85: GET_REGL(env->y);
    }
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#endif
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    return 0;
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}
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static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
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{
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#if defined(TARGET_ABI32)
    abi_ulong tmp;

    tmp = ldl_p(mem_buf);
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#else
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    target_ulong tmp;

    tmp = ldtul_p(mem_buf);
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#endif
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    if (n < 8) {
        /* g0..g7 */
        env->gregs[n] = tmp;
    } else if (n < 32) {
        /* register window */
        env->regwptr[n - 8] = tmp;
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    }
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#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
    else if (n < 64) {
        /* fprs */
        *((uint32_t *)&env->fpr[n - 32]) = tmp;
    } else {
        /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
        switch (n) {
        case 64: env->y = tmp; break;
        case 65: PUT_PSR(env, tmp); break;
        case 66: env->wim = tmp; break;
        case 67: env->tbr = tmp; break;
        case 68: env->pc = tmp; break;
        case 69: env->npc = tmp; break;
        case 70: env->fsr = tmp; break;
        default: return 0;
        }
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    }
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    return 4;
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#else
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    else if (n < 64) {
        /* f0-f31 */
        env->fpr[n] = ldfl_p(mem_buf);
        return 4;
    } else if (n < 80) {
        /* f32-f62 (double width, even numbers only) */
        *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
        *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
    } else {
        switch (n) {
        case 80: env->pc = tmp; break;
        case 81: env->npc = tmp; break;
        case 82:
	    PUT_CCR(env, tmp >> 32);
	    env->asi = (tmp >> 24) & 0xff;
	    env->pstate = (tmp >> 8) & 0xfff;
	    PUT_CWP64(env, tmp & 0xff);
	    break;
        case 83: env->fsr = tmp; break;
        case 84: env->fprs = tmp; break;
        case 85: env->y = tmp; break;
        default: return 0;
        }
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    }
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    return 8;
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#endif
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}
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#elif defined (TARGET_ARM)
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/* Old gdb always expect FPA registers.  Newer (xml-aware) gdb only expect
   whatever the target description contains.  Due to a historical mishap
   the FPA registers appear in between core integer regs and the CPSR.
   We hack round this by giving the FPA regs zero size when talking to a
   newer gdb.  */
#define NUM_CORE_REGS 26
#define GDB_CORE_XML "arm-core.xml"
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static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
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{
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    if (n < 16) {
        /* Core integer register.  */
        GET_REG32(env->regs[n]);
    }
    if (n < 24) {
        /* FPA registers.  */
        if (gdb_has_xml)
            return 0;
        memset(mem_buf, 0, 12);
        return 12;
    }
    switch (n) {
    case 24:
        /* FPA status register.  */
        if (gdb_has_xml)
            return 0;
        GET_REG32(0);
    case 25:
        /* CPSR */
        GET_REG32(cpsr_read(env));
    }
    /* Unknown register.  */
    return 0;
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}
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static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
{
    uint32_t tmp;
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    tmp = ldl_p(mem_buf);
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    /* Mask out low bit of PC to workaround gdb bugs.  This will probably
       cause problems if we ever implement the Jazelle DBX extensions.  */
    if (n == 15)
        tmp &= ~1;
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    if (n < 16) {
        /* Core integer register.  */
        env->regs[n] = tmp;
        return 4;
    }
    if (n < 24) { /* 16-23 */
        /* FPA registers (ignored).  */
        if (gdb_has_xml)
            return 0;
        return 12;
    }
    switch (n) {
    case 24:
        /* FPA status register (ignored).  */
        if (gdb_has_xml)
            return 0;
        return 4;
    case 25:
        /* CPSR */
        cpsr_write (env, tmp, 0xffffffff);
        return 4;
    }
    /* Unknown register.  */
    return 0;
}
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#elif defined (TARGET_M68K)
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#define NUM_CORE_REGS 18
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#define GDB_CORE_XML "cf-core.xml"
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static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
{
    if (n < 8) {
        /* D0-D7 */
        GET_REG32(env->dregs[n]);
    } else if (n < 16) {
        /* A0-A7 */
        GET_REG32(env->aregs[n - 8]);
    } else {
	switch (n) {
        case 16: GET_REG32(env->sr);
        case 17: GET_REG32(env->pc);
        }
    }
    /* FP registers not included here because they vary between
       ColdFire and m68k.  Use XML bits for these.  */
    return 0;
}
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static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
{
    uint32_t tmp;
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    tmp = ldl_p(mem_buf);
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    if (n < 8) {
        /* D0-D7 */
        env->dregs[n] = tmp;
    } else if (n < 8) {
        /* A0-A7 */
        env->aregs[n - 8] = tmp;
    } else {
        switch (n) {
        case 16: env->sr = tmp; break;
        case 17: env->pc = tmp; break;
        default: return 0;
        }
    }
    return 4;
}
#elif defined (TARGET_MIPS)
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#define NUM_CORE_REGS 73
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static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
{
    if (n < 32) {
        GET_REGL(env->active_tc.gpr[n]);
    }
    if (env->CP0_Config1 & (1 << CP0C1_FP)) {
        if (n >= 38 && n < 70) {
            if (env->CP0_Status & (1 << CP0St_FR))
		GET_REGL(env->active_fpu.fpr[n - 38].d);
            else
		GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
        }
        switch (n) {
        case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
        case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
        }
    }
    switch (n) {
    case 32: GET_REGL((int32_t)env->CP0_Status);
    case 33: GET_REGL(env->active_tc.LO[0]);
    case 34: GET_REGL(env->active_tc.HI[0]);
    case 35: GET_REGL(env->CP0_BadVAddr);
    case 36: GET_REGL((int32_t)env->CP0_Cause);
    case 37: GET_REGL(env->active_tc.PC);
    case 72: GET_REGL(0); /* fp */
    case 89: GET_REGL((int32_t)env->CP0_PRid);
    }
    if (n >= 73 && n <= 88) {
	/* 16 embedded regs.  */
	GET_REGL(0);
    }
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    return 0;
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}
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/* convert MIPS rounding mode in FCR31 to IEEE library */
static unsigned int ieee_rm[] =
  {
    float_round_nearest_even,
    float_round_to_zero,
    float_round_up,
    float_round_down
  };
#define RESTORE_ROUNDING_MODE \
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    set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
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static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
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{
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    target_ulong tmp;
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    tmp = ldtul_p(mem_buf);
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    if (n < 32) {
        env->active_tc.gpr[n] = tmp;
        return sizeof(target_ulong);
    }
    if (env->CP0_Config1 & (1 << CP0C1_FP)
            && n >= 38 && n < 73) {
        if (n < 70) {
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            if (env->CP0_Status & (1 << CP0St_FR))
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              env->active_fpu.fpr[n - 38].d = tmp;
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            else
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              env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
        }
        switch (n) {
        case 70:
            env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
            /* set rounding mode */
            RESTORE_ROUNDING_MODE;
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#ifndef CONFIG_SOFTFLOAT
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            /* no floating point exception for native float */
            SET_FP_ENABLE(env->active_fpu.fcr31, 0);
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#endif
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            break;
        case 71: env->active_fpu.fcr0 = tmp; break;
        }
        return sizeof(target_ulong);
    }
    switch (n) {
    case 32: env->CP0_Status = tmp; break;
    case 33: env->active_tc.LO[0] = tmp; break;
    case 34: env->active_tc.HI[0] = tmp; break;
    case 35: env->CP0_BadVAddr = tmp; break;
    case 36: env->CP0_Cause = tmp; break;
    case 37: env->active_tc.PC = tmp; break;
    case 72: /* fp, ignored */ break;
    default: 
	if (n > 89)
	    return 0;
	/* Other registers are readonly.  Ignore writes.  */
	break;
    }

    return sizeof(target_ulong);
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}
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#elif defined (TARGET_SH4)
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/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
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/* FIXME: We should use XML for this.  */

#define NUM_CORE_REGS 59
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static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
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{
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    if (n < 8) {
        if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
            GET_REGL(env->gregs[n + 16]);
        } else {
            GET_REGL(env->gregs[n]);
        }
    } else if (n < 16) {
        GET_REGL(env->gregs[n - 8]);
    } else if (n >= 25 && n < 41) {
	GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
    } else if (n >= 43 && n < 51) {
	GET_REGL(env->gregs[n - 43]);
    } else if (n >= 51 && n < 59) {
	GET_REGL(env->gregs[n - (51 - 16)]);
    }
    switch (n) {
    case 16: GET_REGL(env->pc);
    case 17: GET_REGL(env->pr);
    case 18: GET_REGL(env->gbr);
    case 19: GET_REGL(env->vbr);
    case 20: GET_REGL(env->mach);
    case 21: GET_REGL(env->macl);
    case 22: GET_REGL(env->sr);
    case 23: GET_REGL(env->fpul);
    case 24: GET_REGL(env->fpscr);
    case 41: GET_REGL(env->ssr);
    case 42: GET_REGL(env->spc);
    }

    return 0;
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}
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static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
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{
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    uint32_t tmp;

    tmp = ldl_p(mem_buf);

    if (n < 8) {
        if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
            env->gregs[n + 16] = tmp;
        } else {
            env->gregs[n] = tmp;
        }
	return 4;
    } else if (n < 16) {
        env->gregs[n - 8] = tmp;
	return 4;
    } else if (n >= 25 && n < 41) {
	env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
    } else if (n >= 43 && n < 51) {
	env->gregs[n - 43] = tmp;
	return 4;
    } else if (n >= 51 && n < 59) {
	env->gregs[n - (51 - 16)] = tmp;
	return 4;
    }
    switch (n) {
    case 16: env->pc = tmp;
    case 17: env->pr = tmp;
    case 18: env->gbr = tmp;
    case 19: env->vbr = tmp;
    case 20: env->mach = tmp;
    case 21: env->macl = tmp;
    case 22: env->sr = tmp;
    case 23: env->fpul = tmp;
    case 24: env->fpscr = tmp;
    case 41: env->ssr = tmp;
    case 42: env->spc = tmp;
    default: return 0;
    }

    return 4;
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}
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#elif defined (TARGET_CRIS)
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#define NUM_CORE_REGS 49

static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
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{
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    uint8_t srs;

    srs = env->pregs[PR_SRS];
    if (n < 16) {
	GET_REG32(env->regs[n]);
    }

    if (n >= 21 && n < 32) {
	GET_REG32(env->pregs[n - 16]);
    }
    if (n >= 33 && n < 49) {
	GET_REG32(env->sregs[srs][n - 33]);
    }
    switch (n) {
    case 16: GET_REG8(env->pregs[0]);
    case 17: GET_REG8(env->pregs[1]);
    case 18: GET_REG32(env->pregs[2]);
    case 19: GET_REG8(srs);
    case 20: GET_REG16(env->pregs[4]);
    case 32: GET_REG32(env->pc);
    }

    return 0;
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static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1166
{
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    uint32_t tmp;

    if (n > 49)
	return 0;

    tmp = ldl_p(mem_buf);

    if (n < 16) {
	env->regs[n] = tmp;
    }
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    if (n >= 21 && n < 32) {
	env->pregs[n - 16] = tmp;
    }

    /* FIXME: Should support function regs be writable?  */
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    switch (n) {
    case 16: return 1;
    case 17: return 1;
1186
    case 18: env->pregs[PR_PID] = tmp; break;
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    case 19: return 1;
    case 20: return 2;
    case 32: env->pc = tmp; break;
    }

    return 4;
1193
}
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#elif defined (TARGET_ALPHA)

#define NUM_CORE_REGS 65

static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
{
    if (n < 31) {
       GET_REGL(env->ir[n]);
    }
    else if (n == 31) {
       GET_REGL(0);
    }
    else if (n<63) {
       uint64_t val;

       val=*((uint64_t *)&env->fir[n-32]);
       GET_REGL(val);
    }
    else if (n==63) {
       GET_REGL(env->fpcr);
    }
    else if (n==64) {
       GET_REGL(env->pc);
    }
    else {
       GET_REGL(0);
    }

    return 0;
}

static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
{
    target_ulong tmp;
    tmp = ldtul_p(mem_buf);

    if (n < 31) {
        env->ir[n] = tmp;
    }

    if (n > 31 && n < 63) {
        env->fir[n - 32] = ldfl_p(mem_buf);
    }

    if (n == 64 ) {
       env->pc=tmp;
    }

    return 8;
}
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#else

#define NUM_CORE_REGS 0

static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1249
{
1250
    return 0;
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}
1253
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1254
{
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    return 0;
}
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#endif
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static int num_g_regs = NUM_CORE_REGS;
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#ifdef GDB_CORE_XML
/* Encode data using the encoding for 'x' packets.  */
static int memtox(char *buf, const char *mem, int len)
{
    char *p = buf;
    char c;

    while (len--) {
        c = *(mem++);
        switch (c) {
        case '#': case '$': case '*': case '}':
            *(p++) = '}';
            *(p++) = c ^ 0x20;
            break;
        default:
            *(p++) = c;
            break;
        }
    }
    return p - buf;
}
1283
aurel32 authored
1284
static const char *get_feature_xml(const char *p, const char **newp)
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{
    extern const char *const xml_builtin[][2];
    size_t len;
    int i;
    const char *name;
    static char target_xml[1024];

    len = 0;
    while (p[len] && p[len] != ':')
        len++;
    *newp = p + len;

    name = NULL;
    if (strncmp(p, "target.xml", len) == 0) {
        /* Generate the XML description for this CPU.  */
        if (!target_xml[0]) {
            GDBRegisterState *r;
1303
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            snprintf(target_xml, sizeof(target_xml),
                     "<?xml version=\"1.0\"?>"
                     "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
                     "<target>"
                     "<xi:include href=\"%s\"/>",
                     GDB_CORE_XML);
1309
1310
            for (r = first_cpu->gdb_regs; r; r = r->next) {
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                strcat(target_xml, "<xi:include href=\"");
                strcat(target_xml, r->xml);
                strcat(target_xml, "\"/>");
            }
            strcat(target_xml, "</target>");
        }
        return target_xml;
    }
    for (i = 0; ; i++) {
        name = xml_builtin[i][0];
        if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
            break;
    }
    return name ? xml_builtin[i][1] : NULL;
}
#endif
1327
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1330
static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
{
    GDBRegisterState *r;
1331
1332
1333
    if (reg < NUM_CORE_REGS)
        return cpu_gdb_read_register(env, mem_buf, reg);
1334
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1339
1340
    for (r = env->gdb_regs; r; r = r->next) {
        if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
            return r->get_reg(env, mem_buf, reg - r->base_reg);
        }
    }
    return 0;
1341
1342
}
1343
static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
1344
{
1345
    GDBRegisterState *r;
1346
1347
1348
1349
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1352
1353
1354
    if (reg < NUM_CORE_REGS)
        return cpu_gdb_write_register(env, mem_buf, reg);

    for (r = env->gdb_regs; r; r = r->next) {
        if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
            return r->set_reg(env, mem_buf, reg - r->base_reg);
        }
    }
bellard authored
1355
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1357
    return 0;
}
1358
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1366
/* Register a supplemental set of CPU registers.  If g_pos is nonzero it
   specifies the first register number and these registers are included in
   a standard "g" packet.  Direction is relative to gdb, i.e. get_reg is
   gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
 */

void gdb_register_coprocessor(CPUState * env,
                             gdb_reg_cb get_reg, gdb_reg_cb set_reg,
                             int num_regs, const char *xml, int g_pos)
bellard authored
1367
{
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1395
    GDBRegisterState *s;
    GDBRegisterState **p;
    static int last_reg = NUM_CORE_REGS;

    s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
    s->base_reg = last_reg;
    s->num_regs = num_regs;
    s->get_reg = get_reg;
    s->set_reg = set_reg;
    s->xml = xml;
    p = &env->gdb_regs;
    while (*p) {
        /* Check for duplicates.  */
        if (strcmp((*p)->xml, xml) == 0)
            return;
        p = &(*p)->next;
    }
    /* Add to end of list.  */
    last_reg += num_regs;
    *p = s;
    if (g_pos) {
        if (g_pos != s->base_reg) {
            fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
                    "Expected %d got %d\n", xml, g_pos, s->base_reg);
        } else {
            num_g_regs = last_reg;
        }
    }
bellard authored
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}
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/* GDB breakpoint/watchpoint types */
#define GDB_BREAKPOINT_SW        0
#define GDB_BREAKPOINT_HW        1
#define GDB_WATCHPOINT_WRITE     2
#define GDB_WATCHPOINT_READ      3
#define GDB_WATCHPOINT_ACCESS    4

#ifndef CONFIG_USER_ONLY
static const int xlat_gdb_type[] = {
    [GDB_WATCHPOINT_WRITE]  = BP_GDB | BP_MEM_WRITE,
    [GDB_WATCHPOINT_READ]   = BP_GDB | BP_MEM_READ,
    [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
};
#endif
1413
static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
1414
{
1415
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1417
    CPUState *env;
    int err = 0;
1418
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1420
    switch (type) {
    case GDB_BREAKPOINT_SW:
    case GDB_BREAKPOINT_HW:
1421
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1424
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1426
        for (env = first_cpu; env != NULL; env = env->next_cpu) {
            err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
            if (err)
                break;
        }
        return err;
1427
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#ifndef CONFIG_USER_ONLY
    case GDB_WATCHPOINT_WRITE:
    case GDB_WATCHPOINT_READ:
    case GDB_WATCHPOINT_ACCESS:
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1437
        for (env = first_cpu; env != NULL; env = env->next_cpu) {
            err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
                                        NULL);
            if (err)
                break;
        }
        return err;
1438
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1440
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1442
1443
#endif
    default:
        return -ENOSYS;
    }
}
1444
static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
1445
{
1446
1447
1448
    CPUState *env;
    int err = 0;
1449
1450
1451
    switch (type) {
    case GDB_BREAKPOINT_SW:
    case GDB_BREAKPOINT_HW:
1452
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1454
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1457
        for (env = first_cpu; env != NULL; env = env->next_cpu) {
            err = cpu_breakpoint_remove(env, addr, BP_GDB);
            if (err)
                break;
        }
        return err;
1458
1459
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1461
#ifndef CONFIG_USER_ONLY
    case GDB_WATCHPOINT_WRITE:
    case GDB_WATCHPOINT_READ:
    case GDB_WATCHPOINT_ACCESS:
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1467
        for (env = first_cpu; env != NULL; env = env->next_cpu) {
            err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
            if (err)
                break;
        }
        return err;
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#endif
    default:
        return -ENOSYS;
    }
}
1474
static void gdb_breakpoint_remove_all(void)
1475
{
1476
1477
1478
1479
    CPUState *env;

    for (env = first_cpu; env != NULL; env = env->next_cpu) {
        cpu_breakpoint_remove_all(env, BP_GDB);
1480
#ifndef CONFIG_USER_ONLY
1481
        cpu_watchpoint_remove_all(env, BP_GDB);
1482
#endif
1483
    }
1484
1485
}
1486
static int gdb_handle_packet(GDBState *s, const char *line_buf)
bellard authored
1487
{
1488
    CPUState *env;
bellard authored
1489
    const char *p;
1490
    int ch, reg_size, type, res, thread;
1491
1492
1493
    char buf[MAX_PACKET_LENGTH];
    uint8_t mem_buf[MAX_PACKET_LENGTH];
    uint8_t *registers;
1494
    target_ulong addr, len;
1495
1496
1497
1498
1499
1500
1501
1502
#ifdef DEBUG_GDB
    printf("command='%s'\n", line_buf);
#endif
    p = line_buf;
    ch = *p++;
    switch(ch) {
    case '?':
1503
        /* TODO: Make this return the correct value for user-mode.  */
1504
        snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
1505
                 s->c_cpu->cpu_index+1);
1506
        put_packet(s, buf);
1507
1508
1509
1510
        /* Remove all the breakpoints when this query is issued,
         * because gdb is doing and initial connect and the state
         * should be cleaned up.
         */
1511
        gdb_breakpoint_remove_all();
1512
1513
1514
        break;
    case 'c':
        if (*p != '\0') {
1515
            addr = strtoull(p, (char **)&p, 16);
bellard authored
1516
#if defined(TARGET_I386)
1517
            s->c_cpu->eip = addr;
bellard authored
1518
#elif defined (TARGET_PPC)
1519
            s->c_cpu->nip = addr;
bellard authored
1520
#elif defined (TARGET_SPARC)
1521
1522
            s->c_cpu->pc = addr;
            s->c_cpu->npc = addr + 4;
1523
#elif defined (TARGET_ARM)
1524
            s->c_cpu->regs[15] = addr;
bellard authored
1525
#elif defined (TARGET_SH4)
1526
            s->c_cpu->pc = addr;
1527
#elif defined (TARGET_MIPS)
1528
            s->c_cpu->active_tc.PC = addr;
1529
#elif defined (TARGET_CRIS)
1530
            s->c_cpu->pc = addr;
1531
1532
#elif defined (TARGET_ALPHA)
            s->c_cpu->pc = addr;
bellard authored
1533
#endif
1534
        }
1535
        s->signal = 0;
1536
        gdb_continue(s);
bellard authored
1537
	return RS_IDLE;
1538
    case 'C':
1539
1540
1541
        s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
        if (s->signal == -1)
            s->signal = 0;
1542
1543
        gdb_continue(s);
        return RS_IDLE;
1544
1545
1546
1547
1548
1549
    case 'k':
        /* Kill the target */
        fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
        exit(0);
    case 'D':
        /* Detach packet */
1550
        gdb_breakpoint_remove_all();
1551
1552
1553
        gdb_continue(s);
        put_packet(s, "OK");
        break;
1554
1555
    case 's':
        if (*p != '\0') {
1556
            addr = strtoull(p, (char **)&p, 16);
1557
#if defined(TARGET_I386)
1558
            s->c_cpu->eip = addr;
bellard authored
1559
#elif defined (TARGET_PPC)
1560
            s->c_cpu->nip = addr;
bellard authored
1561
#elif defined (TARGET_SPARC)
1562
1563
            s->c_cpu->pc = addr;
            s->c_cpu->npc = addr + 4;
1564
#elif defined (TARGET_ARM)
1565
            s->c_cpu->regs[15] = addr;
bellard authored
1566
#elif defined (TARGET_SH4)
1567
            s->c_cpu->pc = addr;
1568
#elif defined (TARGET_MIPS)
1569
            s->c_cpu->active_tc.PC = addr;
1570
#elif defined (TARGET_CRIS)
1571
            s->c_cpu->pc = addr;
1572
1573
#elif defined (TARGET_ALPHA)
            s->c_cpu->pc = addr;
1574
#endif
1575
        }
1576
        cpu_single_step(s->c_cpu, sstep_flags);
1577
        gdb_continue(s);
bellard authored
1578
	return RS_IDLE;
pbrook authored
1579
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1594
    case 'F':
        {
            target_ulong ret;
            target_ulong err;

            ret = strtoull(p, (char **)&p, 16);
            if (*p == ',') {
                p++;
                err = strtoull(p, (char **)&p, 16);
            } else {
                err = 0;
            }
            if (*p == ',')
                p++;
            type = *p;
            if (gdb_current_syscall_cb)
1595
                gdb_current_syscall_cb(s->c_cpu, ret, err);
pbrook authored
1596
1597
1598
            if (type == 'C') {
                put_packet(s, "T02");
            } else {
1599
                gdb_continue(s);
pbrook authored
1600
1601
1602
            }
        }
        break;
1603
    case 'g':
1604
1605
        len = 0;
        for (addr = 0; addr < num_g_regs; addr++) {
1606
            reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1607
1608
1609
            len += reg_size;
        }
        memtohex(buf, mem_buf, len);
1610
1611
1612
        put_packet(s, buf);
        break;
    case 'G':
1613
        registers = mem_buf;
1614
1615
        len = strlen(p) / 2;
        hextomem((uint8_t *)registers, p, len);
1616
        for (addr = 0; addr < num_g_regs && len > 0; addr++) {
1617
            reg_size = gdb_write_register(s->g_cpu, registers, addr);
1618
1619
1620
            len -= reg_size;
            registers += reg_size;
        }
1621
1622
1623
        put_packet(s, "OK");
        break;
    case 'm':
1624
        addr = strtoull(p, (char **)&p, 16);
1625
1626
        if (*p == ',')
            p++;
1627
        len = strtoull(p, NULL, 16);
1628
        if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) {
1629
1630
1631
1632
1633
            put_packet (s, "E14");
        } else {
            memtohex(buf, mem_buf, len);
            put_packet(s, buf);
        }
1634
1635
        break;
    case 'M':
1636
        addr = strtoull(p, (char **)&p, 16);
1637
1638
        if (*p == ',')
            p++;
1639
        len = strtoull(p, (char **)&p, 16);
1640
        if (*p == ':')
1641
1642
            p++;
        hextomem(mem_buf, p, len);
1643
        if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0)
1644
            put_packet(s, "E14");
1645
1646
1647
        else
            put_packet(s, "OK");
        break;
1648
1649
1650
1651
1652
1653
1654
    case 'p':
        /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
           This works, but can be very slow.  Anything new enough to
           understand XML also knows how to use this properly.  */
        if (!gdb_has_xml)
            goto unknown_command;
        addr = strtoull(p, (char **)&p, 16);
1655
        reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1656
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1664
1665
1666
1667
1668
1669
1670
        if (reg_size) {
            memtohex(buf, mem_buf, reg_size);
            put_packet(s, buf);
        } else {
            put_packet(s, "E14");
        }
        break;
    case 'P':
        if (!gdb_has_xml)
            goto unknown_command;
        addr = strtoull(p, (char **)&p, 16);
        if (*p == '=')
            p++;
        reg_size = strlen(p) / 2;
        hextomem(mem_buf, p, reg_size);
1671
        gdb_write_register(s->g_cpu, mem_buf, addr);
1672
1673
        put_packet(s, "OK");
        break;
1674
1675
1676
1677
1678
    case 'Z':
    case 'z':
        type = strtoul(p, (char **)&p, 16);
        if (*p == ',')
            p++;
1679
        addr = strtoull(p, (char **)&p, 16);
1680
1681
        if (*p == ',')
            p++;
1682
        len = strtoull(p, (char **)&p, 16);
1683
        if (ch == 'Z')
1684
            res = gdb_breakpoint_insert(addr, len, type);
1685
        else
1686
            res = gdb_breakpoint_remove(addr, len, type);
1687
1688
1689
        if (res >= 0)
             put_packet(s, "OK");
        else if (res == -ENOSYS)
pbrook authored
1690
            put_packet(s, "");
1691
1692
        else
            put_packet(s, "E22");
1693
        break;
1694
1695
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1704
1705
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1723
1724
1725
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1729
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1732
    case 'H':
        type = *p++;
        thread = strtoull(p, (char **)&p, 16);
        if (thread == -1 || thread == 0) {
            put_packet(s, "OK");
            break;
        }
        for (env = first_cpu; env != NULL; env = env->next_cpu)
            if (env->cpu_index + 1 == thread)
                break;
        if (env == NULL) {
            put_packet(s, "E22");
            break;
        }
        switch (type) {
        case 'c':
            s->c_cpu = env;
            put_packet(s, "OK");
            break;
        case 'g':
            s->g_cpu = env;
            put_packet(s, "OK");
            break;
        default:
             put_packet(s, "E22");
             break;
        }
        break;
    case 'T':
        thread = strtoull(p, (char **)&p, 16);
#ifndef CONFIG_USER_ONLY
        if (thread > 0 && thread < smp_cpus + 1)
#else
        if (thread == 1)
#endif
             put_packet(s, "OK");
        else
            put_packet(s, "E22");
        break;
1733
    case 'q':
1734
1735
1736
1737
    case 'Q':
        /* parse any 'q' packets here */
        if (!strcmp(p,"qemu.sstepbits")) {
            /* Query Breakpoint bit definitions */
1738
1739
1740
1741
            snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
                     SSTEP_ENABLE,
                     SSTEP_NOIRQ,
                     SSTEP_NOTIMER);
1742
1743
1744
1745
1746
1747
1748
            put_packet(s, buf);
            break;
        } else if (strncmp(p,"qemu.sstep",10) == 0) {
            /* Display or change the sstep_flags */
            p += 10;
            if (*p != '=') {
                /* Display current setting */
1749
                snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1750
1751
1752
1753
1754
1755
1756
1757
                put_packet(s, buf);
                break;
            }
            p++;
            type = strtoul(p, (char **)&p, 16);
            sstep_flags = type;
            put_packet(s, "OK");
            break;
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
        } else if (strcmp(p,"C") == 0) {
            /* "Current thread" remains vague in the spec, so always return
             *  the first CPU (gdb returns the first thread). */
            put_packet(s, "QC1");
            break;
        } else if (strcmp(p,"fThreadInfo") == 0) {
            s->query_cpu = first_cpu;
            goto report_cpuinfo;
        } else if (strcmp(p,"sThreadInfo") == 0) {
        report_cpuinfo:
            if (s->query_cpu) {
                snprintf(buf, sizeof(buf), "m%x", s->query_cpu->cpu_index+1);
                put_packet(s, buf);
                s->query_cpu = s->query_cpu->next_cpu;
            } else
                put_packet(s, "l");
            break;
        } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
            thread = strtoull(p+16, (char **)&p, 16);
            for (env = first_cpu; env != NULL; env = env->next_cpu)
                if (env->cpu_index + 1 == thread) {
                    len = snprintf((char *)mem_buf, sizeof(mem_buf),
                                   "CPU#%d [%s]", env->cpu_index,
                                   env->halted ? "halted " : "running");
                    memtohex(buf, mem_buf, len);
                    put_packet(s, buf);
                    break;
                }
            break;
1787
1788
1789
        }
#ifdef CONFIG_LINUX_USER
        else if (strncmp(p, "Offsets", 7) == 0) {
1790
            TaskState *ts = s->c_cpu->opaque;
1791
1792
1793
1794
1795
1796
1797
            snprintf(buf, sizeof(buf),
                     "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
                     ";Bss=" TARGET_ABI_FMT_lx,
                     ts->info->code_offset,
                     ts->info->data_offset,
                     ts->info->data_offset);
1798
1799
1800
1801
            put_packet(s, buf);
            break;
        }
#endif
1802
        if (strncmp(p, "Supported", 9) == 0) {
1803
            snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
#ifdef GDB_CORE_XML
            strcat(buf, ";qXfer:features:read+");
#endif
            put_packet(s, buf);
            break;
        }
#ifdef GDB_CORE_XML
        if (strncmp(p, "Xfer:features:read:", 19) == 0) {
            const char *xml;
            target_ulong total_len;

            gdb_has_xml = 1;
            p += 19;
1817
            xml = get_feature_xml(p, &p);
1818
            if (!xml) {
1819
                snprintf(buf, sizeof(buf), "E00");
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
                put_packet(s, buf);
                break;
            }

            if (*p == ':')
                p++;
            addr = strtoul(p, (char **)&p, 16);
            if (*p == ',')
                p++;
            len = strtoul(p, (char **)&p, 16);

            total_len = strlen(xml);
            if (addr > total_len) {
1833
                snprintf(buf, sizeof(buf), "E00");
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
                put_packet(s, buf);
                break;
            }
            if (len > (MAX_PACKET_LENGTH - 5) / 2)
                len = (MAX_PACKET_LENGTH - 5) / 2;
            if (len < total_len - addr) {
                buf[0] = 'm';
                len = memtox(buf + 1, xml + addr, len);
            } else {
                buf[0] = 'l';
                len = memtox(buf + 1, xml + addr, total_len - addr);
            }
            put_packet_binary(s, buf, len + 1);
            break;
        }
#endif
        /* Unrecognised 'q' command.  */
        goto unknown_command;
1853
    default:
1854
    unknown_command:
1855
1856
1857
1858
1859
1860
1861
1862
        /* put empty packet */
        buf[0] = '\0';
        put_packet(s, buf);
        break;
    }
    return RS_IDLE;
}
1863
1864
1865
1866
1867
1868
void gdb_set_stop_cpu(CPUState *env)
{
    gdbserver_state->c_cpu = env;
    gdbserver_state->g_cpu = env;
}
1869
#ifndef CONFIG_USER_ONLY
1870
1871
static void gdb_vm_stopped(void *opaque, int reason)
{
1872
1873
    GDBState *s = gdbserver_state;
    CPUState *env = s->c_cpu;
1874
    char buf[256];
1875
    const char *type;
1876
1877
    int ret;
pbrook authored
1878
1879
1880
    if (s->state == RS_SYSCALL)
        return;
1881
    /* disable single step if it was enable */
1882
    cpu_single_step(env, 0);
1883
bellard authored
1884
    if (reason == EXCP_DEBUG) {
1885
1886
        if (env->watchpoint_hit) {
            switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
1887
            case BP_MEM_READ:
1888
1889
                type = "r";
                break;
1890
            case BP_MEM_ACCESS:
1891
1892
1893
1894
1895
1896
                type = "a";
                break;
            default:
                type = "";
                break;
            }
1897
1898
            snprintf(buf, sizeof(buf),
                     "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
1899
                     GDB_SIGNAL_TRAP, env->cpu_index+1, type,
1900
                     env->watchpoint_hit->vaddr);
1901
            put_packet(s, buf);
1902
            env->watchpoint_hit = NULL;
1903
1904
            return;
        }
1905
	tb_flush(env);
1906
        ret = GDB_SIGNAL_TRAP;
1907
    } else if (reason == EXCP_INTERRUPT) {
1908
        ret = GDB_SIGNAL_INT;
1909
    } else {
1910
        ret = 0;
1911
    }
1912
    snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, env->cpu_index+1);
1913
1914
    put_packet(s, buf);
}
1915
#endif
1916
pbrook authored
1917
1918
/* Send a gdb syscall request.
   This accepts limited printf-style format specifiers, specifically:
pbrook authored
1919
1920
1921
    %x  - target_ulong argument printed in hex.
    %lx - 64-bit argument printed in hex.
    %s  - string pointer (target_ulong) and length (int) pair.  */
1922
void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
pbrook authored
1923
1924
1925
1926
1927
{
    va_list va;
    char buf[256];
    char *p;
    target_ulong addr;
pbrook authored
1928
    uint64_t i64;
pbrook authored
1929
1930
    GDBState *s;
1931
    s = gdbserver_state;
pbrook authored
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
    if (!s)
        return;
    gdb_current_syscall_cb = cb;
    s->state = RS_SYSCALL;
#ifndef CONFIG_USER_ONLY
    vm_stop(EXCP_DEBUG);
#endif
    s->state = RS_IDLE;
    va_start(va, fmt);
    p = buf;
    *(p++) = 'F';
    while (*fmt) {
        if (*fmt == '%') {
            fmt++;
            switch (*fmt++) {
            case 'x':
                addr = va_arg(va, target_ulong);
1949
                p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
pbrook authored
1950
                break;
pbrook authored
1951
1952
1953
1954
            case 'l':
                if (*(fmt++) != 'x')
                    goto bad_format;
                i64 = va_arg(va, uint64_t);
1955
                p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
pbrook authored
1956
                break;
pbrook authored
1957
1958
            case 's':
                addr = va_arg(va, target_ulong);
1959
1960
                p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
                              addr, va_arg(va, int));
pbrook authored
1961
1962
                break;
            default:
pbrook authored
1963
            bad_format:
pbrook authored
1964
1965
1966
1967
1968
1969
1970
1971
                fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
                        fmt - 1);
                break;
            }
        } else {
            *(p++) = *(fmt++);
        }
    }
1972
    *p = 0;
pbrook authored
1973
1974
1975
    va_end(va);
    put_packet(s, buf);
#ifdef CONFIG_USER_ONLY
1976
    gdb_handlesig(s->c_cpu, 0);
pbrook authored
1977
#else
1978
    cpu_interrupt(s->c_cpu, CPU_INTERRUPT_EXIT);
pbrook authored
1979
1980
1981
#endif
}
bellard authored
1982
static void gdb_read_byte(GDBState *s, int ch)
1983
1984
{
    int i, csum;
1985
    uint8_t reply;
1986
1987
#ifndef CONFIG_USER_ONLY
1988
1989
1990
1991
1992
1993
1994
    if (s->last_packet_len) {
        /* Waiting for a response to the last packet.  If we see the start
           of a new command then abandon the previous response.  */
        if (ch == '-') {
#ifdef DEBUG_GDB
            printf("Got NACK, retransmitting\n");
#endif
1995
            put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
        }
#ifdef DEBUG_GDB
        else if (ch == '+')
            printf("Got ACK\n");
        else
            printf("Got '%c' when expecting ACK/NACK\n", ch);
#endif
        if (ch == '+' || ch == '$')
            s->last_packet_len = 0;
        if (ch != '$')
            return;
    }
2008
2009
2010
2011
    if (vm_running) {
        /* when the CPU is running, we cannot do anything except stop
           it when receiving a char */
        vm_stop(EXCP_INTERRUPT);
2012
    } else
2013
#endif
bellard authored
2014
    {
2015
2016
2017
2018
2019
        switch(s->state) {
        case RS_IDLE:
            if (ch == '$') {
                s->line_buf_index = 0;
                s->state = RS_GETLINE;
2020
            }
bellard authored
2021
            break;
2022
2023
2024
2025
2026
        case RS_GETLINE:
            if (ch == '#') {
            s->state = RS_CHKSUM1;
            } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
                s->state = RS_IDLE;
bellard authored
2027
            } else {
2028
            s->line_buf[s->line_buf_index++] = ch;
bellard authored
2029
2030
            }
            break;
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
        case RS_CHKSUM1:
            s->line_buf[s->line_buf_index] = '\0';
            s->line_csum = fromhex(ch) << 4;
            s->state = RS_CHKSUM2;
            break;
        case RS_CHKSUM2:
            s->line_csum |= fromhex(ch);
            csum = 0;
            for(i = 0; i < s->line_buf_index; i++) {
                csum += s->line_buf[i];
            }
            if (s->line_csum != (csum & 0xff)) {
2043
2044
                reply = '-';
                put_buffer(s, &reply, 1);
2045
                s->state = RS_IDLE;
bellard authored
2046
            } else {
2047
2048
                reply = '+';
                put_buffer(s, &reply, 1);
2049
                s->state = gdb_handle_packet(s, s->line_buf);
bellard authored
2050
2051
            }
            break;
pbrook authored
2052
2053
        default:
            abort();
2054
2055
2056
2057
        }
    }
}
2058
2059
#ifdef CONFIG_USER_ONLY
int
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
gdb_queuesig (void)
{
    GDBState *s;

    s = gdbserver_state;

    if (gdbserver_fd < 0 || s->fd < 0)
        return 0;
    else
        return 1;
}

int
2073
2074
2075
2076
2077
2078
gdb_handlesig (CPUState *env, int sig)
{
  GDBState *s;
  char buf[256];
  int n;
2079
  s = gdbserver_state;
2080
2081
  if (gdbserver_fd < 0 || s->fd < 0)
    return sig;
2082
2083
2084
2085
2086
2087
2088

  /* disable single step if it was enabled */
  cpu_single_step(env, 0);
  tb_flush(env);

  if (sig != 0)
    {
2089
      snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig));
2090
2091
      put_packet(s, buf);
    }
2092
2093
2094
2095
  /* put_packet() might have detected that the peer terminated the 
     connection.  */
  if (s->fd < 0)
      return sig;
2096
2097
2098

  sig = 0;
  s->state = RS_IDLE;
bellard authored
2099
2100
  s->running_state = 0;
  while (s->running_state == 0) {
2101
2102
2103
2104
2105
2106
      n = read (s->fd, buf, 256);
      if (n > 0)
        {
          int i;

          for (i = 0; i < n; i++)
bellard authored
2107
            gdb_read_byte (s, buf[i]);
2108
2109
2110
2111
2112
2113
2114
        }
      else if (n == 0 || errno != EAGAIN)
        {
          /* XXX: Connection closed.  Should probably wait for annother
             connection before continuing.  */
          return sig;
        }
bellard authored
2115
  }
2116
2117
  sig = s->signal;
  s->signal = 0;
2118
2119
  return sig;
}
2120
2121
2122
2123
2124
2125
2126

/* Tell the remote gdb that the process has exited.  */
void gdb_exit(CPUState *env, int code)
{
  GDBState *s;
  char buf[4];
2127
  s = gdbserver_state;
2128
2129
  if (gdbserver_fd < 0 || s->fd < 0)
    return;
2130
2131
2132
2133
2134

  snprintf(buf, sizeof(buf), "W%02x", code);
  put_packet(s, buf);
}
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
/* Tell the remote gdb that the process has exited due to SIG.  */
void gdb_signalled(CPUState *env, int sig)
{
  GDBState *s;
  char buf[4];

  s = gdbserver_state;
  if (gdbserver_fd < 0 || s->fd < 0)
    return;

  snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig));
  put_packet(s, buf);
}
2148
2149
static void gdb_accept(void)
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
{
    GDBState *s;
    struct sockaddr_in sockaddr;
    socklen_t len;
    int val, fd;

    for(;;) {
        len = sizeof(sockaddr);
        fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
        if (fd < 0 && errno != EINTR) {
            perror("accept");
            return;
        } else if (fd >= 0) {
bellard authored
2163
2164
2165
            break;
        }
    }
2166
2167
2168

    /* set short latency */
    val = 1;
bellard authored
2169
    setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
2170
2171
2172
2173
2174
2175
2176
2177
    s = qemu_mallocz(sizeof(GDBState));
    if (!s) {
        errno = ENOMEM;
        perror("accept");
        return;
    }
2178
    memset (s, 0, sizeof (GDBState));
2179
2180
    s->c_cpu = first_cpu;
    s->g_cpu = first_cpu;
2181
    s->fd = fd;
2182
    gdb_has_xml = 0;
2183
2184
    gdbserver_state = s;
pbrook authored
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
    fcntl(fd, F_SETFL, O_NONBLOCK);
}

static int gdbserver_open(int port)
{
    struct sockaddr_in sockaddr;
    int fd, val, ret;

    fd = socket(PF_INET, SOCK_STREAM, 0);
    if (fd < 0) {
        perror("socket");
        return -1;
    }

    /* allow fast reuse */
    val = 1;
bellard authored
2202
    setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225

    sockaddr.sin_family = AF_INET;
    sockaddr.sin_port = htons(port);
    sockaddr.sin_addr.s_addr = 0;
    ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
    if (ret < 0) {
        perror("bind");
        return -1;
    }
    ret = listen(fd, 0);
    if (ret < 0) {
        perror("listen");
        return -1;
    }
    return fd;
}

int gdbserver_start(int port)
{
    gdbserver_fd = gdbserver_open(port);
    if (gdbserver_fd < 0)
        return -1;
    /* accept connections */
2226
    gdb_accept();
2227
2228
    return 0;
}
2229
2230
2231
2232
2233

/* Disable gdb stub for child processes.  */
void gdbserver_fork(CPUState *env)
{
    GDBState *s = gdbserver_state;
2234
    if (gdbserver_fd < 0 || s->fd < 0)
2235
2236
2237
2238
2239
2240
      return;
    close(s->fd);
    s->fd = -1;
    cpu_breakpoint_remove_all(env, BP_GDB);
    cpu_watchpoint_remove_all(env, BP_GDB);
}
2241
#else
ths authored
2242
static int gdb_chr_can_receive(void *opaque)
2243
{
2244
2245
2246
  /* We can handle an arbitrarily large amount of data.
   Pick the maximum packet size, which is as good as anything.  */
  return MAX_PACKET_LENGTH;
2247
2248
}
ths authored
2249
static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
2250
2251
2252
2253
{
    int i;

    for (i = 0; i < size; i++) {
2254
        gdb_read_byte(gdbserver_state, buf[i]);
2255
2256
2257
2258
2259
2260
2261
2262
    }
}

static void gdb_chr_event(void *opaque, int event)
{
    switch (event) {
    case CHR_EVENT_RESET:
        vm_stop(EXCP_INTERRUPT);
2263
        gdb_has_xml = 0;
2264
2265
2266
2267
2268
2269
        break;
    default:
        break;
    }
}
2270
int gdbserver_start(const char *port)
2271
2272
{
    GDBState *s;
2273
2274
2275
2276
2277
2278
2279
    char gdbstub_port_name[128];
    int port_num;
    char *p;
    CharDriverState *chr;

    if (!port || !*port)
      return -1;
2280
2281
2282
2283
2284
2285
2286
2287
2288
    port_num = strtol(port, &p, 10);
    if (*p == 0) {
        /* A numeric value is interpreted as a port number.  */
        snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
                 "tcp::%d,nowait,nodelay,server", port_num);
        port = gdbstub_port_name;
    }
2289
    chr = qemu_chr_open("gdb", port);
2290
2291
2292
2293
2294
2295
2296
    if (!chr)
        return -1;

    s = qemu_mallocz(sizeof(GDBState));
    if (!s) {
        return -1;
    }
2297
2298
    s->c_cpu = first_cpu;
    s->g_cpu = first_cpu;
2299
    s->chr = chr;
2300
    gdbserver_state = s;
ths authored
2301
    qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2302
2303
                          gdb_chr_event, NULL);
    qemu_add_vm_stop_handler(gdb_vm_stopped, NULL);
bellard authored
2304
2305
    return 0;
}
2306
#endif