Blame view

hw/pc.c 32.3 KB
1
2
/*
 * QEMU PC System Emulator
3
 *
4
 * Copyright (c) 2003-2004 Fabrice Bellard
5
 *
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
pbrook authored
24
25
26
27
28
29
30
31
32
33
#include "hw.h"
#include "pc.h"
#include "fdc.h"
#include "pci.h"
#include "block.h"
#include "sysemu.h"
#include "audio/audio.h"
#include "net.h"
#include "smbus.h"
#include "boards.h"
aurel32 authored
34
#include "console.h"
35
#include "fw_cfg.h"
aliguori authored
36
#include "virtio-blk.h"
aliguori authored
37
#include "virtio-balloon.h"
38
#include "virtio-console.h"
39
#include "hpet_emul.h"
40
bellard authored
41
42
43
/* output Bochs bios info messages */
//#define DEBUG_BIOS
44
45
#define BIOS_FILENAME "bios.bin"
#define VGABIOS_FILENAME "vgabios.bin"
46
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
47
48
49
#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
50
51
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
#define ACPI_DATA_SIZE       0x10000
52
#define BIOS_CFG_IOPORT 0x510
53
54
55
#define MAX_IDE_BUS 2
56
static fdctrl_t *floppy_controller;
bellard authored
57
static RTCState *rtc_state;
bellard authored
58
static PITState *pit;
59
static IOAPICState *ioapic;
bellard authored
60
static PCIDevice *i440fx_state;
61
bellard authored
62
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
63
64
65
{
}
66
/* MSDOS compatibility mode FPU exception support */
pbrook authored
67
static qemu_irq ferr_irq;
68
69
70
/* XXX: add IGNNE support */
void cpu_set_ferr(CPUX86State *s)
{
pbrook authored
71
    qemu_irq_raise(ferr_irq);
72
73
74
75
}

static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
{
pbrook authored
76
    qemu_irq_lower(ferr_irq);
77
78
}
bellard authored
79
80
81
/* TSC handling */
uint64_t cpu_get_tsc(CPUX86State *env)
{
82
83
84
    /* Note: when using kqemu, it is more logical to return the host TSC
       because kqemu does not trap the RDTSC instruction for
       performance reasons */
85
#ifdef USE_KQEMU
86
87
    if (env->kqemu_enabled) {
        return cpu_get_real_ticks();
88
    } else
89
90
91
92
#endif
    {
        return cpu_get_ticks();
    }
bellard authored
93
94
}
bellard authored
95
96
97
98
99
100
101
102
/* SMM support */
void cpu_smm_update(CPUState *env)
{
    if (i440fx_state && env == first_cpu)
        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
}
bellard authored
103
104
105
106
107
108
109
110
111
/* IRQ handling */
int cpu_get_pic_interrupt(CPUState *env)
{
    int intno;

    intno = apic_get_interrupt(env);
    if (intno >= 0) {
        /* set irq request if a PIC irq is still pending */
        /* XXX: improve that */
112
        pic_update_irq(isa_pic);
bellard authored
113
114
115
        return intno;
    }
    /* read the irq from the PIC */
116
117
118
    if (!apic_accept_pic_intr(env))
        return -1;
bellard authored
119
120
121
122
    intno = pic_read_irq(isa_pic);
    return intno;
}
pbrook authored
123
static void pic_irq_request(void *opaque, int irq, int level)
bellard authored
124
{
125
126
    CPUState *env = first_cpu;
aurel32 authored
127
128
129
    if (env->apic_state) {
        while (env) {
            if (apic_accept_pic_intr(env))
130
                apic_deliver_pic_intr(env, level);
aurel32 authored
131
132
133
            env = env->next_cpu;
        }
    } else {
134
135
136
137
        if (level)
            cpu_interrupt(env, CPU_INTERRUPT_HARD);
        else
            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
138
    }
bellard authored
139
140
}
bellard authored
141
142
/* PC cmos mappings */
143
144
#define REG_EQUIPMENT_BYTE          0x14
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
static int cmos_get_fd_drive_type(int fd0)
{
    int val;

    switch (fd0) {
    case 0:
        /* 1.44 Mb 3"5 drive */
        val = 4;
        break;
    case 1:
        /* 2.88 Mb 3"5 drive */
        val = 5;
        break;
    case 2:
        /* 1.2 Mb 5"5 drive */
        val = 2;
        break;
    default:
        val = 0;
        break;
    }
    return val;
}
169
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
bellard authored
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
{
    RTCState *s = rtc_state;
    int cylinders, heads, sectors;
    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
    rtc_set_memory(s, type_ofs, 47);
    rtc_set_memory(s, info_ofs, cylinders);
    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
    rtc_set_memory(s, info_ofs + 2, heads);
    rtc_set_memory(s, info_ofs + 3, 0xff);
    rtc_set_memory(s, info_ofs + 4, 0xff);
    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
    rtc_set_memory(s, info_ofs + 6, cylinders);
    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
    rtc_set_memory(s, info_ofs + 8, sectors);
}
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
/* convert boot_device letter to something recognizable by the bios */
static int boot_device2nibble(char boot_device)
{
    switch(boot_device) {
    case 'a':
    case 'b':
        return 0x01; /* floppy boot */
    case 'c':
        return 0x02; /* hard drive boot */
    case 'd':
        return 0x03; /* CD-ROM boot */
    case 'n':
        return 0x04; /* Network boot */
    }
    return 0;
}
203
204
/* copy/pasted from cmos_init, should be made a general function
 and used there as well */
205
static int pc_boot_set(void *opaque, const char *boot_device)
206
207
{
#define PC_MAX_BOOT_DEVICES 3
208
    RTCState *s = (RTCState *)opaque;
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
    int nbds, bds[3] = { 0, };
    int i;

    nbds = strlen(boot_device);
    if (nbds > PC_MAX_BOOT_DEVICES) {
        term_printf("Too many boot devices for PC\n");
        return(1);
    }
    for (i = 0; i < nbds; i++) {
        bds[i] = boot_device2nibble(boot_device[i]);
        if (bds[i] == 0) {
            term_printf("Invalid boot device for PC: '%c'\n",
                    boot_device[i]);
            return(1);
        }
    }
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
    rtc_set_memory(s, 0x38, (bds[2] << 4));
    return(0);
}
bellard authored
230
/* hd_table must contain 4 block drivers */
231
232
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                      const char *boot_device, BlockDriverState **hd_table)
233
{
bellard authored
234
    RTCState *s = rtc_state;
235
    int nbds, bds[3] = { 0, };
236
    int val;
bellard authored
237
    int fd0, fd1, nb;
bellard authored
238
    int i;
bellard authored
239
240

    /* various important CMOS locations needed by PC/Bochs bios */
241
242

    /* memory size */
bellard authored
243
244
245
246
    val = 640; /* base memory in K */
    rtc_set_memory(s, 0x15, val);
    rtc_set_memory(s, 0x16, val >> 8);
247
248
249
    val = (ram_size / 1024) - 1024;
    if (val > 65535)
        val = 65535;
bellard authored
250
251
252
253
    rtc_set_memory(s, 0x17, val);
    rtc_set_memory(s, 0x18, val >> 8);
    rtc_set_memory(s, 0x30, val);
    rtc_set_memory(s, 0x31, val >> 8);
254
255
256
257
258
259
260
    if (above_4g_mem_size) {
        rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
        rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
        rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
    }
bellard authored
261
262
263
264
    if (ram_size > (16 * 1024 * 1024))
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
    else
        val = 0;
265
266
    if (val > 65535)
        val = 65535;
bellard authored
267
268
    rtc_set_memory(s, 0x34, val);
    rtc_set_memory(s, 0x35, val >> 8);
269
270
271
272
    /* set the number of CPU */
    rtc_set_memory(s, 0x5f, smp_cpus - 1);
273
    /* set boot devices, and disable floppy signature check if requested */
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
#define PC_MAX_BOOT_DEVICES 3
    nbds = strlen(boot_device);
    if (nbds > PC_MAX_BOOT_DEVICES) {
        fprintf(stderr, "Too many boot devices for PC\n");
        exit(1);
    }
    for (i = 0; i < nbds; i++) {
        bds[i] = boot_device2nibble(boot_device[i]);
        if (bds[i] == 0) {
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
                    boot_device[i]);
            exit(1);
        }
    }
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
290
bellard authored
291
292
    /* floppy type */
293
294
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
295
296
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
bellard authored
297
    rtc_set_memory(s, 0x10, val);
298
bellard authored
299
    val = 0;
bellard authored
300
    nb = 0;
301
302
303
304
305
306
307
308
    if (fd0 < 3)
        nb++;
    if (fd1 < 3)
        nb++;
    switch (nb) {
    case 0:
        break;
    case 1:
bellard authored
309
        val |= 0x01; /* 1 drive, ready for boot */
310
311
        break;
    case 2:
bellard authored
312
        val |= 0x41; /* 2 drives, ready for boot */
313
314
        break;
    }
bellard authored
315
316
317
318
    val |= 0x02; /* FPU is there */
    val |= 0x04; /* PS/2 mouse installed */
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
bellard authored
319
320
321
322
323
    /* hard drives */

    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
    if (hd_table[0])
        cmos_init_hd(0x19, 0x1b, hd_table[0]);
324
    if (hd_table[1])
bellard authored
325
326
327
        cmos_init_hd(0x1a, 0x24, hd_table[1]);

    val = 0;
328
    for (i = 0; i < 4; i++) {
bellard authored
329
        if (hd_table[i]) {
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
            int cylinders, heads, sectors, translation;
            /* NOTE: bdrv_get_geometry_hint() returns the physical
                geometry.  It is always such that: 1 <= sects <= 63, 1
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
                geometry can be different if a translation is done. */
            translation = bdrv_get_translation_hint(hd_table[i]);
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
                bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
                    /* No translation. */
                    translation = 0;
                } else {
                    /* LBA translation. */
                    translation = 1;
                }
345
            } else {
346
                translation--;
bellard authored
347
348
349
            }
            val |= translation << (i * 2);
        }
350
    }
bellard authored
351
    rtc_set_memory(s, 0x39, val);
352
353
}
354
355
356
357
358
359
360
361
362
363
364
void ioport_set_a20(int enable)
{
    /* XXX: send to all CPUs ? */
    cpu_x86_set_a20(first_cpu, enable);
}

int ioport_get_a20(void)
{
    return ((first_cpu->a20_mask >> 20) & 1);
}
bellard authored
365
366
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
{
367
    ioport_set_a20((val >> 1) & 1);
bellard authored
368
369
370
371
372
    /* XXX: bit 0 is fast reset */
}

static uint32_t ioport92_read(void *opaque, uint32_t addr)
{
373
    return ioport_get_a20() << 1;
bellard authored
374
375
}
376
377
378
/***********************************************************/
/* Bochs BIOS debug ports */
379
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
380
{
381
382
    static const char shutdown_str[8] = "Shutdown";
    static int shutdown_index = 0;
383
384
385
386
387
388
389
390
391
392
393
394
395
    switch(addr) {
        /* Bochs BIOS messages */
    case 0x400:
    case 0x401:
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
        exit(1);
    case 0x402:
    case 0x403:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;
396
397
398
399
400
401
402
403
404
405
406
407
    case 0x8900:
        /* same as Bochs power off */
        if (val == shutdown_str[shutdown_index]) {
            shutdown_index++;
            if (shutdown_index == 8) {
                shutdown_index = 0;
                qemu_system_shutdown_request();
            }
        } else {
            shutdown_index = 0;
        }
        break;
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422

        /* LGPL'ed VGA BIOS messages */
    case 0x501:
    case 0x502:
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
        exit(1);
    case 0x500:
    case 0x503:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;
    }
}
423
static void bochs_bios_init(void)
424
{
425
426
    void *fw_cfg;
bellard authored
427
428
429
430
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
431
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
bellard authored
432
433
434
435
436

    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
437
438
439

    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
440
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
441
442
}
443
444
/* Generate an initial boot sector which sets state and jump to
   a specified vector */
445
446
static void generate_bootsect(uint8_t *option_rom,
                              uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
447
{
448
449
    uint8_t rom[512], *p, *reloc;
    uint8_t sum;
450
451
    int i;
452
453
454
455
456
457
    memset(rom, 0, sizeof(rom));

    p = rom;
    /* Make sure we have an option rom signature */
    *p++ = 0x55;
    *p++ = 0xaa;
458
459
460
    /* ROM size in sectors*/
    *p++ = 1;
461
462
    /* Hook int19 */
463
464
465
466
467
    *p++ = 0x50;		/* push ax */
    *p++ = 0x1e;		/* push ds */
    *p++ = 0x31; *p++ = 0xc0;	/* xor ax, ax */
    *p++ = 0x8e; *p++ = 0xd8;	/* mov ax, ds */
468
469
470
471
472
473
474
475
476
477
478
479
480
    *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
    *p++ = 0x64; *p++ = 0x00;
    reloc = p;
    *p++ = 0x00; *p++ = 0x00;

    *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
    *p++ = 0x66; *p++ = 0x00;

    *p++ = 0x1f;		/* pop ds */
    *p++ = 0x58;		/* pop ax */
    *p++ = 0xcb;		/* lret */
481
    /* Actual code */
482
483
    *reloc = (p - rom);
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
    *p++ = 0xfa;		/* CLI */
    *p++ = 0xfc;		/* CLD */

    for (i = 0; i < 6; i++) {
	if (i == 1)		/* Skip CS */
	    continue;

	*p++ = 0xb8;		/* MOV AX,imm16 */
	*p++ = segs[i];
	*p++ = segs[i] >> 8;
	*p++ = 0x8e;		/* MOV <seg>,AX */
	*p++ = 0xc0 + (i << 3);
    }

    for (i = 0; i < 8; i++) {
	*p++ = 0x66;		/* 32-bit operand size */
	*p++ = 0xb8 + i;	/* MOV <reg>,imm32 */
	*p++ = gpr[i];
	*p++ = gpr[i] >> 8;
	*p++ = gpr[i] >> 16;
	*p++ = gpr[i] >> 24;
    }

    *p++ = 0xea;		/* JMP FAR */
    *p++ = ip;			/* IP */
    *p++ = ip >> 8;
    *p++ = segs[1];		/* CS */
    *p++ = segs[1] >> 8;
513
514
515
516
517
518
519
    /* sign rom */
    sum = 0;
    for (i = 0; i < (sizeof(rom) - 1); i++)
        sum += rom[i];
    rom[sizeof(rom) - 1] = -sum;

    memcpy(option_rom, rom, sizeof(rom));
520
}
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
static long get_file_size(FILE *f)
{
    long where, size;

    /* XXX: on Unix systems, using fstat() probably makes more sense */

    where = ftell(f);
    fseek(f, 0, SEEK_END);
    size = ftell(f);
    fseek(f, where, SEEK_SET);

    return size;
}
536
537
static void load_linux(uint8_t *option_rom,
                       const char *kernel_filename,
538
539
540
541
542
543
544
545
546
547
		       const char *initrd_filename,
		       const char *kernel_cmdline)
{
    uint16_t protocol;
    uint32_t gpr[8];
    uint16_t seg[6];
    uint16_t real_seg;
    int setup_size, kernel_size, initrd_size, cmdline_size;
    uint32_t initrd_max;
    uint8_t header[1024];
548
    target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
    FILE *f, *fi;

    /* Align to 16 bytes as a paranoia measure */
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;

    /* load the kernel header */
    f = fopen(kernel_filename, "rb");
    if (!f || !(kernel_size = get_file_size(f)) ||
	fread(header, 1, 1024, f) != 1024) {
	fprintf(stderr, "qemu: could not load kernel '%s'\n",
		kernel_filename);
	exit(1);
    }

    /* kernel protocol version */
bellard authored
564
#if 0
565
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
bellard authored
566
#endif
567
568
569
570
571
572
573
    if (ldl_p(header+0x202) == 0x53726448)
	protocol = lduw_p(header+0x206);
    else
	protocol = 0;

    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
	/* Low kernel */
574
575
576
	real_addr    = 0x90000;
	cmdline_addr = 0x9a000 - cmdline_size;
	prot_addr    = 0x10000;
577
578
    } else if (protocol < 0x202) {
	/* High but ancient kernel */
579
580
581
	real_addr    = 0x90000;
	cmdline_addr = 0x9a000 - cmdline_size;
	prot_addr    = 0x100000;
582
583
    } else {
	/* High and recent kernel */
584
585
586
	real_addr    = 0x10000;
	cmdline_addr = 0x20000;
	prot_addr    = 0x100000;
587
588
    }
bellard authored
589
#if 0
590
    fprintf(stderr,
591
592
593
	    "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
	    "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
	    "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
594
595
596
	    real_addr,
	    cmdline_addr,
	    prot_addr);
bellard authored
597
#endif
598
599
600
601
602
603
604
605
606
607
608

    /* highest address for loading the initrd */
    if (protocol >= 0x203)
	initrd_max = ldl_p(header+0x22c);
    else
	initrd_max = 0x37ffffff;

    if (initrd_max >= ram_size-ACPI_DATA_SIZE)
	initrd_max = ram_size-ACPI_DATA_SIZE-1;

    /* kernel command line */
609
    pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
610
611

    if (protocol >= 0x202) {
612
	stl_p(header+0x228, cmdline_addr);
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
    } else {
	stw_p(header+0x20, 0xA33F);
	stw_p(header+0x22, cmdline_addr-real_addr);
    }

    /* loader type */
    /* High nybble = B reserved for Qemu; low nybble is revision number.
       If this code is substantially changed, you may want to consider
       incrementing the revision. */
    if (protocol >= 0x200)
	header[0x210] = 0xB0;

    /* heap */
    if (protocol >= 0x201) {
	header[0x211] |= 0x80;	/* CAN_USE_HEAP */
	stw_p(header+0x224, cmdline_addr-real_addr-0x200);
    }

    /* load initrd */
    if (initrd_filename) {
	if (protocol < 0x200) {
	    fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
	    exit(1);
	}

	fi = fopen(initrd_filename, "rb");
	if (!fi) {
	    fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
		    initrd_filename);
	    exit(1);
	}

	initrd_size = get_file_size(fi);
646
	initrd_addr = (initrd_max-initrd_size) & ~4095;
647
648
649
        fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
                "\n", initrd_size, initrd_addr);
650
651
	if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
652
653
654
655
656
657
	    fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
		    initrd_filename);
	    exit(1);
	}
	fclose(fi);
658
	stl_p(header+0x218, initrd_addr);
659
660
661
662
	stl_p(header+0x21c, initrd_size);
    }

    /* store the finalized header and load the rest of the kernel */
663
    cpu_physical_memory_write(real_addr, header, 1024);
664
665
666
667
668
669
670
671

    setup_size = header[0x1f1];
    if (setup_size == 0)
	setup_size = 4;

    setup_size = (setup_size+1)*512;
    kernel_size -= setup_size;	/* Size of protected-mode code */
672
673
    if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
	!fread_targphys_ok(prot_addr, kernel_size, f)) {
674
675
676
677
678
679
680
	fprintf(stderr, "qemu: read error on kernel '%s'\n",
		kernel_filename);
	exit(1);
    }
    fclose(f);

    /* generate bootsector to set up the initial register state */
681
    real_seg = real_addr >> 4;
682
683
684
685
686
    seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
    seg[1] = real_seg+0x20;	/* CS */
    memset(gpr, 0, sizeof gpr);
    gpr[4] = cmdline_addr-real_addr-16;	/* SP (-16 is paranoia) */
687
    generate_bootsect(option_rom, gpr, seg, 0);
688
689
}
690
691
692
693
694
695
static void main_cpu_reset(void *opaque)
{
    CPUState *env = opaque;
    cpu_reset(env);
}
bellard authored
696
697
698
699
700
701
static const int ide_iobase[2] = { 0x1f0, 0x170 };
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
static const int ide_irq[2] = { 14, 15 };

#define NE2000_NB_MAX 6
702
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
bellard authored
703
704
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
705
706
707
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
708
709
710
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
711
#ifdef HAS_AUDIO
pbrook authored
712
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
{
    struct soundhw *c;
    int audio_enabled = 0;

    for (c = soundhw; !audio_enabled && c->name; ++c) {
        audio_enabled = c->enabled;
    }

    if (audio_enabled) {
        AudioState *s;

        s = AUD_init ();
        if (s) {
            for (c = soundhw; c->name; ++c) {
                if (c->enabled) {
                    if (c->isa) {
pbrook authored
729
                        c->init.init_isa (s, pic);
730
731
732
733
734
735
736
737
738
739
740
741
742
                    }
                    else {
                        if (pci_bus) {
                            c->init.init_pci (pci_bus, s);
                        }
                    }
                }
            }
        }
    }
}
#endif
pbrook authored
743
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
744
745
746
747
748
{
    static int nb_ne2k = 0;

    if (nb_ne2k == NE2000_NB_MAX)
        return;
pbrook authored
749
    isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
750
751
752
    nb_ne2k++;
}
753
/* PC hardware initialisation */
754
static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
755
                     const char *boot_device,
bellard authored
756
                     const char *kernel_filename, const char *kernel_cmdline,
757
                     const char *initrd_filename,
758
                     int pci_enabled, const char *cpu_model)
759
760
{
    char buf[1024];
761
    int ret, linux_boot, i;
bellard authored
762
    ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
763
    ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
bellard authored
764
    int bios_size, isa_bios_size, vga_bios_size;
bellard authored
765
    PCIBus *pci_bus;
pbrook authored
766
    int piix3_devfn = -1;
767
    CPUState *env;
pbrook authored
768
769
    qemu_irq *cpu_irq;
    qemu_irq *i8259;
770
771
772
    int index;
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    BlockDriverState *fd[MAX_FD];
773
774
775
776
777
778
779
780
    if (ram_size >= 0xe0000000 ) {
        above_4g_mem_size = ram_size - 0xe0000000;
        below_4g_mem_size = 0xe0000000;
    } else {
        below_4g_mem_size = ram_size;
    }
781
782
    linux_boot = (kernel_filename != NULL);
783
    /* init CPUs */
784
785
786
787
788
789
790
791
    if (cpu_model == NULL) {
#ifdef TARGET_X86_64
        cpu_model = "qemu64";
#else
        cpu_model = "qemu32";
#endif
    }
792
    for(i = 0; i < smp_cpus; i++) {
793
794
795
796
797
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find x86 CPU definition\n");
            exit(1);
        }
798
        if (i != 0)
799
            env->halted = 1;
800
801
802
803
804
805
806
807
808
809
        if (smp_cpus > 1) {
            /* XXX: enable it in all cases */
            env->cpuid_features |= CPUID_APIC;
        }
        qemu_register_reset(main_cpu_reset, env);
        if (pci_enabled) {
            apic_init(env);
        }
    }
aurel32 authored
810
811
    vmport_init();
812
    /* allocate RAM */
813
814
815
816
817
818
819
820
821
822
823
824
    ram_addr = qemu_ram_alloc(0xa0000);
    cpu_register_physical_memory(0, 0xa0000, ram_addr);

    /* Allocate, even though we won't register, so we don't break the
     * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
     * and some bios areas, which will be registered later
     */
    ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
    ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
    cpu_register_physical_memory(0x100000,
                 below_4g_mem_size - 0x100000,
                 ram_addr);
825
826
827

    /* above 4giga memory allocation */
    if (above_4g_mem_size > 0) {
828
829
        ram_addr = qemu_ram_alloc(above_4g_mem_size);
        cpu_register_physical_memory(0x100000000ULL,
830
                                     above_4g_mem_size,
831
                                     ram_addr);
832
    }
833
834
bellard authored
835
836
    /* allocate VGA RAM */
    vga_ram_addr = qemu_ram_alloc(vga_ram_size);
bellard authored
837
bellard authored
838
    /* BIOS load */
839
840
841
    if (bios_name == NULL)
        bios_name = BIOS_FILENAME;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bellard authored
842
    bios_size = get_image_size(buf);
843
    if (bios_size <= 0 ||
bellard authored
844
        (bios_size % 65536) != 0) {
bellard authored
845
846
        goto bios_error;
    }
bellard authored
847
    bios_offset = qemu_ram_alloc(bios_size);
bellard authored
848
849
850
    ret = load_image(buf, phys_ram_base + bios_offset);
    if (ret != bios_size) {
    bios_error:
bellard authored
851
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
852
853
        exit(1);
    }
bellard authored
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
    if (cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled) {
        /* VGA BIOS load */
        if (cirrus_vga_enabled) {
            snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
        } else {
            snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
        }
        vga_bios_size = get_image_size(buf);
        if (vga_bios_size <= 0 || vga_bios_size > 65536)
            goto vga_bios_error;
        vga_bios_offset = qemu_ram_alloc(65536);

        ret = load_image(buf, phys_ram_base + vga_bios_offset);
        if (ret != vga_bios_size) {
vga_bios_error:
            fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
            exit(1);
        }
bellard authored
873
874
875
876
877
        /* setup basic memory access */
        cpu_register_physical_memory(0xc0000, 0x10000,
                                     vga_bios_offset | IO_MEM_ROM);
    }
bellard authored
878
879
880
881
882

    /* map the last 128KB of the BIOS in ISA space */
    isa_bios_size = bios_size;
    if (isa_bios_size > (128 * 1024))
        isa_bios_size = 128 * 1024;
883
884
    cpu_register_physical_memory(0x100000 - isa_bios_size,
                                 isa_bios_size,
bellard authored
885
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
886
bellard authored
887
888
889
890
891
    {
        ram_addr_t option_rom_offset;
        int size, offset;

        offset = 0;
892
893
894
895
896
897
898
899
900
        if (linux_boot) {
            option_rom_offset = qemu_ram_alloc(TARGET_PAGE_SIZE);
            load_linux(phys_ram_base + option_rom_offset,
                       kernel_filename, initrd_filename, kernel_cmdline);
            cpu_register_physical_memory(0xd0000, TARGET_PAGE_SIZE,
                                         option_rom_offset | IO_MEM_ROM);
            offset = TARGET_PAGE_SIZE;
        }
bellard authored
901
902
903
        for (i = 0; i < nb_option_roms; i++) {
            size = get_image_size(option_rom[i]);
            if (size < 0) {
904
                fprintf(stderr, "Could not load option rom '%s'\n",
bellard authored
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
                        option_rom[i]);
                exit(1);
            }
            if (size > (0x10000 - offset))
                goto option_rom_error;
            option_rom_offset = qemu_ram_alloc(size);
            ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
            if (ret != size) {
            option_rom_error:
                fprintf(stderr, "Too many option ROMS\n");
                exit(1);
            }
            size = (size + 4095) & ~4095;
            cpu_register_physical_memory(0xd0000 + offset,
                                         size, option_rom_offset | IO_MEM_ROM);
            offset += size;
        }
922
923
    }
bellard authored
924
    /* map all the bios at the top of memory */
925
    cpu_register_physical_memory((uint32_t)(-bios_size),
bellard authored
926
                                 bios_size, bios_offset | IO_MEM_ROM);
927
928
929
    bochs_bios_init();
930
    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
pbrook authored
931
932
933
    i8259 = i8259_init(cpu_irq[0]);
    ferr_irq = i8259[13];
bellard authored
934
    if (pci_enabled) {
pbrook authored
935
        pci_bus = i440fx_init(&i440fx_state, i8259);
936
        piix3_devfn = piix3_init(pci_bus, -1);
bellard authored
937
938
    } else {
        pci_bus = NULL;
bellard authored
939
940
    }
941
    /* init basic PC hardware */
bellard authored
942
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
943
944
945
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
bellard authored
946
947
    if (cirrus_vga_enabled) {
        if (pci_enabled) {
948
            pci_cirrus_vga_init(pci_bus,
949
                                phys_ram_base + vga_ram_addr,
bellard authored
950
                                vga_ram_addr, vga_ram_size);
bellard authored
951
        } else {
952
            isa_cirrus_vga_init(phys_ram_base + vga_ram_addr,
bellard authored
953
                                vga_ram_addr, vga_ram_size);
bellard authored
954
        }
955
956
    } else if (vmsvga_enabled) {
        if (pci_enabled)
957
            pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_addr,
958
                            vga_ram_addr, vga_ram_size);
959
960
        else
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
961
    } else if (std_vga_enabled) {
bellard authored
962
        if (pci_enabled) {
963
            pci_vga_init(pci_bus, phys_ram_base + vga_ram_addr,
bellard authored
964
                         vga_ram_addr, vga_ram_size, 0, 0);
bellard authored
965
        } else {
966
            isa_vga_init(phys_ram_base + vga_ram_addr,
bellard authored
967
                         vga_ram_addr, vga_ram_size);
bellard authored
968
        }
bellard authored
969
    }
970
971
    rtc_state = rtc_init(0x70, i8259[8], 2000);
972
973
974
    qemu_register_boot_set(pc_boot_set, rtc_state);
bellard authored
975
976
977
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
978
979
980
    if (pci_enabled) {
        ioapic = ioapic_init();
    }
pbrook authored
981
    pit = pit_init(0x40, i8259[0]);
982
    pcspk_init(pit);
983
984
985
    if (!no_hpet) {
        hpet_init(i8259);
    }
986
987
988
    if (pci_enabled) {
        pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
    }
bellard authored
989
990
991
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
        if (serial_hds[i]) {
992
993
            serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
                        serial_hds[i]);
994
995
        }
    }
bellard authored
996
997
998
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
        if (parallel_hds[i]) {
pbrook authored
999
1000
            parallel_init(parallel_io[i], i8259[parallel_irq[i]],
                          parallel_hds[i]);
1001
1002
1003
        }
    }
1004
    for(i = 0; i < nb_nics; i++) {
1005
1006
1007
        NICInfo *nd = &nd_table[i];

        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
pbrook authored
1008
            pc_init_ne2k_isa(nd, i8259);
1009
1010
        else
            pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
1011
    }
bellard authored
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
	if (index != -1)
	    hd[i] = drives_table[index].bdrv;
	else
	    hd[i] = NULL;
    }
1026
    if (pci_enabled) {
1027
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1028
    } else {
1029
        for(i = 0; i < MAX_IDE_BUS; i++) {
pbrook authored
1030
            isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1031
	                 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
bellard authored
1032
        }
bellard authored
1033
    }
bellard authored
1034
pbrook authored
1035
    i8042_init(i8259[1], i8259[12], 0x60);
bellard authored
1036
    DMA_init(0);
1037
#ifdef HAS_AUDIO
pbrook authored
1038
    audio_init(pci_enabled ? pci_bus : NULL, i8259);
1039
#endif
1040
1041
1042
1043
1044
1045
1046
1047
1048
    for(i = 0; i < MAX_FD; i++) {
        index = drive_get_index(IF_FLOPPY, 0, i);
	if (index != -1)
	    fd[i] = drives_table[index].bdrv;
	else
	    fd[i] = NULL;
    }
    floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
bellard authored
1049
1050
    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
bellard authored
1051
bellard authored
1052
    if (pci_enabled && usb_enabled) {
1053
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
bellard authored
1054
1055
    }
bellard authored
1056
    if (pci_enabled && acpi_enabled) {
1057
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
pbrook authored
1058
1059
1060
        i2c_bus *smbus;

        /* TODO: Populate SPD eeprom data.  */
aurel32 authored
1061
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1062
        for (i = 0; i < 8; i++) {
pbrook authored
1063
            smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1064
        }
bellard authored
1065
    }
1066
bellard authored
1067
1068
1069
    if (i440fx_state) {
        i440fx_init_memory_mappings(i440fx_state);
    }
1070
pbrook authored
1071
    if (pci_enabled) {
1072
1073
	int max_bus;
        int bus, unit;
pbrook authored
1074
        void *scsi;
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
        max_bus = drive_get_max_bus(IF_SCSI);

	for (bus = 0; bus <= max_bus; bus++) {
            scsi = lsi_scsi_init(pci_bus, -1);
            for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
	        index = drive_get_index(IF_SCSI, bus, unit);
		if (index == -1)
		    continue;
		lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
	    }
        }
pbrook authored
1087
    }
aliguori authored
1088
1089
1090
1091
1092
1093
1094

    /* Add virtio block devices */
    if (pci_enabled) {
        int index;
        int unit_id = 0;

        while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1095
            virtio_blk_init(pci_bus, drives_table[index].bdrv);
aliguori authored
1096
1097
1098
            unit_id++;
        }
    }
aliguori authored
1099
1100
1101
1102

    /* Add virtio balloon device */
    if (pci_enabled)
        virtio_balloon_init(pci_bus);
1103
1104
1105
1106
1107
1108
1109
1110

    /* Add virtio console devices */
    if (pci_enabled) {
        for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
            if (virtcon_hds[i])
                virtio_console_init(pci_bus, virtcon_hds[i]);
        }
    }
1111
}
bellard authored
1112
1113
static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1114
                        const char *boot_device,
1115
                        const char *kernel_filename,
1116
                        const char *kernel_cmdline,
1117
1118
                        const char *initrd_filename,
                        const char *cpu_model)
1119
{
1120
    pc_init1(ram_size, vga_ram_size, boot_device,
1121
             kernel_filename, kernel_cmdline,
1122
             initrd_filename, 1, cpu_model);
1123
1124
}
1125
static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1126
                        const char *boot_device,
1127
                        const char *kernel_filename,
1128
                        const char *kernel_cmdline,
1129
1130
                        const char *initrd_filename,
                        const char *cpu_model)
1131
{
1132
    pc_init1(ram_size, vga_ram_size, boot_device,
1133
             kernel_filename, kernel_cmdline,
1134
             initrd_filename, 0, cpu_model);
1135
1136
}
1137
1138
1139
1140
1141
1142
1143
1144
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
   BIOS will read it and start S3 resume at POST Entry */
void cmos_set_s3_resume(void)
{
    if (rtc_state)
        rtc_set_memory(rtc_state, 0xF, 0xFE);
}
bellard authored
1145
QEMUMachine pc_machine = {
aurel32 authored
1146
1147
1148
1149
    .name = "pc",
    .desc = "Standard PC",
    .init = pc_init_pci,
    .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1150
    .max_cpus = 255,
1151
1152
1153
};

QEMUMachine isapc_machine = {
aurel32 authored
1154
1155
1156
1157
    .name = "isapc",
    .desc = "ISA-only PC",
    .init = pc_init_isa,
    .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1158
    .max_cpus = 1,
bellard authored
1159
};