• Patch 5/7
    
    This patch changes the graphical_console_init function to return an
    allocated DisplayState instead of a QEMUConsole.
    
    This patch contains just the graphical_console_init change and few other
    modifications mainly in console.c and vl.c.
    It was necessary to move the display frontends (e.g. sdl and vnc)
    initialization after machine->init in vl.c.
    
    This patch does *not* include any required changes to any device, these
    changes come with the following patches.
    
    Patch 6/7
    
    This patch changes the QEMUMachine init functions not to take a
    DisplayState as an argument because is not needed any more;
    
    In few places the graphic hardware initialization function was called
    only if DisplayState was not NULL, now they are always called.
    Apart from these cases, the rest are all mechanical substitutions.
    
    Patch 7/7
    
    This patch updates the graphic device code to use the new
    graphical_console_init function.
    
    As for the previous patch, in few places graphical_console_init was called
    only if DisplayState was not NULL, now it is always called.
    Apart from these cases, the rest are all mechanical substitutions.
    
    Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
    Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
    
    
    
    git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6344 c046a42c-6fe2-441c-8c8c-71466251a162
    aliguori authored
     
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  • The current DMA routines are driven by a call in main_loop_wait() after every
    select.
    
    This patch converts the DMA code to be driven by a constantly rescheduled
    bottom half.  The advantage of using a scheduled bottom half is that we can
    stop scheduling the bottom half when there no DMA channels are runnable.  This
    means we can potentially detect this case and sleep longer in the main loop.
    
    The only two architectures implementing DMA_run() are cris and i386.  For cris,
    I converted it to a simple repeating bottom half.  I've only compile tested
    this as cris does not seem to work on a 64-bit host.  It should be functionally
    identical to the previous implementation so I expect it to work.
    
    For x86, I've made sure to only fire the DMA bottom half if there is a DMA
    channel that is runnable.  The effect of this is that unless you're using sb16
    or a floppy disk, the DMA bottom half never fires.
    
    You probably should test this malc.  My own benchmarks actually show slight
    improvement by it's possible the change in timing could affect your demos.
    
    Since v1, I've changed the code to use a BH instead of a timer.  cris at least
    seems to depend on faster than 10ms polling.
    
    Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
    
    
    
    git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5573 c046a42c-6fe2-441c-8c8c-71466251a162
    aliguori authored
     
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