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- use pitc,aic and dbgu shared modules, - replace home made pio IP block with at91_pio - add tc, and reset controller: - reset from redboot not working - fix usage of tc device in at91sam9263 emulation - use emac code in at91sam9
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add offset reduction for emac read/write function, so now it works with at91sam9
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- access to register not working - acess to rc return rb register - emulate TC usage for fast delay
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- PIT not stops immediately, to emulate hardware set CPIV to right value, when user stop PIT - zero PICNT part of register after read from PIVR register
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- read from some of pmc registers return 0, but it not should work in so way, because of for example linux kernel expect proper values there, and 0 cause divide by zero exception - convert main oscilator freq from constant to device property
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revert back after rebase
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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i) in function gen_bx_im, the last line (should be line 695 in your git HEAD) should be "tcg_gen_movi_i32..." instead of "tcg_gen_mov_i32". Otherwise BX/BLX immediate instructions will segfault QEMU. ii) you have a resource leak in disas_vfp_insn; on line 3129 in your git HEAD, you have allocated a new temporary (addr) but if the if-expression on line 3129 is true, it will not be released - I fixed this by adding a "dead_tmp(addr);" line between lines 3141 and 3142 (i.e. the last line of the if-block). iii) you have another resource issue in disas_thumb_insn; line 8306 should read "if (op != 0xf) dead_tmp(tmp);" instead of just plain "dead_tmp(tmp);" -- this is because in the above code the temporary variable tmp is not initialized if op==0xf and calling dead_tmp on it will cause problems. Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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The old code resulted in wrong escape sequences: #define CONFIG_QEMU_SHAREDIR "c:\Program Files\Qemu" gcc warnings: vl.c:5708:20: warning: unknown escape sequence '\P' vl.c:5708:20: warning: unknown escape sequence '\Q' Windows can handle slash (/) path separators, and QEMU already adds directories using slash, so there is no need to fight with the correct number of backslashes. Signed-off-by: Stefan Weil <weil@mail.berlios.de>
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- Change long/unsigned long to intptr_t/uintptr_t where needed - Use PRIuPTR instead of %zu for printf - Rework parsing of UUIDs - Add support for Win64 ABI to TCG
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Add support for constant propagation to TCG. This has to be paired with the liveness analysis to remove the dead code. Not all possible operations are covered, but the most common ones are. This improves the code generation for several ARM instructions, like MVN (immediate), and it may help other targets as well. v1 -> v2: Added profiling code and hopefully fixed for 64-bit TCG targets. v2 -> v3: Another attempt at fixing the support for 64-bit TCG targets. Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Since no target uses ICOUNT_TEMP anymore there's no reason to keep it. Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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The goal is eventually to get rid of all cpu_T register usage and to use just short-lived tmp/tmp2 registers. This patch converts all the places where cpu_T was used in the Thumb code and replaces it with explicit TCG register allocation. Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Uninitialized register was used instead of proper TCG variable. Signed-off-by: Filip Navara <filip.navara@gmail.com>
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The neon_trn_u8, neon_trn_u16, neon_unzip_u8, neon_zip_u8 and neon_zip_u16 helpers used fixed registers to return values. This patch replaces that with TCG code, so T0/T1 is no longer directly used by the helper functions. Bugs in the gen_neon_unzip register load code were also fixed. Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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The encoding of 'IA' and 'DB' conditions was swapped. SRS instruction must store banked SPSR instead of CPSR at the specific address. Missing 'return' statement at the end of RFE handling. Fixed write-back code to reference correct registers. From: Hyeonsung Jang <hsjang@ok-labs.com> Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>
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Signed-off-by: Filip Navara <filip.navara@gmail.com>