Get rid of AREG1 and AREG2.

Signed-off-by: Filip Navara <filip.navara@gmail.com>

Get rid of AREG1 and AREG2.
Signed-off-by: Filip Navara <filip.navara@gmail.com>
Filip Navara
1 parent 72ffa017
Showing 10 changed files with 0 additions and 56 deletions
dyngen-exec.h
hostregs_helper.h
target-m68k/exec.h
tcg/arm/tcg-target.h
tcg/hppa/tcg-target.h
tcg/i386/tcg-target.h
tcg/ppc/tcg-target.h
tcg/ppc64/tcg-target.h
tcg/sparc/tcg-target.h
tcg/x86_64/tcg-target.h
@@ -52,62 +52,36 @@ extern int printf(const char *, ...);
  
 #if defined(__i386__)
 #define AREG0 "ebp"
-#define AREG1 "ebx"
-#define AREG2 "esi"
 #elif defined(__x86_64__)
 #define AREG0 "r14"
-#define AREG1 "r15"
-#define AREG2 "r12"
 #elif defined(_ARCH_PPC)
 #define AREG0 "r27"
-#define AREG1 "r24"
-#define AREG2 "r25"
 #elif defined(__arm__)
 #define AREG0 "r7"
-#define AREG1 "r4"
-#define AREG2 "r5"
 #elif defined(__hppa__)
 #define AREG0 "r17"
-#define AREG1 "r14"
-#define AREG2 "r15"
 #elif defined(__mips__)
 #define AREG0 "fp"
-#define AREG1 "s0"
-#define AREG2 "s1"
 #elif defined(__sparc__)
 #ifdef CONFIG_SOLARIS
 #define AREG0 "g2"
-#define AREG1 "g3"
-#define AREG2 "g4"
 #else
 #ifdef __sparc_v9__
 #define AREG0 "g5"
-#define AREG1 "g6"
-#define AREG2 "g7"
 #else
 #define AREG0 "g6"
-#define AREG1 "g1"
-#define AREG2 "g2"
 #endif
 #endif
 #elif defined(__s390__)
 #define AREG0 "r10"
-#define AREG1 "r7"
-#define AREG2 "r8"
 #elif defined(__alpha__)
 /* Note $15 is the frame pointer, so anything in op-i386.c that would
    require a frame pointer, like alloca, would probably loose.  */
 #define AREG0 "$15"
-#define AREG1 "$9"
-#define AREG2 "$10"
 #elif defined(__mc68000)
 #define AREG0 "%a5"
-#define AREG1 "%a4"
-#define AREG2 "%d7"
 #elif defined(__ia64__)
 #define AREG0 "r7"
-#define AREG1 "r4"
-#define AREG2 "r5"
 #else
 #error unsupported CPU
 #endif
@@ -48,14 +48,6 @@
 DO_REG(0)
 #endif
  
-#ifdef AREG1
-DO_REG(1)
-#endif
-
-#ifdef AREG2
-DO_REG(2)
-#endif
-
 #undef SAVE_HOST_REGS
 #undef DECLARE_HOST_REGS
 #undef DO_REG
@@ -20,10 +20,6 @@
 #include "dyngen-exec.h"
  
 register struct CPUM68KState *env asm(AREG0);
-/* This is only used for tb lookup.  */
-register uint32_t T0 asm(AREG1);
-/* ??? We don't use T1, but common code expects it to exist  */
-#define T1 env->t1
  
 #include "cpu.h"
 #include "exec-all.h"
@@ -67,8 +67,6 @@ enum {
 enum {
     /* Note: must be synced with dyngen-exec.h */
     TCG_AREG0 = TCG_REG_R7,
-    TCG_AREG1 = TCG_REG_R4,
-    TCG_AREG2 = TCG_REG_R5,
 };
  
 static inline void flush_icache_range(unsigned long start, unsigned long stop)
@@ -82,8 +82,6 @@ enum {
  
 /* Note: must be synced with dyngen-exec.h */
 #define TCG_AREG0 TCG_REG_R17
-#define TCG_AREG1 TCG_REG_R14
-#define TCG_AREG2 TCG_REG_R15
  
 static inline void flush_icache_range(unsigned long start, unsigned long stop)
 {
@@ -57,8 +57,6 @@ enum {
  
 /* Note: must be synced with dyngen-exec.h */
 #define TCG_AREG0 TCG_REG_EBP
-#define TCG_AREG1 TCG_REG_EBX
-#define TCG_AREG2 TCG_REG_ESI
  
 static inline void flush_icache_range(unsigned long start, unsigned long stop)
 {
@@ -83,7 +83,5 @@ enum {
 #define TCG_TARGET_HAS_ext16s_i32
  
 #define TCG_AREG0 TCG_REG_R27
-#define TCG_AREG1 TCG_REG_R24
-#define TCG_AREG2 TCG_REG_R25
  
 #define TCG_TARGET_HAS_GUEST_BASE
@@ -79,7 +79,5 @@ enum {
 #define TCG_TARGET_HAS_ext32s_i64
  
 #define TCG_AREG0 TCG_REG_R27
-#define TCG_AREG1 TCG_REG_R24
-#define TCG_AREG2 TCG_REG_R25
  
 #define TCG_TARGET_HAS_GUEST_BASE
@@ -97,16 +97,10 @@ enum {
 /* Note: must be synced with dyngen-exec.h and Makefile.target */
 #ifdef CONFIG_SOLARIS
 #define TCG_AREG0 TCG_REG_G2
-#define TCG_AREG1 TCG_REG_G3
-#define TCG_AREG2 TCG_REG_G4
 #elif defined(__sparc_v9__)
 #define TCG_AREG0 TCG_REG_G5
-#define TCG_AREG1 TCG_REG_G6
-#define TCG_AREG2 TCG_REG_G7
 #else
 #define TCG_AREG0 TCG_REG_G6
-#define TCG_AREG1 TCG_REG_G1
-#define TCG_AREG2 TCG_REG_G2
 #endif
  
 static inline void flush_icache_range(unsigned long start, unsigned long stop)
@@ -77,8 +77,6 @@ enum {
  
 /* Note: must be synced with dyngen-exec.h */
 #define TCG_AREG0 TCG_REG_R14
-#define TCG_AREG1 TCG_REG_R15
-#define TCG_AREG2 TCG_REG_R12
  
 static inline void flush_icache_range(unsigned long start, unsigned long stop)
 {