Commit b854065e0795e21d30a6219fb9f1c311060ded56
1 parent
72ffa017
Get rid of AREG1 and AREG2.
Signed-off-by: Filip Navara <filip.navara@gmail.com>
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10 changed files
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0 additions
and
56 deletions
dyngen-exec.h
@@ -52,62 +52,36 @@ extern int printf(const char *, ...); | @@ -52,62 +52,36 @@ extern int printf(const char *, ...); | ||
52 | 52 | ||
53 | #if defined(__i386__) | 53 | #if defined(__i386__) |
54 | #define AREG0 "ebp" | 54 | #define AREG0 "ebp" |
55 | -#define AREG1 "ebx" | ||
56 | -#define AREG2 "esi" | ||
57 | #elif defined(__x86_64__) | 55 | #elif defined(__x86_64__) |
58 | #define AREG0 "r14" | 56 | #define AREG0 "r14" |
59 | -#define AREG1 "r15" | ||
60 | -#define AREG2 "r12" | ||
61 | #elif defined(_ARCH_PPC) | 57 | #elif defined(_ARCH_PPC) |
62 | #define AREG0 "r27" | 58 | #define AREG0 "r27" |
63 | -#define AREG1 "r24" | ||
64 | -#define AREG2 "r25" | ||
65 | #elif defined(__arm__) | 59 | #elif defined(__arm__) |
66 | #define AREG0 "r7" | 60 | #define AREG0 "r7" |
67 | -#define AREG1 "r4" | ||
68 | -#define AREG2 "r5" | ||
69 | #elif defined(__hppa__) | 61 | #elif defined(__hppa__) |
70 | #define AREG0 "r17" | 62 | #define AREG0 "r17" |
71 | -#define AREG1 "r14" | ||
72 | -#define AREG2 "r15" | ||
73 | #elif defined(__mips__) | 63 | #elif defined(__mips__) |
74 | #define AREG0 "fp" | 64 | #define AREG0 "fp" |
75 | -#define AREG1 "s0" | ||
76 | -#define AREG2 "s1" | ||
77 | #elif defined(__sparc__) | 65 | #elif defined(__sparc__) |
78 | #ifdef CONFIG_SOLARIS | 66 | #ifdef CONFIG_SOLARIS |
79 | #define AREG0 "g2" | 67 | #define AREG0 "g2" |
80 | -#define AREG1 "g3" | ||
81 | -#define AREG2 "g4" | ||
82 | #else | 68 | #else |
83 | #ifdef __sparc_v9__ | 69 | #ifdef __sparc_v9__ |
84 | #define AREG0 "g5" | 70 | #define AREG0 "g5" |
85 | -#define AREG1 "g6" | ||
86 | -#define AREG2 "g7" | ||
87 | #else | 71 | #else |
88 | #define AREG0 "g6" | 72 | #define AREG0 "g6" |
89 | -#define AREG1 "g1" | ||
90 | -#define AREG2 "g2" | ||
91 | #endif | 73 | #endif |
92 | #endif | 74 | #endif |
93 | #elif defined(__s390__) | 75 | #elif defined(__s390__) |
94 | #define AREG0 "r10" | 76 | #define AREG0 "r10" |
95 | -#define AREG1 "r7" | ||
96 | -#define AREG2 "r8" | ||
97 | #elif defined(__alpha__) | 77 | #elif defined(__alpha__) |
98 | /* Note $15 is the frame pointer, so anything in op-i386.c that would | 78 | /* Note $15 is the frame pointer, so anything in op-i386.c that would |
99 | require a frame pointer, like alloca, would probably loose. */ | 79 | require a frame pointer, like alloca, would probably loose. */ |
100 | #define AREG0 "$15" | 80 | #define AREG0 "$15" |
101 | -#define AREG1 "$9" | ||
102 | -#define AREG2 "$10" | ||
103 | #elif defined(__mc68000) | 81 | #elif defined(__mc68000) |
104 | #define AREG0 "%a5" | 82 | #define AREG0 "%a5" |
105 | -#define AREG1 "%a4" | ||
106 | -#define AREG2 "%d7" | ||
107 | #elif defined(__ia64__) | 83 | #elif defined(__ia64__) |
108 | #define AREG0 "r7" | 84 | #define AREG0 "r7" |
109 | -#define AREG1 "r4" | ||
110 | -#define AREG2 "r5" | ||
111 | #else | 85 | #else |
112 | #error unsupported CPU | 86 | #error unsupported CPU |
113 | #endif | 87 | #endif |
hostregs_helper.h
@@ -48,14 +48,6 @@ | @@ -48,14 +48,6 @@ | ||
48 | DO_REG(0) | 48 | DO_REG(0) |
49 | #endif | 49 | #endif |
50 | 50 | ||
51 | -#ifdef AREG1 | ||
52 | -DO_REG(1) | ||
53 | -#endif | ||
54 | - | ||
55 | -#ifdef AREG2 | ||
56 | -DO_REG(2) | ||
57 | -#endif | ||
58 | - | ||
59 | #undef SAVE_HOST_REGS | 51 | #undef SAVE_HOST_REGS |
60 | #undef DECLARE_HOST_REGS | 52 | #undef DECLARE_HOST_REGS |
61 | #undef DO_REG | 53 | #undef DO_REG |
target-m68k/exec.h
@@ -20,10 +20,6 @@ | @@ -20,10 +20,6 @@ | ||
20 | #include "dyngen-exec.h" | 20 | #include "dyngen-exec.h" |
21 | 21 | ||
22 | register struct CPUM68KState *env asm(AREG0); | 22 | register struct CPUM68KState *env asm(AREG0); |
23 | -/* This is only used for tb lookup. */ | ||
24 | -register uint32_t T0 asm(AREG1); | ||
25 | -/* ??? We don't use T1, but common code expects it to exist */ | ||
26 | -#define T1 env->t1 | ||
27 | 23 | ||
28 | #include "cpu.h" | 24 | #include "cpu.h" |
29 | #include "exec-all.h" | 25 | #include "exec-all.h" |
tcg/arm/tcg-target.h
@@ -67,8 +67,6 @@ enum { | @@ -67,8 +67,6 @@ enum { | ||
67 | enum { | 67 | enum { |
68 | /* Note: must be synced with dyngen-exec.h */ | 68 | /* Note: must be synced with dyngen-exec.h */ |
69 | TCG_AREG0 = TCG_REG_R7, | 69 | TCG_AREG0 = TCG_REG_R7, |
70 | - TCG_AREG1 = TCG_REG_R4, | ||
71 | - TCG_AREG2 = TCG_REG_R5, | ||
72 | }; | 70 | }; |
73 | 71 | ||
74 | static inline void flush_icache_range(unsigned long start, unsigned long stop) | 72 | static inline void flush_icache_range(unsigned long start, unsigned long stop) |
tcg/hppa/tcg-target.h
@@ -82,8 +82,6 @@ enum { | @@ -82,8 +82,6 @@ enum { | ||
82 | 82 | ||
83 | /* Note: must be synced with dyngen-exec.h */ | 83 | /* Note: must be synced with dyngen-exec.h */ |
84 | #define TCG_AREG0 TCG_REG_R17 | 84 | #define TCG_AREG0 TCG_REG_R17 |
85 | -#define TCG_AREG1 TCG_REG_R14 | ||
86 | -#define TCG_AREG2 TCG_REG_R15 | ||
87 | 85 | ||
88 | static inline void flush_icache_range(unsigned long start, unsigned long stop) | 86 | static inline void flush_icache_range(unsigned long start, unsigned long stop) |
89 | { | 87 | { |
tcg/i386/tcg-target.h
@@ -57,8 +57,6 @@ enum { | @@ -57,8 +57,6 @@ enum { | ||
57 | 57 | ||
58 | /* Note: must be synced with dyngen-exec.h */ | 58 | /* Note: must be synced with dyngen-exec.h */ |
59 | #define TCG_AREG0 TCG_REG_EBP | 59 | #define TCG_AREG0 TCG_REG_EBP |
60 | -#define TCG_AREG1 TCG_REG_EBX | ||
61 | -#define TCG_AREG2 TCG_REG_ESI | ||
62 | 60 | ||
63 | static inline void flush_icache_range(unsigned long start, unsigned long stop) | 61 | static inline void flush_icache_range(unsigned long start, unsigned long stop) |
64 | { | 62 | { |
tcg/ppc/tcg-target.h
@@ -83,7 +83,5 @@ enum { | @@ -83,7 +83,5 @@ enum { | ||
83 | #define TCG_TARGET_HAS_ext16s_i32 | 83 | #define TCG_TARGET_HAS_ext16s_i32 |
84 | 84 | ||
85 | #define TCG_AREG0 TCG_REG_R27 | 85 | #define TCG_AREG0 TCG_REG_R27 |
86 | -#define TCG_AREG1 TCG_REG_R24 | ||
87 | -#define TCG_AREG2 TCG_REG_R25 | ||
88 | 86 | ||
89 | #define TCG_TARGET_HAS_GUEST_BASE | 87 | #define TCG_TARGET_HAS_GUEST_BASE |
tcg/ppc64/tcg-target.h
@@ -79,7 +79,5 @@ enum { | @@ -79,7 +79,5 @@ enum { | ||
79 | #define TCG_TARGET_HAS_ext32s_i64 | 79 | #define TCG_TARGET_HAS_ext32s_i64 |
80 | 80 | ||
81 | #define TCG_AREG0 TCG_REG_R27 | 81 | #define TCG_AREG0 TCG_REG_R27 |
82 | -#define TCG_AREG1 TCG_REG_R24 | ||
83 | -#define TCG_AREG2 TCG_REG_R25 | ||
84 | 82 | ||
85 | #define TCG_TARGET_HAS_GUEST_BASE | 83 | #define TCG_TARGET_HAS_GUEST_BASE |
tcg/sparc/tcg-target.h
@@ -97,16 +97,10 @@ enum { | @@ -97,16 +97,10 @@ enum { | ||
97 | /* Note: must be synced with dyngen-exec.h and Makefile.target */ | 97 | /* Note: must be synced with dyngen-exec.h and Makefile.target */ |
98 | #ifdef CONFIG_SOLARIS | 98 | #ifdef CONFIG_SOLARIS |
99 | #define TCG_AREG0 TCG_REG_G2 | 99 | #define TCG_AREG0 TCG_REG_G2 |
100 | -#define TCG_AREG1 TCG_REG_G3 | ||
101 | -#define TCG_AREG2 TCG_REG_G4 | ||
102 | #elif defined(__sparc_v9__) | 100 | #elif defined(__sparc_v9__) |
103 | #define TCG_AREG0 TCG_REG_G5 | 101 | #define TCG_AREG0 TCG_REG_G5 |
104 | -#define TCG_AREG1 TCG_REG_G6 | ||
105 | -#define TCG_AREG2 TCG_REG_G7 | ||
106 | #else | 102 | #else |
107 | #define TCG_AREG0 TCG_REG_G6 | 103 | #define TCG_AREG0 TCG_REG_G6 |
108 | -#define TCG_AREG1 TCG_REG_G1 | ||
109 | -#define TCG_AREG2 TCG_REG_G2 | ||
110 | #endif | 104 | #endif |
111 | 105 | ||
112 | static inline void flush_icache_range(unsigned long start, unsigned long stop) | 106 | static inline void flush_icache_range(unsigned long start, unsigned long stop) |
tcg/x86_64/tcg-target.h
@@ -77,8 +77,6 @@ enum { | @@ -77,8 +77,6 @@ enum { | ||
77 | 77 | ||
78 | /* Note: must be synced with dyngen-exec.h */ | 78 | /* Note: must be synced with dyngen-exec.h */ |
79 | #define TCG_AREG0 TCG_REG_R14 | 79 | #define TCG_AREG0 TCG_REG_R14 |
80 | -#define TCG_AREG1 TCG_REG_R15 | ||
81 | -#define TCG_AREG2 TCG_REG_R12 | ||
82 | 80 | ||
83 | static inline void flush_icache_range(unsigned long start, unsigned long stop) | 81 | static inline void flush_icache_range(unsigned long start, unsigned long stop) |
84 | { | 82 | { |