Commit 88c1e3dbdbc9ee5b03d76f23b3816b5c127ce70f

Authored by Filip Navara
1 parent b854065e

Replace tcg_gen_rori_i32 by tcg_gen_rotri_i32.

Signed-off-by: Filip Navara <filip.navara@gmail.com>
Showing 1 changed file with 3 additions and 18 deletions
target-arm/translate.c
... ... @@ -424,21 +424,6 @@ static inline void tcg_gen_bic_i32(TCGv dest, TCGv t0, TCGv t1)
424 424 /* FIXME: Implement this natively. */
425 425 #define tcg_gen_abs_i32(t0, t1) gen_helper_abs(t0, t1)
426 426  
427   -/* FIXME: Implement this natively. */
428   -static void tcg_gen_rori_i32(TCGv t0, TCGv t1, int i)
429   -{
430   - TCGv tmp;
431   -
432   - if (i == 0)
433   - return;
434   -
435   - tmp = new_tmp();
436   - tcg_gen_shri_i32(tmp, t1, i);
437   - tcg_gen_shli_i32(t1, t1, 32 - i);
438   - tcg_gen_or_i32(t0, t1, tmp);
439   - dead_tmp(tmp);
440   -}
441   -
442 427 static void shifter_out_im(TCGv var, int shift)
443 428 {
444 429 TCGv tmp = new_tmp();
... ... @@ -490,7 +475,7 @@ static inline void gen_arm_shift_im(TCGv var, int shiftop, int shift, int flags)
490 475 if (shift != 0) {
491 476 if (flags)
492 477 shifter_out_im(var, shift - 1);
493   - tcg_gen_rori_i32(var, var, shift); break;
  478 + tcg_gen_rotri_i32(var, var, shift); break;
494 479 } else {
495 480 TCGv tmp = load_cpu_field(CF);
496 481 if (flags)
... ... @@ -6582,7 +6567,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
6582 6567 /* ??? In many cases it's not neccessary to do a
6583 6568 rotate, a shift is sufficient. */
6584 6569 if (shift != 0)
6585   - tcg_gen_rori_i32(tmp, tmp, shift * 8);
  6570 + tcg_gen_rotri_i32(tmp, tmp, shift * 8);
6586 6571 op1 = (insn >> 20) & 7;
6587 6572 switch (op1) {
6588 6573 case 0: gen_sxtb16(tmp); break;
... ... @@ -7409,7 +7394,7 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
7409 7394 /* ??? In many cases it's not neccessary to do a
7410 7395 rotate, a shift is sufficient. */
7411 7396 if (shift != 0)
7412   - tcg_gen_rori_i32(tmp, tmp, shift * 8);
  7397 + tcg_gen_rotri_i32(tmp, tmp, shift * 8);
7413 7398 op = (insn >> 20) & 7;
7414 7399 switch (op) {
7415 7400 case 0: gen_sxth(tmp); break;
... ...