gwj / at91sam9263 · Commits

Add the parameter 'order' to qemu_register_reset and sort callbacks on
registration. On system reset, callbacks with lower order will be
invoked before those with higher order. Update all existing users to the
standard order 0.

Note: At least for x86, the existing users seem to assume that handlers
are called in their registration order. Therefore, the patch preserves
this property. If someone feels bored, (s)he could try to identify this
dependency and express it properly on callback registration.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162

The Z85C30 on the PowerMAC machines have one interrupt per serial
channel, while the Sparc machines have only one for both. Allow the
emulated device to use one IRQ per channel.

Patch by Laurent Vivier.

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Swap the two CharDriverState arguments so that the first argument
corresponds to the channel A and the second argument to the channel B.

Modify hw/sun4m.c accordingly.

This fixes the order of the serial ports on the PPC machines.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

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Fix register size related bugs


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