gwj / at91sam9263 · Commits

Commit 487414f1cbd638beb0227c7da71fe7b8a821e155

Authored by aliguori
1 parent 090f1fa3

hw: remove error handling from qemu_malloc() callers (Avi Kivity) 

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 74 changed files with 257 additions and 545 deletions
hw/adlib.c
  View file @487414f
... ... @@ -331,13 +331,6 @@ int Adlib_init (AudioState *audio, qemu_irq *pic)
331 331 s->samples = AUD_get_buffer_size_out (s->voice) >> SHIFT;
332 332 s->mixbuf = qemu_mallocz (s->samples << SHIFT);
333 333  
334   - if (!s->mixbuf) {
335   - dolog ("Could not allocate mixing buffer, %d samples (each %d bytes)\n",
336   - s->samples, 1 << SHIFT);
337   - Adlib_fini (s);
338   - return -1;
339   - }
340   -
341 334 register_ioport_read (0x388, 4, 1, adlib_read, s);
342 335 register_ioport_write (0x388, 4, 1, adlib_write, s);
343 336  
... ...
hw/apic.c
  View file @487414f
... ... @@ -898,8 +898,6 @@ int apic_init(CPUState *env)
898 898 if (last_apic_id >= MAX_APICS)
899 899 return -1;
900 900 s = qemu_mallocz(sizeof(APICState));
901   - if (!s)
902   - return -1;
903 901 env->apic_state = s;
904 902 s->id = last_apic_id++;
905 903 env->cpuid_apic_id = s->id;
... ... @@ -1124,8 +1122,6 @@ IOAPICState *ioapic_init(void)
1124 1122 int io_memory;
1125 1123  
1126 1124 s = qemu_mallocz(sizeof(IOAPICState));
1127   - if (!s)
1128   - return NULL;
1129 1125 ioapic_reset(s);
1130 1126 s->id = last_apic_id++;
1131 1127  
... ...
hw/arm_gic.c
  View file @487414f
... ... @@ -725,8 +725,6 @@ static gic_state *gic_init(uint32_t dist_base, qemu_irq *parent_irq)
725 725 int i;
726 726  
727 727 s = (gic_state *)qemu_mallocz(sizeof(gic_state));
728   - if (!s)
729   - return NULL;
730 728 s->in = qemu_allocate_irqs(gic_set_irq, s, GIC_NIRQ);
731 729 for (i = 0; i < NCPU; i++) {
732 730 s->parent_irq[i] = parent_irq[i];
... ...
hw/arm_sysctl.c
  View file @487414f
... ... @@ -194,8 +194,6 @@ void arm_sysctl_init(uint32_t base, uint32_t sys_id)
194 194 int iomemtype;
195 195  
196 196 s = (arm_sysctl_state *)qemu_mallocz(sizeof(arm_sysctl_state));
197   - if (!s)
198   - return;
199 197 s->sys_id = sys_id;
200 198 /* The MPcore bootloader uses these flags to start secondary CPUs.
201 199 We don't use a bootloader, so do this here. */
... ...
hw/baum.c
  View file @487414f
... ... @@ -575,12 +575,7 @@ CharDriverState *chr_baum_init(void)
575 575 int tty;
576 576  
577 577 baum = qemu_mallocz(sizeof(BaumDriverState));
578   - if (!baum)
579   - return NULL;
580   -
581 578 baum->chr = chr = qemu_mallocz(sizeof(CharDriverState));
582   - if (!chr)
583   - goto fail_baum;
584 579  
585 580 chr->opaque = baum;
586 581 chr->chr_write = baum_write;
... ... @@ -588,8 +583,6 @@ CharDriverState *chr_baum_init(void)
588 583 chr->chr_accept_input = baum_accept_input;
589 584  
590 585 handle = qemu_mallocz(brlapi_getHandleSize());
591   - if (!handle)
592   - goto fail_chr;
593 586 baum->brlapi = handle;
594 587  
595 588 baum->brlapi_fd = brlapi__openConnection(handle, NULL, NULL);
... ... @@ -628,11 +621,8 @@ CharDriverState *chr_baum_init(void)
628 621 fail:
629 622 qemu_free_timer(baum->cellCount_timer);
630 623 brlapi__closeConnection(handle);
631   -fail_handle:
632 624 free(handle);
633   -fail_chr:
634 625 free(chr);
635   -fail_baum:
636 626 free(baum);
637 627 return NULL;
638 628 }
... ...
hw/cs4231.c
  View file @487414f
... ... @@ -171,8 +171,6 @@ void cs_init(target_phys_addr_t base, int irq, void *intctl)
171 171 CSState *s;
172 172  
173 173 s = qemu_mallocz(sizeof(CSState));
174   - if (!s)
175   - return;
176 174  
177 175 cs_io_memory = cpu_register_io_memory(0, cs_mem_read, cs_mem_write, s);
178 176 cpu_register_physical_memory(base, CS_SIZE, cs_io_memory);
... ...
hw/cs4231a.c
  View file @487414f
... ... @@ -647,11 +647,6 @@ int cs4231a_init (AudioState *audio, qemu_irq *pic)
647 647 }
648 648  
649 649 s = qemu_mallocz (sizeof (*s));
650   - if (!s) {
651   - lerr ("Could not allocate memory for cs4231a (%zu bytes)\n",
652   - sizeof (*s));
653   - return -1;
654   - }
655 650  
656 651 s->pic = pic;
657 652 s->irq = conf.irq;
... ...
hw/ds1225y.c
  View file @487414f
... ... @@ -152,13 +152,8 @@ void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
152 152 QEMUFile *file;
153 153  
154 154 s = qemu_mallocz(sizeof(ds1225y_t));
155   - if (!s)
156   - return NULL;
157 155 s->chip_size = 0x2000; /* Fixed for ds1225y chip: 8 KiB */
158 156 s->contents = qemu_mallocz(s->chip_size);
159   - if (!s->contents) {
160   - return NULL;
161   - }
162 157 s->protection = 7;
163 158  
164 159 /* Read current file */
... ...
hw/eccmemctl.c
  View file @487414f
... ... @@ -320,8 +320,6 @@ void * ecc_init(target_phys_addr_t base, qemu_irq irq, uint32_t version)
320 320 ECCState *s;
321 321  
322 322 s = qemu_mallocz(sizeof(ECCState));
323   - if (!s)
324   - return NULL;
325 323  
326 324 s->version = version;
327 325 s->regs[0] = version;
... ...
hw/escc.c
  View file @487414f
... ... @@ -727,8 +727,6 @@ int escc_init(target_phys_addr_t base, qemu_irq irqA, qemu_irq irqB,
727 727 SerialState *s;
728 728  
729 729 s = qemu_mallocz(sizeof(SerialState));
730   - if (!s)
731   - return 0;
732 730  
733 731 escc_io_memory = cpu_register_io_memory(0, escc_mem_read,
734 732 escc_mem_write,
... ... @@ -909,8 +907,6 @@ void slavio_serial_ms_kbd_init(target_phys_addr_t base, qemu_irq irq,
909 907 SerialState *s;
910 908  
911 909 s = qemu_mallocz(sizeof(SerialState));
912   - if (!s)
913   - return;
914 910  
915 911 s->it_shift = it_shift;
916 912 for (i = 0; i < 2; i++) {
... ...
hw/esp.c
  View file @487414f
... ... @@ -653,8 +653,6 @@ void *esp_init(target_phys_addr_t espaddr, int it_shift,
653 653 int esp_io_memory;
654 654  
655 655 s = qemu_mallocz(sizeof(ESPState));
656   - if (!s)
657   - return NULL;
658 656  
659 657 s->irq = irq;
660 658 s->it_shift = it_shift;
... ...
hw/etraxfs_dma.c
  View file @487414f
... ... @@ -756,22 +756,14 @@ void *etraxfs_dmac_init(CPUState *env,
756 756 struct fs_dma_ctrl *ctrl = NULL;
757 757  
758 758 ctrl = qemu_mallocz(sizeof *ctrl);
759   - if (!ctrl)
760   - return NULL;
761 759  
762 760 ctrl->bh = qemu_bh_new(DMA_run, ctrl);
763 761  
764 762 ctrl->env = env;
765 763 ctrl->nr_channels = nr_channels;
766 764 ctrl->channels = qemu_mallocz(sizeof ctrl->channels[0] * nr_channels);
767   - if (!ctrl->channels)
768   - goto err;
769 765  
770 766 ctrl->map = cpu_register_io_memory(0, dma_read, dma_write, ctrl);
771 767 cpu_register_physical_memory(base, nr_channels * 0x2000, ctrl->map);
772 768 return ctrl;
773   - err:
774   - qemu_free(ctrl->channels);
775   - qemu_free(ctrl);
776   - return NULL;
777 769 }
... ...
hw/etraxfs_eth.c
  View file @487414f
... ... @@ -564,12 +564,8 @@ void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
564 564 qemu_check_nic_model(nd, "fseth");
565 565  
566 566 dma = qemu_mallocz(sizeof *dma * 2);
567   - if (!dma)
568   - return NULL;
569 567  
570 568 eth = qemu_mallocz(sizeof *eth);
571   - if (!eth)
572   - goto err;
573 569  
574 570 dma[0].client.push = eth_tx_push;
575 571 dma[0].client.opaque = eth;
... ... @@ -595,8 +591,4 @@ void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
595 591 eth->vc->link_status_changed = eth_set_link;
596 592  
597 593 return dma;
598   - err:
599   - qemu_free(eth);
600   - qemu_free(dma);
601   - return NULL;
602 594 }
... ...
hw/etraxfs_pic.c
  View file @487414f
... ... @@ -192,8 +192,6 @@ struct etraxfs_pic *etraxfs_pic_init(CPUState *env, target_phys_addr_t base)
192 192  
193 193 pic = qemu_mallocz(sizeof *pic);
194 194 pic->internal = fs = qemu_mallocz(sizeof *fs);
195   - if (!fs || !pic)
196   - goto err;
197 195  
198 196 fs->env = env;
199 197 pic->irq = qemu_allocate_irqs(irq_handler, fs, 30);
... ... @@ -204,8 +202,4 @@ struct etraxfs_pic *etraxfs_pic_init(CPUState *env, target_phys_addr_t base)
204 202 cpu_register_physical_memory(base, 0x14, intr_vect_regs);
205 203  
206 204 return pic;
207   - err:
208   - free(pic);
209   - free(fs);
210   - return NULL;
211 205 }
... ...
hw/etraxfs_ser.c
  View file @487414f
... ... @@ -233,8 +233,6 @@ void etraxfs_ser_init(CPUState *env, qemu_irq *irq, CharDriverState *chr,
233 233 int ser_regs;
234 234  
235 235 s = qemu_mallocz(sizeof *s);
236   - if (!s)
237   - return;
238 236  
239 237 s->env = env;
240 238 s->irq = irq;
... ...
hw/etraxfs_timer.c
  View file @487414f
... ... @@ -321,8 +321,6 @@ void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, qemu_irq *nmi,
321 321 int timer_regs;
322 322  
323 323 t = qemu_mallocz(sizeof *t);
324   - if (!t)
325   - return;
326 324  
327 325 t->bh_t0 = qemu_bh_new(timer0_hit, t);
328 326 t->bh_t1 = qemu_bh_new(timer1_hit, t);
... ...
hw/fdc.c
  View file @487414f
... ... @@ -1866,13 +1866,7 @@ static fdctrl_t *fdctrl_init_common (qemu_irq irq, int dma_chann,
1866 1866  
1867 1867 FLOPPY_DPRINTF("init controller\n");
1868 1868 fdctrl = qemu_mallocz(sizeof(fdctrl_t));
1869   - if (!fdctrl)
1870   - return NULL;
1871 1869 fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
1872   - if (fdctrl->fifo == NULL) {
1873   - qemu_free(fdctrl);
1874   - return NULL;
1875   - }
1876 1870 fdctrl->result_timer = qemu_new_timer(vm_clock,
1877 1871 fdctrl_result_timer, fdctrl);
1878 1872  
... ...
hw/fmopl.c
  View file @487414f
... ... @@ -619,26 +619,10 @@ static int OPLOpenTable( void )
619 619 double pom;
620 620  
621 621 /* allocate dynamic tables */
622   - if( (TL_TABLE = malloc(TL_MAX*2*sizeof(INT32))) == NULL)
623   - return 0;
624   - if( (SIN_TABLE = malloc(SIN_ENT*4 *sizeof(INT32 *))) == NULL)
625   - {
626   - free(TL_TABLE);
627   - return 0;
628   - }
629   - if( (AMS_TABLE = malloc(AMS_ENT*2 *sizeof(INT32))) == NULL)
630   - {
631   - free(TL_TABLE);
632   - free(SIN_TABLE);
633   - return 0;
634   - }
635   - if( (VIB_TABLE = malloc(VIB_ENT*2 *sizeof(INT32))) == NULL)
636   - {
637   - free(TL_TABLE);
638   - free(SIN_TABLE);
639   - free(AMS_TABLE);
640   - return 0;
641   - }
  622 + TL_TABLE = qemu_malloc(TL_MAX*2*sizeof(INT32));
  623 + SIN_TABLE = qemu_malloc(SIN_ENT*4 *sizeof(INT32 *));
  624 + AMS_TABLE = qemu_malloc(AMS_ENT*2 *sizeof(INT32));
  625 + VIB_TABLE = qemu_malloc(VIB_ENT*2 *sizeof(INT32));
642 626 /* make total level table */
643 627 for (t = 0;t < EG_ENT-1 ;t++){
644 628 rate = ((1<<TL_BITS)-1)/pow(10,EG_STEP*t/20); /* dB -> voltage */
... ... @@ -1221,8 +1205,7 @@ FM_OPL *OPLCreate(int type, int clock, int rate)
1221 1205 if(type&OPL_TYPE_ADPCM) state_size+= sizeof(YM_DELTAT);
1222 1206 #endif
1223 1207 /* allocate memory block */
1224   - ptr = malloc(state_size);
1225   - if(ptr==NULL) return NULL;
  1208 + ptr = qemu_malloc(state_size);
1226 1209 /* clear */
1227 1210 memset(ptr,0,state_size);
1228 1211 OPL = (FM_OPL *)ptr; ptr+=sizeof(FM_OPL);
... ...
hw/fw_cfg.c
  View file @487414f
... ... @@ -206,8 +206,6 @@ int fw_cfg_add_i16(void *opaque, uint16_t key, uint16_t value)
206 206 uint16_t *copy;
207 207  
208 208 copy = qemu_malloc(sizeof(value));
209   - if (!copy)
210   - return 0;
211 209 *copy = cpu_to_le16(value);
212 210 return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
213 211 }
... ... @@ -217,8 +215,6 @@ int fw_cfg_add_i32(void *opaque, uint16_t key, uint32_t value)
217 215 uint32_t *copy;
218 216  
219 217 copy = qemu_malloc(sizeof(value));
220   - if (!copy)
221   - return 0;
222 218 *copy = cpu_to_le32(value);
223 219 return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
224 220 }
... ... @@ -228,8 +224,6 @@ int fw_cfg_add_i64(void *opaque, uint16_t key, uint64_t value)
228 224 uint64_t *copy;
229 225  
230 226 copy = qemu_malloc(sizeof(value));
231   - if (!copy)
232   - return 0;
233 227 *copy = cpu_to_le64(value);
234 228 return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value));
235 229 }
... ... @@ -263,8 +257,6 @@ void *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
263 257 int io_ctl_memory, io_data_memory;
264 258  
265 259 s = qemu_mallocz(sizeof(FWCfgState));
266   - if (!s)
267   - return NULL;
268 260  
269 261 if (ctl_port) {
270 262 register_ioport_write(ctl_port, 2, 2, fw_cfg_io_writew, s);
... ...
hw/g364fb.c
  View file @487414f
... ... @@ -593,8 +593,6 @@ int g364fb_mm_init(uint8_t *vram, ram_addr_t vram_offset,
593 593 int io_ctrl;
594 594  
595 595 s = qemu_mallocz(sizeof(G364State));
596   - if (!s)
597   - return -1;
598 596  
599 597 s->vram = vram;
600 598 s->vram_offset = vram_offset;
... ...
hw/gus.c
  View file @487414f
... ... @@ -261,11 +261,6 @@ int GUS_init (AudioState *audio, qemu_irq *pic)
261 261 }
262 262  
263 263 s = qemu_mallocz (sizeof (*s));
264   - if (!s) {
265   - dolog ("Could not allocate memory for GUS (%zu bytes)\n",
266   - sizeof (*s));
267   - return -1;
268   - }
269 264  
270 265 AUD_register_card (audio, "gus", &s->card);
271 266  
... ... @@ -292,12 +287,6 @@ int GUS_init (AudioState *audio, qemu_irq *pic)
292 287 s->shift = 2;
293 288 s->samples = AUD_get_buffer_size_out (s->voice) >> s->shift;
294 289 s->mixbuf = qemu_mallocz (s->samples << s->shift);
295   - if (!s->mixbuf) {
296   - AUD_close_out (&s->card, s->voice);
297   - AUD_remove_card (&s->card);
298   - qemu_free (s);
299   - return -1;
300   - }
301 290  
302 291 register_ioport_write (conf.port, 1, 1, gus_writeb, s);
303 292 register_ioport_write (conf.port, 1, 2, gus_writew, s);
... ...
hw/i8259.c
  View file @487414f
... ... @@ -550,8 +550,6 @@ qemu_irq *i8259_init(qemu_irq parent_irq)
550 550 PicState2 *s;
551 551  
552 552 s = qemu_mallocz(sizeof(PicState2));
553   - if (!s)
554   - return NULL;
555 553 pic_init1(0x20, 0x4d0, &s->pics[0]);
556 554 pic_init1(0xa0, 0x4d1, &s->pics[1]);
557 555 s->pics[0].elcr_mask = 0xf8;
... ...
hw/ide.c
  View file @487414f
... ... @@ -2895,8 +2895,6 @@ void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
2895 2895 IDEState *ide_state;
2896 2896  
2897 2897 ide_state = qemu_mallocz(sizeof(IDEState) * 2);
2898   - if (!ide_state)
2899   - return;
2900 2898  
2901 2899 ide_init2(ide_state, hd0, hd1, irq);
2902 2900 ide_init_ioport(ide_state, iobase, iobase2);
... ...
hw/integratorcp.c
  View file @487414f
... ... @@ -378,8 +378,6 @@ static qemu_irq *icp_pic_init(uint32_t base,
378 378 qemu_irq *qi;
379 379  
380 380 s = (icp_pic_state *)qemu_mallocz(sizeof(icp_pic_state));
381   - if (!s)
382   - return NULL;
383 381 qi = qemu_allocate_irqs(icp_pic_set_irq, s, 32);
384 382 s->parent_irq = parent_irq;
385 383 s->parent_fiq = parent_fiq;
... ...
hw/iommu.c
  View file @487414f
... ... @@ -371,8 +371,6 @@ void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq)
371 371 int iommu_io_memory;
372 372  
373 373 s = qemu_mallocz(sizeof(IOMMUState));
374   - if (!s)
375   - return NULL;
376 374  
377 375 s->version = version;
378 376 s->irq = irq;
... ...
hw/jazz_led.c
  View file @487414f
... ... @@ -304,8 +304,6 @@ void jazz_led_init(target_phys_addr_t base)
304 304 int io;
305 305  
306 306 s = qemu_mallocz(sizeof(LedState));
307   - if (!s)
308   - return;
309 307  
310 308 s->state = REDRAW_SEGMENTS | REDRAW_BACKGROUND;
311 309  
... ...
hw/m48t59.c
  View file @487414f
... ... @@ -622,13 +622,7 @@ m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base,
622 622 target_phys_addr_t save_base;
623 623  
624 624 s = qemu_mallocz(sizeof(m48t59_t));
625   - if (!s)
626   - return NULL;
627 625 s->buffer = qemu_mallocz(size);
628   - if (!s->buffer) {
629   - qemu_free(s);
630   - return NULL;
631   - }
632 626 s->IRQ = IRQ;
633 627 s->size = size;
634 628 s->io_base = io_base;
... ...
hw/mac_dbdma.c
  View file @487414f
... ... @@ -865,8 +865,6 @@ void* DBDMA_init (int *dbdma_mem_index)
865 865 DBDMA_channel *s;
866 866  
867 867 s = qemu_mallocz(sizeof(DBDMA_channel) * DBDMA_CHANNELS);
868   - if (!s)
869   - return NULL;
870 868  
871 869 *dbdma_mem_index = cpu_register_io_memory(0, dbdma_read, dbdma_write, s);
872 870 register_savevm("dbdma", -1, 1, dbdma_save, dbdma_load, s);
... ...
hw/mac_nvram.c
  View file @487414f
... ... @@ -132,13 +132,7 @@ MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size)
132 132 MacIONVRAMState *s;
133 133  
134 134 s = qemu_mallocz(sizeof(MacIONVRAMState));
135   - if (!s)
136   - return NULL;
137 135 s->data = qemu_mallocz(size);
138   - if (!s->data) {
139   - qemu_free(s);
140   - return NULL;
141   - }
142 136 s->size = size;
143 137  
144 138 s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
... ...
hw/mc146818rtc.c
  View file @487414f
... ... @@ -532,8 +532,6 @@ RTCState *rtc_init(int base, qemu_irq irq, int base_year)
532 532 RTCState *s;
533 533  
534 534 s = qemu_mallocz(sizeof(RTCState));
535   - if (!s)
536   - return NULL;
537 535  
538 536 s->irq = irq;
539 537 s->cmos_data[RTC_REG_A] = 0x26;
... ... @@ -644,8 +642,6 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
644 642 int io_memory;
645 643  
646 644 s = qemu_mallocz(sizeof(RTCState));
647   - if (!s)
648   - return NULL;
649 645  
650 646 s->irq = irq;
651 647 s->cmos_data[RTC_REG_A] = 0x26;
... ...
hw/mipsnet.c
  View file @487414f
... ... @@ -239,8 +239,6 @@ void mipsnet_init (int base, qemu_irq irq, NICInfo *nd)
239 239 qemu_check_nic_model(nd, "mipsnet");
240 240  
241 241 s = qemu_mallocz(sizeof(MIPSnetState));
242   - if (!s)
243   - return;
244 242  
245 243 register_ioport_write(base, 36, 1, mipsnet_ioport_write, s);
246 244 register_ioport_read(base, 36, 1, mipsnet_ioport_read, s);
... ...
hw/mpcore.c
  View file @487414f
... ... @@ -265,8 +265,6 @@ static qemu_irq *mpcore_priv_init(uint32_t base, qemu_irq *pic_irq)
265 265 int i;
266 266  
267 267 s = (mpcore_priv_state *)qemu_mallocz(sizeof(mpcore_priv_state));
268   - if (!s)
269   - return NULL;
270 268 s->gic = gic_init(base + 0x1000, pic_irq);
271 269 if (!s->gic)
272 270 return NULL;
... ...
hw/mst_fpga.c
  View file @487414f
... ... @@ -225,8 +225,6 @@ qemu_irq *mst_irq_init(struct pxa2xx_state_s *cpu, uint32_t base, int irq)
225 225 s = (mst_irq_state *)
226 226 qemu_mallocz(sizeof(mst_irq_state));
227 227  
228   - if (!s)
229   - return NULL;
230 228 s->parent = &cpu->pic[irq];
231 229  
232 230 /* alloc the external 16 irqs */
... ...
hw/musicpal.c
  View file @487414f
... ... @@ -443,13 +443,9 @@ static i2c_interface *musicpal_audio_init(uint32_t base, qemu_irq irq)
443 443 }
444 444  
445 445 s = qemu_mallocz(sizeof(musicpal_audio_state));
446   - if (!s)
447   - return NULL;
448 446 s->irq = irq;
449 447  
450 448 i2c = qemu_mallocz(sizeof(i2c_interface));
451   - if (!i2c)
452   - return NULL;
453 449 i2c->bus = i2c_init_bus();
454 450 i2c->current_addr = -1;
455 451  
... ... @@ -717,8 +713,6 @@ static void mv88w8618_eth_init(NICInfo *nd, uint32_t base, qemu_irq irq)
717 713 qemu_check_nic_model(nd, "mv88w8618");
718 714  
719 715 s = qemu_mallocz(sizeof(mv88w8618_eth_state));
720   - if (!s)
721   - return;
722 716 s->irq = irq;
723 717 s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,
724 718 eth_receive, eth_can_receive, s);
... ... @@ -911,8 +905,6 @@ static void musicpal_lcd_init(uint32_t base)
911 905 int iomemtype;
912 906  
913 907 s = qemu_mallocz(sizeof(musicpal_lcd_state));
914   - if (!s)
915   - return;
916 908 iomemtype = cpu_register_io_memory(0, musicpal_lcd_readfn,
917 909 musicpal_lcd_writefn, s);
918 910 cpu_register_physical_memory(base, MP_LCD_SIZE, iomemtype);
... ... @@ -1008,8 +1000,6 @@ static qemu_irq *mv88w8618_pic_init(uint32_t base, qemu_irq parent_irq)
1008 1000 qemu_irq *qi;
1009 1001  
1010 1002 s = qemu_mallocz(sizeof(mv88w8618_pic_state));
1011   - if (!s)
1012   - return NULL;
1013 1003 qi = qemu_allocate_irqs(mv88w8618_pic_set_irq, s, 32);
1014 1004 s->parent_irq = parent_irq;
1015 1005 iomemtype = cpu_register_io_memory(0, mv88w8618_pic_readfn,
... ... @@ -1134,8 +1124,6 @@ static void mv88w8618_pit_init(uint32_t base, qemu_irq *pic, int irq)
1134 1124 mv88w8618_pit_state *s;
1135 1125  
1136 1126 s = qemu_mallocz(sizeof(mv88w8618_pit_state));
1137   - if (!s)
1138   - return;
1139 1127  
1140 1128 /* Letting them all run at 1 MHz is likely just a pragmatic
1141 1129 * simplification. */
... ... @@ -1200,8 +1188,6 @@ static void mv88w8618_flashcfg_init(uint32_t base)
1200 1188 mv88w8618_flashcfg_state *s;
1201 1189  
1202 1190 s = qemu_mallocz(sizeof(mv88w8618_flashcfg_state));
1203   - if (!s)
1204   - return;
1205 1191  
1206 1192 s->cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */
1207 1193 iomemtype = cpu_register_io_memory(0, mv88w8618_flashcfg_readfn,
... ...
hw/ne2000.c
  View file @487414f
... ... @@ -725,8 +725,6 @@ void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd)
725 725 qemu_check_nic_model(nd, "ne2k_isa");
726 726  
727 727 s = qemu_mallocz(sizeof(NE2000State));
728   - if (!s)
729   - return;
730 728  
731 729 register_ioport_write(base, 16, 1, ne2000_ioport_write, s);
732 730 register_ioport_read(base, 16, 1, ne2000_ioport_read, s);
... ...
hw/parallel.c
  View file @487414f
... ... @@ -445,8 +445,6 @@ ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr)
445 445 uint8_t dummy;
446 446  
447 447 s = qemu_mallocz(sizeof(ParallelState));
448   - if (!s)
449   - return NULL;
450 448 s->irq = irq;
451 449 s->chr = chr;
452 450 parallel_reset(s);
... ... @@ -539,8 +537,6 @@ ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq
539 537 int io_sw;
540 538  
541 539 s = qemu_mallocz(sizeof(ParallelState));
542   - if (!s)
543   - return NULL;
544 540 s->irq = irq;
545 541 s->chr = chr;
546 542 s->it_shift = it_shift;
... ...
hw/pci.c
  View file @487414f
... ... @@ -178,8 +178,6 @@ PCIDevice *pci_register_device(PCIBus *bus, const char *name,
178 178 found: ;
179 179 }
180 180 pci_dev = qemu_mallocz(instance_size);
181   - if (!pci_dev)
182   - return NULL;
183 181 pci_dev->bus = bus;
184 182 pci_dev->devfn = devfn;
185 183 pstrcpy(pci_dev->name, sizeof(pci_dev->name), name);
... ...
hw/pcnet.c
  View file @487414f
... ... @@ -2089,8 +2089,6 @@ void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque,
2089 2089 qemu_check_nic_model(nd, "lance");
2090 2090  
2091 2091 d = qemu_mallocz(sizeof(PCNetState));
2092   - if (!d)
2093   - return;
2094 2092  
2095 2093 lance_io_memory =
2096 2094 cpu_register_io_memory(0, lance_mem_read, lance_mem_write, d);
... ...
hw/pflash_cfi01.c
  View file @487414f
... ... @@ -519,8 +519,6 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
519 519  
520 520 pfl = qemu_mallocz(sizeof(pflash_t));
521 521  
522   - if (pfl == NULL)
523   - return NULL;
524 522 pfl->storage = phys_ram_base + off;
525 523 pfl->fl_mem = cpu_register_io_memory(0,
526 524 pflash_read_ops, pflash_write_ops, pfl);
... ...
hw/pflash_cfi02.c
  View file @487414f
... ... @@ -557,8 +557,6 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
557 557 return NULL;
558 558 #endif
559 559 pfl = qemu_mallocz(sizeof(pflash_t));
560   - if (pfl == NULL)
561   - return NULL;
562 560 pfl->storage = phys_ram_base + off;
563 561 pfl->fl_mem = cpu_register_io_memory(0, pflash_read_ops, pflash_write_ops,
564 562 pfl);
... ...
hw/pl031.c
  View file @487414f
... ... @@ -193,8 +193,6 @@ void pl031_init(uint32_t base, qemu_irq irq)
193 193 struct tm tm;
194 194  
195 195 s = qemu_mallocz(sizeof(pl031_state));
196   - if (!s)
197   - cpu_abort(cpu_single_env, "pl031_init: Out of memory\n");
198 196  
199 197 iomemtype = cpu_register_io_memory(0, pl031_readfn, pl031_writefn, s);
200 198 if (iomemtype == -1)
... ...
hw/ppc.c
  View file @487414f
... ... @@ -645,8 +645,6 @@ clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq)
645 645 ppc_tb_t *tb_env;
646 646  
647 647 tb_env = qemu_mallocz(sizeof(ppc_tb_t));
648   - if (tb_env == NULL)
649   - return NULL;
650 648 env->tb_env = tb_env;
651 649 /* Create new timer */
652 650 tb_env->decr_timer = qemu_new_timer(vm_clock, &cpu_ppc_decr_cb, env);
... ... @@ -915,9 +913,6 @@ clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq)
915 913 ppcemb_timer_t *ppcemb_timer;
916 914  
917 915 tb_env = qemu_mallocz(sizeof(ppc_tb_t));
918   - if (tb_env == NULL) {
919   - return NULL;
920   - }
921 916 env->tb_env = tb_env;
922 917 ppcemb_timer = qemu_mallocz(sizeof(ppcemb_timer_t));
923 918 tb_env->tb_freq = freq;
... ... @@ -1024,8 +1019,6 @@ int ppc_dcr_init (CPUState *env, int (*read_error)(int dcrn),
1024 1019 ppc_dcr_t *dcr_env;
1025 1020  
1026 1021 dcr_env = qemu_mallocz(sizeof(ppc_dcr_t));
1027   - if (dcr_env == NULL)
1028   - return -1;
1029 1022 dcr_env->read_error = read_error;
1030 1023 dcr_env->write_error = write_error;
1031 1024 env->dcr_env = dcr_env;
... ...
hw/ppc405_boards.c
  View file @487414f
... ... @@ -162,13 +162,11 @@ static void ref405ep_fpga_init (uint32_t base)
162 162 int fpga_memory;
163 163  
164 164 fpga = qemu_mallocz(sizeof(ref405ep_fpga_t));
165   - if (fpga != NULL) {
166   - fpga_memory = cpu_register_io_memory(0, ref405ep_fpga_read,
167   - ref405ep_fpga_write, fpga);
168   - cpu_register_physical_memory(base, 0x00000100, fpga_memory);
169   - ref405ep_fpga_reset(fpga);
170   - qemu_register_reset(&ref405ep_fpga_reset, fpga);
171   - }
  165 + fpga_memory = cpu_register_io_memory(0, ref405ep_fpga_read,
  166 + ref405ep_fpga_write, fpga);
  167 + cpu_register_physical_memory(base, 0x00000100, fpga_memory);
  168 + ref405ep_fpga_reset(fpga);
  169 + qemu_register_reset(&ref405ep_fpga_reset, fpga);
172 170 }
173 171  
174 172 static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size,
... ... @@ -486,13 +484,11 @@ static void taihu_cpld_init (uint32_t base)
486 484 int cpld_memory;
487 485  
488 486 cpld = qemu_mallocz(sizeof(taihu_cpld_t));
489   - if (cpld != NULL) {
490   - cpld_memory = cpu_register_io_memory(0, taihu_cpld_read,
491   - taihu_cpld_write, cpld);
492   - cpu_register_physical_memory(base, 0x00000100, cpld_memory);
493   - taihu_cpld_reset(cpld);
494   - qemu_register_reset(&taihu_cpld_reset, cpld);
495   - }
  487 + cpld_memory = cpu_register_io_memory(0, taihu_cpld_read,
  488 + taihu_cpld_write, cpld);
  489 + cpu_register_physical_memory(base, 0x00000100, cpld_memory);
  490 + taihu_cpld_reset(cpld);
  491 + qemu_register_reset(&taihu_cpld_reset, cpld);
496 492 }
497 493  
498 494 static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size,
... ...
hw/ppc405_uc.c
  View file @487414f
... ... @@ -169,13 +169,11 @@ void ppc4xx_plb_init (CPUState *env)
169 169 ppc4xx_plb_t *plb;
170 170  
171 171 plb = qemu_mallocz(sizeof(ppc4xx_plb_t));
172   - if (plb != NULL) {
173   - ppc_dcr_register(env, PLB0_ACR, plb, &dcr_read_plb, &dcr_write_plb);
174   - ppc_dcr_register(env, PLB0_BEAR, plb, &dcr_read_plb, &dcr_write_plb);
175   - ppc_dcr_register(env, PLB0_BESR, plb, &dcr_read_plb, &dcr_write_plb);
176   - ppc4xx_plb_reset(plb);
177   - qemu_register_reset(ppc4xx_plb_reset, plb);
178   - }
  172 + ppc_dcr_register(env, PLB0_ACR, plb, &dcr_read_plb, &dcr_write_plb);
  173 + ppc_dcr_register(env, PLB0_BEAR, plb, &dcr_read_plb, &dcr_write_plb);
  174 + ppc_dcr_register(env, PLB0_BESR, plb, &dcr_read_plb, &dcr_write_plb);
  175 + ppc4xx_plb_reset(plb);
  176 + qemu_register_reset(ppc4xx_plb_reset, plb);
179 177 }
180 178  
181 179 /*****************************************************************************/
... ... @@ -248,13 +246,11 @@ void ppc4xx_pob_init (CPUState *env)
248 246 ppc4xx_pob_t *pob;
249 247  
250 248 pob = qemu_mallocz(sizeof(ppc4xx_pob_t));
251   - if (pob != NULL) {
252   - ppc_dcr_register(env, POB0_BEAR, pob, &dcr_read_pob, &dcr_write_pob);
253   - ppc_dcr_register(env, POB0_BESR0, pob, &dcr_read_pob, &dcr_write_pob);
254   - ppc_dcr_register(env, POB0_BESR1, pob, &dcr_read_pob, &dcr_write_pob);
255   - qemu_register_reset(ppc4xx_pob_reset, pob);
256   - ppc4xx_pob_reset(env);
257   - }
  249 + ppc_dcr_register(env, POB0_BEAR, pob, &dcr_read_pob, &dcr_write_pob);
  250 + ppc_dcr_register(env, POB0_BESR0, pob, &dcr_read_pob, &dcr_write_pob);
  251 + ppc_dcr_register(env, POB0_BESR1, pob, &dcr_read_pob, &dcr_write_pob);
  252 + qemu_register_reset(ppc4xx_pob_reset, pob);
  253 + ppc4xx_pob_reset(env);
258 254 }
259 255  
260 256 /*****************************************************************************/
... ... @@ -384,16 +380,14 @@ void ppc4xx_opba_init (CPUState *env, ppc4xx_mmio_t *mmio,
384 380 ppc4xx_opba_t *opba;
385 381  
386 382 opba = qemu_mallocz(sizeof(ppc4xx_opba_t));
387   - if (opba != NULL) {
388   - opba->base = offset;
  383 + opba->base = offset;
389 384 #ifdef DEBUG_OPBA
390   - printf("%s: offset " PADDRX "\n", __func__, offset);
  385 + printf("%s: offset " PADDRX "\n", __func__, offset);
391 386 #endif
392   - ppc4xx_mmio_register(env, mmio, offset, 0x002,
393   - opba_read, opba_write, opba);
394   - qemu_register_reset(ppc4xx_opba_reset, opba);
395   - ppc4xx_opba_reset(opba);
396   - }
  387 + ppc4xx_mmio_register(env, mmio, offset, 0x002,
  388 + opba_read, opba_write, opba);
  389 + qemu_register_reset(ppc4xx_opba_reset, opba);
  390 + ppc4xx_opba_reset(opba);
397 391 }
398 392  
399 393 /*****************************************************************************/
... ... @@ -585,14 +579,12 @@ void ppc405_ebc_init (CPUState *env)
585 579 ppc4xx_ebc_t *ebc;
586 580  
587 581 ebc = qemu_mallocz(sizeof(ppc4xx_ebc_t));
588   - if (ebc != NULL) {
589   - ebc_reset(ebc);
590   - qemu_register_reset(&ebc_reset, ebc);
591   - ppc_dcr_register(env, EBC0_CFGADDR,
592   - ebc, &dcr_read_ebc, &dcr_write_ebc);
593   - ppc_dcr_register(env, EBC0_CFGDATA,
594   - ebc, &dcr_read_ebc, &dcr_write_ebc);
595   - }
  582 + ebc_reset(ebc);
  583 + qemu_register_reset(&ebc_reset, ebc);
  584 + ppc_dcr_register(env, EBC0_CFGADDR,
  585 + ebc, &dcr_read_ebc, &dcr_write_ebc);
  586 + ppc_dcr_register(env, EBC0_CFGDATA,
  587 + ebc, &dcr_read_ebc, &dcr_write_ebc);
596 588 }
597 589  
598 590 /*****************************************************************************/
... ... @@ -678,59 +670,57 @@ void ppc405_dma_init (CPUState *env, qemu_irq irqs[4])
678 670 ppc405_dma_t *dma;
679 671  
680 672 dma = qemu_mallocz(sizeof(ppc405_dma_t));
681   - if (dma != NULL) {
682   - memcpy(dma->irqs, irqs, 4 * sizeof(qemu_irq));
683   - ppc405_dma_reset(dma);
684   - qemu_register_reset(&ppc405_dma_reset, dma);
685   - ppc_dcr_register(env, DMA0_CR0,
686   - dma, &dcr_read_dma, &dcr_write_dma);
687   - ppc_dcr_register(env, DMA0_CT0,
688   - dma, &dcr_read_dma, &dcr_write_dma);
689   - ppc_dcr_register(env, DMA0_DA0,
690   - dma, &dcr_read_dma, &dcr_write_dma);
691   - ppc_dcr_register(env, DMA0_SA0,
692   - dma, &dcr_read_dma, &dcr_write_dma);
693   - ppc_dcr_register(env, DMA0_SG0,
694   - dma, &dcr_read_dma, &dcr_write_dma);
695   - ppc_dcr_register(env, DMA0_CR1,
696   - dma, &dcr_read_dma, &dcr_write_dma);
697   - ppc_dcr_register(env, DMA0_CT1,
698   - dma, &dcr_read_dma, &dcr_write_dma);
699   - ppc_dcr_register(env, DMA0_DA1,
700   - dma, &dcr_read_dma, &dcr_write_dma);
701   - ppc_dcr_register(env, DMA0_SA1,
702   - dma, &dcr_read_dma, &dcr_write_dma);
703   - ppc_dcr_register(env, DMA0_SG1,
704   - dma, &dcr_read_dma, &dcr_write_dma);
705   - ppc_dcr_register(env, DMA0_CR2,
706   - dma, &dcr_read_dma, &dcr_write_dma);
707   - ppc_dcr_register(env, DMA0_CT2,
708   - dma, &dcr_read_dma, &dcr_write_dma);
709   - ppc_dcr_register(env, DMA0_DA2,
710   - dma, &dcr_read_dma, &dcr_write_dma);
711   - ppc_dcr_register(env, DMA0_SA2,
712   - dma, &dcr_read_dma, &dcr_write_dma);
713   - ppc_dcr_register(env, DMA0_SG2,
714   - dma, &dcr_read_dma, &dcr_write_dma);
715   - ppc_dcr_register(env, DMA0_CR3,
716   - dma, &dcr_read_dma, &dcr_write_dma);
717   - ppc_dcr_register(env, DMA0_CT3,
718   - dma, &dcr_read_dma, &dcr_write_dma);
719   - ppc_dcr_register(env, DMA0_DA3,
720   - dma, &dcr_read_dma, &dcr_write_dma);
721   - ppc_dcr_register(env, DMA0_SA3,
722   - dma, &dcr_read_dma, &dcr_write_dma);
723   - ppc_dcr_register(env, DMA0_SG3,
724   - dma, &dcr_read_dma, &dcr_write_dma);
725   - ppc_dcr_register(env, DMA0_SR,
726   - dma, &dcr_read_dma, &dcr_write_dma);
727   - ppc_dcr_register(env, DMA0_SGC,
728   - dma, &dcr_read_dma, &dcr_write_dma);
729   - ppc_dcr_register(env, DMA0_SLP,
730   - dma, &dcr_read_dma, &dcr_write_dma);
731   - ppc_dcr_register(env, DMA0_POL,
732   - dma, &dcr_read_dma, &dcr_write_dma);
733   - }
  673 + memcpy(dma->irqs, irqs, 4 * sizeof(qemu_irq));
  674 + ppc405_dma_reset(dma);
  675 + qemu_register_reset(&ppc405_dma_reset, dma);
  676 + ppc_dcr_register(env, DMA0_CR0,
  677 + dma, &dcr_read_dma, &dcr_write_dma);
  678 + ppc_dcr_register(env, DMA0_CT0,
  679 + dma, &dcr_read_dma, &dcr_write_dma);
  680 + ppc_dcr_register(env, DMA0_DA0,
  681 + dma, &dcr_read_dma, &dcr_write_dma);
  682 + ppc_dcr_register(env, DMA0_SA0,
  683 + dma, &dcr_read_dma, &dcr_write_dma);
  684 + ppc_dcr_register(env, DMA0_SG0,
  685 + dma, &dcr_read_dma, &dcr_write_dma);
  686 + ppc_dcr_register(env, DMA0_CR1,
  687 + dma, &dcr_read_dma, &dcr_write_dma);
  688 + ppc_dcr_register(env, DMA0_CT1,
  689 + dma, &dcr_read_dma, &dcr_write_dma);
  690 + ppc_dcr_register(env, DMA0_DA1,
  691 + dma, &dcr_read_dma, &dcr_write_dma);
  692 + ppc_dcr_register(env, DMA0_SA1,
  693 + dma, &dcr_read_dma, &dcr_write_dma);
  694 + ppc_dcr_register(env, DMA0_SG1,
  695 + dma, &dcr_read_dma, &dcr_write_dma);
  696 + ppc_dcr_register(env, DMA0_CR2,
  697 + dma, &dcr_read_dma, &dcr_write_dma);
  698 + ppc_dcr_register(env, DMA0_CT2,
  699 + dma, &dcr_read_dma, &dcr_write_dma);
  700 + ppc_dcr_register(env, DMA0_DA2,
  701 + dma, &dcr_read_dma, &dcr_write_dma);
  702 + ppc_dcr_register(env, DMA0_SA2,
  703 + dma, &dcr_read_dma, &dcr_write_dma);
  704 + ppc_dcr_register(env, DMA0_SG2,
  705 + dma, &dcr_read_dma, &dcr_write_dma);
  706 + ppc_dcr_register(env, DMA0_CR3,
  707 + dma, &dcr_read_dma, &dcr_write_dma);
  708 + ppc_dcr_register(env, DMA0_CT3,
  709 + dma, &dcr_read_dma, &dcr_write_dma);
  710 + ppc_dcr_register(env, DMA0_DA3,
  711 + dma, &dcr_read_dma, &dcr_write_dma);
  712 + ppc_dcr_register(env, DMA0_SA3,
  713 + dma, &dcr_read_dma, &dcr_write_dma);
  714 + ppc_dcr_register(env, DMA0_SG3,
  715 + dma, &dcr_read_dma, &dcr_write_dma);
  716 + ppc_dcr_register(env, DMA0_SR,
  717 + dma, &dcr_read_dma, &dcr_write_dma);
  718 + ppc_dcr_register(env, DMA0_SGC,
  719 + dma, &dcr_read_dma, &dcr_write_dma);
  720 + ppc_dcr_register(env, DMA0_SLP,
  721 + dma, &dcr_read_dma, &dcr_write_dma);
  722 + ppc_dcr_register(env, DMA0_POL,
  723 + dma, &dcr_read_dma, &dcr_write_dma);
734 724 }
735 725  
736 726 /*****************************************************************************/
... ... @@ -845,16 +835,14 @@ void ppc405_gpio_init (CPUState *env, ppc4xx_mmio_t *mmio,
845 835 ppc405_gpio_t *gpio;
846 836  
847 837 gpio = qemu_mallocz(sizeof(ppc405_gpio_t));
848   - if (gpio != NULL) {
849   - gpio->base = offset;
850   - ppc405_gpio_reset(gpio);
851   - qemu_register_reset(&ppc405_gpio_reset, gpio);
  838 + gpio->base = offset;
  839 + ppc405_gpio_reset(gpio);
  840 + qemu_register_reset(&ppc405_gpio_reset, gpio);
852 841 #ifdef DEBUG_GPIO
853   - printf("%s: offset " PADDRX "\n", __func__, offset);
  842 + printf("%s: offset " PADDRX "\n", __func__, offset);
854 843 #endif
855   - ppc4xx_mmio_register(env, mmio, offset, 0x038,
856   - ppc405_gpio_read, ppc405_gpio_write, gpio);
857   - }
  844 + ppc4xx_mmio_register(env, mmio, offset, 0x038,
  845 + ppc405_gpio_read, ppc405_gpio_write, gpio);
858 846 }
859 847  
860 848 /*****************************************************************************/
... ... @@ -1038,19 +1026,17 @@ void ppc405_ocm_init (CPUState *env, unsigned long offset)
1038 1026 ppc405_ocm_t *ocm;
1039 1027  
1040 1028 ocm = qemu_mallocz(sizeof(ppc405_ocm_t));
1041   - if (ocm != NULL) {
1042   - ocm->offset = offset;
1043   - ocm_reset(ocm);
1044   - qemu_register_reset(&ocm_reset, ocm);
1045   - ppc_dcr_register(env, OCM0_ISARC,
1046   - ocm, &dcr_read_ocm, &dcr_write_ocm);
1047   - ppc_dcr_register(env, OCM0_ISACNTL,
1048   - ocm, &dcr_read_ocm, &dcr_write_ocm);
1049   - ppc_dcr_register(env, OCM0_DSARC,
1050   - ocm, &dcr_read_ocm, &dcr_write_ocm);
1051   - ppc_dcr_register(env, OCM0_DSACNTL,
1052   - ocm, &dcr_read_ocm, &dcr_write_ocm);
1053   - }
  1029 + ocm->offset = offset;
  1030 + ocm_reset(ocm);
  1031 + qemu_register_reset(&ocm_reset, ocm);
  1032 + ppc_dcr_register(env, OCM0_ISARC,
  1033 + ocm, &dcr_read_ocm, &dcr_write_ocm);
  1034 + ppc_dcr_register(env, OCM0_ISACNTL,
  1035 + ocm, &dcr_read_ocm, &dcr_write_ocm);
  1036 + ppc_dcr_register(env, OCM0_DSARC,
  1037 + ocm, &dcr_read_ocm, &dcr_write_ocm);
  1038 + ppc_dcr_register(env, OCM0_DSACNTL,
  1039 + ocm, &dcr_read_ocm, &dcr_write_ocm);
1054 1040 }
1055 1041  
1056 1042 /*****************************************************************************/
... ... @@ -1286,17 +1272,15 @@ void ppc405_i2c_init (CPUState *env, ppc4xx_mmio_t *mmio,
1286 1272 ppc4xx_i2c_t *i2c;
1287 1273  
1288 1274 i2c = qemu_mallocz(sizeof(ppc4xx_i2c_t));
1289   - if (i2c != NULL) {
1290   - i2c->base = offset;
1291   - i2c->irq = irq;
1292   - ppc4xx_i2c_reset(i2c);
  1275 + i2c->base = offset;
  1276 + i2c->irq = irq;
  1277 + ppc4xx_i2c_reset(i2c);
1293 1278 #ifdef DEBUG_I2C
1294   - printf("%s: offset " PADDRX "\n", __func__, offset);
  1279 + printf("%s: offset " PADDRX "\n", __func__, offset);
1295 1280 #endif
1296   - ppc4xx_mmio_register(env, mmio, offset, 0x011,
1297   - i2c_read, i2c_write, i2c);
1298   - qemu_register_reset(ppc4xx_i2c_reset, i2c);
1299   - }
  1281 + ppc4xx_mmio_register(env, mmio, offset, 0x011,
  1282 + i2c_read, i2c_write, i2c);
  1283 + qemu_register_reset(ppc4xx_i2c_reset, i2c);
1300 1284 }
1301 1285  
1302 1286 /*****************************************************************************/
... ... @@ -1568,19 +1552,17 @@ void ppc4xx_gpt_init (CPUState *env, ppc4xx_mmio_t *mmio,
1568 1552 int i;
1569 1553  
1570 1554 gpt = qemu_mallocz(sizeof(ppc4xx_gpt_t));
1571   - if (gpt != NULL) {
1572   - gpt->base = offset;
1573   - for (i = 0; i < 5; i++)
1574   - gpt->irqs[i] = irqs[i];
1575   - gpt->timer = qemu_new_timer(vm_clock, &ppc4xx_gpt_cb, gpt);
1576   - ppc4xx_gpt_reset(gpt);
  1555 + gpt->base = offset;
  1556 + for (i = 0; i < 5; i++)
  1557 + gpt->irqs[i] = irqs[i];
  1558 + gpt->timer = qemu_new_timer(vm_clock, &ppc4xx_gpt_cb, gpt);
  1559 + ppc4xx_gpt_reset(gpt);
1577 1560 #ifdef DEBUG_GPT
1578   - printf("%s: offset " PADDRX "\n", __func__, offset);
  1561 + printf("%s: offset " PADDRX "\n", __func__, offset);
1579 1562 #endif
1580   - ppc4xx_mmio_register(env, mmio, offset, 0x0D4,
1581   - gpt_read, gpt_write, gpt);
1582   - qemu_register_reset(ppc4xx_gpt_reset, gpt);
1583   - }
  1563 + ppc4xx_mmio_register(env, mmio, offset, 0x0D4,
  1564 + gpt_read, gpt_write, gpt);
  1565 + qemu_register_reset(ppc4xx_gpt_reset, gpt);
1584 1566 }
1585 1567  
1586 1568 /*****************************************************************************/
... ... @@ -1802,50 +1784,48 @@ void ppc405_mal_init (CPUState *env, qemu_irq irqs[4])
1802 1784 int i;
1803 1785  
1804 1786 mal = qemu_mallocz(sizeof(ppc40x_mal_t));
1805   - if (mal != NULL) {
1806   - for (i = 0; i < 4; i++)
1807   - mal->irqs[i] = irqs[i];
1808   - ppc40x_mal_reset(mal);
1809   - qemu_register_reset(&ppc40x_mal_reset, mal);
1810   - ppc_dcr_register(env, MAL0_CFG,
1811   - mal, &dcr_read_mal, &dcr_write_mal);
1812   - ppc_dcr_register(env, MAL0_ESR,
1813   - mal, &dcr_read_mal, &dcr_write_mal);
1814   - ppc_dcr_register(env, MAL0_IER,
1815   - mal, &dcr_read_mal, &dcr_write_mal);
1816   - ppc_dcr_register(env, MAL0_TXCASR,
1817   - mal, &dcr_read_mal, &dcr_write_mal);
1818   - ppc_dcr_register(env, MAL0_TXCARR,
1819   - mal, &dcr_read_mal, &dcr_write_mal);
1820   - ppc_dcr_register(env, MAL0_TXEOBISR,
1821   - mal, &dcr_read_mal, &dcr_write_mal);
1822   - ppc_dcr_register(env, MAL0_TXDEIR,
1823   - mal, &dcr_read_mal, &dcr_write_mal);
1824   - ppc_dcr_register(env, MAL0_RXCASR,
1825   - mal, &dcr_read_mal, &dcr_write_mal);
1826   - ppc_dcr_register(env, MAL0_RXCARR,
1827   - mal, &dcr_read_mal, &dcr_write_mal);
1828   - ppc_dcr_register(env, MAL0_RXEOBISR,
1829   - mal, &dcr_read_mal, &dcr_write_mal);
1830   - ppc_dcr_register(env, MAL0_RXDEIR,
1831   - mal, &dcr_read_mal, &dcr_write_mal);
1832   - ppc_dcr_register(env, MAL0_TXCTP0R,
1833   - mal, &dcr_read_mal, &dcr_write_mal);
1834   - ppc_dcr_register(env, MAL0_TXCTP1R,
1835   - mal, &dcr_read_mal, &dcr_write_mal);
1836   - ppc_dcr_register(env, MAL0_TXCTP2R,
1837   - mal, &dcr_read_mal, &dcr_write_mal);
1838   - ppc_dcr_register(env, MAL0_TXCTP3R,
1839   - mal, &dcr_read_mal, &dcr_write_mal);
1840   - ppc_dcr_register(env, MAL0_RXCTP0R,
1841   - mal, &dcr_read_mal, &dcr_write_mal);
1842   - ppc_dcr_register(env, MAL0_RXCTP1R,
1843   - mal, &dcr_read_mal, &dcr_write_mal);
1844   - ppc_dcr_register(env, MAL0_RCBS0,
1845   - mal, &dcr_read_mal, &dcr_write_mal);
1846   - ppc_dcr_register(env, MAL0_RCBS1,
1847   - mal, &dcr_read_mal, &dcr_write_mal);
1848   - }
  1787 + for (i = 0; i < 4; i++)
  1788 + mal->irqs[i] = irqs[i];
  1789 + ppc40x_mal_reset(mal);
  1790 + qemu_register_reset(&ppc40x_mal_reset, mal);
  1791 + ppc_dcr_register(env, MAL0_CFG,
  1792 + mal, &dcr_read_mal, &dcr_write_mal);
  1793 + ppc_dcr_register(env, MAL0_ESR,
  1794 + mal, &dcr_read_mal, &dcr_write_mal);
  1795 + ppc_dcr_register(env, MAL0_IER,
  1796 + mal, &dcr_read_mal, &dcr_write_mal);
  1797 + ppc_dcr_register(env, MAL0_TXCASR,
  1798 + mal, &dcr_read_mal, &dcr_write_mal);
  1799 + ppc_dcr_register(env, MAL0_TXCARR,
  1800 + mal, &dcr_read_mal, &dcr_write_mal);
  1801 + ppc_dcr_register(env, MAL0_TXEOBISR,
  1802 + mal, &dcr_read_mal, &dcr_write_mal);
  1803 + ppc_dcr_register(env, MAL0_TXDEIR,
  1804 + mal, &dcr_read_mal, &dcr_write_mal);
  1805 + ppc_dcr_register(env, MAL0_RXCASR,
  1806 + mal, &dcr_read_mal, &dcr_write_mal);
  1807 + ppc_dcr_register(env, MAL0_RXCARR,
  1808 + mal, &dcr_read_mal, &dcr_write_mal);
  1809 + ppc_dcr_register(env, MAL0_RXEOBISR,
  1810 + mal, &dcr_read_mal, &dcr_write_mal);
  1811 + ppc_dcr_register(env, MAL0_RXDEIR,
  1812 + mal, &dcr_read_mal, &dcr_write_mal);
  1813 + ppc_dcr_register(env, MAL0_TXCTP0R,
  1814 + mal, &dcr_read_mal, &dcr_write_mal);
  1815 + ppc_dcr_register(env, MAL0_TXCTP1R,
  1816 + mal, &dcr_read_mal, &dcr_write_mal);
  1817 + ppc_dcr_register(env, MAL0_TXCTP2R,
  1818 + mal, &dcr_read_mal, &dcr_write_mal);
  1819 + ppc_dcr_register(env, MAL0_TXCTP3R,
  1820 + mal, &dcr_read_mal, &dcr_write_mal);
  1821 + ppc_dcr_register(env, MAL0_RXCTP0R,
  1822 + mal, &dcr_read_mal, &dcr_write_mal);
  1823 + ppc_dcr_register(env, MAL0_RXCTP1R,
  1824 + mal, &dcr_read_mal, &dcr_write_mal);
  1825 + ppc_dcr_register(env, MAL0_RCBS0,
  1826 + mal, &dcr_read_mal, &dcr_write_mal);
  1827 + ppc_dcr_register(env, MAL0_RCBS1,
  1828 + mal, &dcr_read_mal, &dcr_write_mal);
1849 1829 }
1850 1830  
1851 1831 /*****************************************************************************/
... ... @@ -2170,31 +2150,29 @@ static void ppc405cr_cpc_init (CPUState *env, clk_setup_t clk_setup[7],
2170 2150 ppc405cr_cpc_t *cpc;
2171 2151  
2172 2152 cpc = qemu_mallocz(sizeof(ppc405cr_cpc_t));
2173   - if (cpc != NULL) {
2174   - memcpy(cpc->clk_setup, clk_setup,
2175   - PPC405CR_CLK_NB * sizeof(clk_setup_t));
2176   - cpc->sysclk = sysclk;
2177   - cpc->jtagid = 0x42051049;
2178   - ppc_dcr_register(env, PPC405CR_CPC0_PSR, cpc,
2179   - &dcr_read_crcpc, &dcr_write_crcpc);
2180   - ppc_dcr_register(env, PPC405CR_CPC0_CR0, cpc,
2181   - &dcr_read_crcpc, &dcr_write_crcpc);
2182   - ppc_dcr_register(env, PPC405CR_CPC0_CR1, cpc,
2183   - &dcr_read_crcpc, &dcr_write_crcpc);
2184   - ppc_dcr_register(env, PPC405CR_CPC0_JTAGID, cpc,
2185   - &dcr_read_crcpc, &dcr_write_crcpc);
2186   - ppc_dcr_register(env, PPC405CR_CPC0_PLLMR, cpc,
2187   - &dcr_read_crcpc, &dcr_write_crcpc);
2188   - ppc_dcr_register(env, PPC405CR_CPC0_ER, cpc,
2189   - &dcr_read_crcpc, &dcr_write_crcpc);
2190   - ppc_dcr_register(env, PPC405CR_CPC0_FR, cpc,
2191   - &dcr_read_crcpc, &dcr_write_crcpc);
2192   - ppc_dcr_register(env, PPC405CR_CPC0_SR, cpc,
2193   - &dcr_read_crcpc, &dcr_write_crcpc);
2194   - ppc405cr_clk_init(cpc);
2195   - qemu_register_reset(ppc405cr_cpc_reset, cpc);
2196   - ppc405cr_cpc_reset(cpc);
2197   - }
  2153 + memcpy(cpc->clk_setup, clk_setup,
  2154 + PPC405CR_CLK_NB * sizeof(clk_setup_t));
  2155 + cpc->sysclk = sysclk;
  2156 + cpc->jtagid = 0x42051049;
  2157 + ppc_dcr_register(env, PPC405CR_CPC0_PSR, cpc,
  2158 + &dcr_read_crcpc, &dcr_write_crcpc);
  2159 + ppc_dcr_register(env, PPC405CR_CPC0_CR0, cpc,
  2160 + &dcr_read_crcpc, &dcr_write_crcpc);
  2161 + ppc_dcr_register(env, PPC405CR_CPC0_CR1, cpc,
  2162 + &dcr_read_crcpc, &dcr_write_crcpc);
  2163 + ppc_dcr_register(env, PPC405CR_CPC0_JTAGID, cpc,
  2164 + &dcr_read_crcpc, &dcr_write_crcpc);
  2165 + ppc_dcr_register(env, PPC405CR_CPC0_PLLMR, cpc,
  2166 + &dcr_read_crcpc, &dcr_write_crcpc);
  2167 + ppc_dcr_register(env, PPC405CR_CPC0_ER, cpc,
  2168 + &dcr_read_crcpc, &dcr_write_crcpc);
  2169 + ppc_dcr_register(env, PPC405CR_CPC0_FR, cpc,
  2170 + &dcr_read_crcpc, &dcr_write_crcpc);
  2171 + ppc_dcr_register(env, PPC405CR_CPC0_SR, cpc,
  2172 + &dcr_read_crcpc, &dcr_write_crcpc);
  2173 + ppc405cr_clk_init(cpc);
  2174 + qemu_register_reset(ppc405cr_cpc_reset, cpc);
  2175 + ppc405cr_cpc_reset(cpc);
2198 2176 }
2199 2177  
2200 2178 CPUState *ppc405cr_init (target_phys_addr_t ram_bases[4],
... ... @@ -2516,38 +2494,36 @@ static void ppc405ep_cpc_init (CPUState *env, clk_setup_t clk_setup[8],
2516 2494 ppc405ep_cpc_t *cpc;
2517 2495  
2518 2496 cpc = qemu_mallocz(sizeof(ppc405ep_cpc_t));
2519   - if (cpc != NULL) {
2520   - memcpy(cpc->clk_setup, clk_setup,
2521   - PPC405EP_CLK_NB * sizeof(clk_setup_t));
2522   - cpc->jtagid = 0x20267049;
2523   - cpc->sysclk = sysclk;
2524   - ppc405ep_cpc_reset(cpc);
2525   - qemu_register_reset(&ppc405ep_cpc_reset, cpc);
2526   - ppc_dcr_register(env, PPC405EP_CPC0_BOOT, cpc,
2527   - &dcr_read_epcpc, &dcr_write_epcpc);
2528   - ppc_dcr_register(env, PPC405EP_CPC0_EPCTL, cpc,
2529   - &dcr_read_epcpc, &dcr_write_epcpc);
2530   - ppc_dcr_register(env, PPC405EP_CPC0_PLLMR0, cpc,
2531   - &dcr_read_epcpc, &dcr_write_epcpc);
2532   - ppc_dcr_register(env, PPC405EP_CPC0_PLLMR1, cpc,
2533   - &dcr_read_epcpc, &dcr_write_epcpc);
2534   - ppc_dcr_register(env, PPC405EP_CPC0_UCR, cpc,
2535   - &dcr_read_epcpc, &dcr_write_epcpc);
2536   - ppc_dcr_register(env, PPC405EP_CPC0_SRR, cpc,
2537   - &dcr_read_epcpc, &dcr_write_epcpc);
2538   - ppc_dcr_register(env, PPC405EP_CPC0_JTAGID, cpc,
2539   - &dcr_read_epcpc, &dcr_write_epcpc);
2540   - ppc_dcr_register(env, PPC405EP_CPC0_PCI, cpc,
2541   - &dcr_read_epcpc, &dcr_write_epcpc);
  2497 + memcpy(cpc->clk_setup, clk_setup,
  2498 + PPC405EP_CLK_NB * sizeof(clk_setup_t));
  2499 + cpc->jtagid = 0x20267049;
  2500 + cpc->sysclk = sysclk;
  2501 + ppc405ep_cpc_reset(cpc);
  2502 + qemu_register_reset(&ppc405ep_cpc_reset, cpc);
  2503 + ppc_dcr_register(env, PPC405EP_CPC0_BOOT, cpc,
  2504 + &dcr_read_epcpc, &dcr_write_epcpc);
  2505 + ppc_dcr_register(env, PPC405EP_CPC0_EPCTL, cpc,
  2506 + &dcr_read_epcpc, &dcr_write_epcpc);
  2507 + ppc_dcr_register(env, PPC405EP_CPC0_PLLMR0, cpc,
  2508 + &dcr_read_epcpc, &dcr_write_epcpc);
  2509 + ppc_dcr_register(env, PPC405EP_CPC0_PLLMR1, cpc,
  2510 + &dcr_read_epcpc, &dcr_write_epcpc);
  2511 + ppc_dcr_register(env, PPC405EP_CPC0_UCR, cpc,
  2512 + &dcr_read_epcpc, &dcr_write_epcpc);
  2513 + ppc_dcr_register(env, PPC405EP_CPC0_SRR, cpc,
  2514 + &dcr_read_epcpc, &dcr_write_epcpc);
  2515 + ppc_dcr_register(env, PPC405EP_CPC0_JTAGID, cpc,
  2516 + &dcr_read_epcpc, &dcr_write_epcpc);
  2517 + ppc_dcr_register(env, PPC405EP_CPC0_PCI, cpc,
  2518 + &dcr_read_epcpc, &dcr_write_epcpc);
2542 2519 #if 0
2543   - ppc_dcr_register(env, PPC405EP_CPC0_ER, cpc,
2544   - &dcr_read_epcpc, &dcr_write_epcpc);
2545   - ppc_dcr_register(env, PPC405EP_CPC0_FR, cpc,
2546   - &dcr_read_epcpc, &dcr_write_epcpc);
2547   - ppc_dcr_register(env, PPC405EP_CPC0_SR, cpc,
2548   - &dcr_read_epcpc, &dcr_write_epcpc);
  2520 + ppc_dcr_register(env, PPC405EP_CPC0_ER, cpc,
  2521 + &dcr_read_epcpc, &dcr_write_epcpc);
  2522 + ppc_dcr_register(env, PPC405EP_CPC0_FR, cpc,
  2523 + &dcr_read_epcpc, &dcr_write_epcpc);
  2524 + ppc_dcr_register(env, PPC405EP_CPC0_SR, cpc,
  2525 + &dcr_read_epcpc, &dcr_write_epcpc);
2549 2526 #endif
2550   - }
2551 2527 }
2552 2528  
2553 2529 CPUState *ppc405ep_init (target_phys_addr_t ram_bases[2],
... ...
hw/ppc440_bamboo.c
  View file @487414f
... ... @@ -42,8 +42,6 @@ static void *bamboo_load_device_tree(void *addr,
42 42  
43 43 pathlen = snprintf(NULL, 0, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE) + 1;
44 44 path = qemu_malloc(pathlen);
45   - if (path == NULL)
46   - return NULL;
47 45  
48 46 snprintf(path, pathlen, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE);
49 47  
... ...
hw/ppc4xx_devs.c
  View file @487414f
... ... @@ -246,18 +246,16 @@ ppc4xx_mmio_t *ppc4xx_mmio_init (CPUState *env, target_phys_addr_t base)
246 246 int mmio_memory;
247 247  
248 248 mmio = qemu_mallocz(sizeof(ppc4xx_mmio_t));
249   - if (mmio != NULL) {
250   - mmio->base = base;
251   - mmio_memory = cpu_register_io_memory(0, mmio_read, mmio_write, mmio);
  249 + mmio->base = base;
  250 + mmio_memory = cpu_register_io_memory(0, mmio_read, mmio_write, mmio);
252 251 #if defined(DEBUG_MMIO)
253   - printf("%s: base " PADDRX " len %08x %d\n", __func__,
254   - base, TARGET_PAGE_SIZE, mmio_memory);
  252 + printf("%s: base " PADDRX " len %08x %d\n", __func__,
  253 + base, TARGET_PAGE_SIZE, mmio_memory);
255 254 #endif
256   - cpu_register_physical_memory(base, TARGET_PAGE_SIZE, mmio_memory);
257   - ppc4xx_mmio_register(env, mmio, 0, TARGET_PAGE_SIZE,
258   - unassigned_mmio_read, unassigned_mmio_write,
259   - mmio);
260   - }
  255 + cpu_register_physical_memory(base, TARGET_PAGE_SIZE, mmio_memory);
  256 + ppc4xx_mmio_register(env, mmio, 0, TARGET_PAGE_SIZE,
  257 + unassigned_mmio_read, unassigned_mmio_write,
  258 + mmio);
261 259  
262 260 return mmio;
263 261 }
... ... @@ -492,18 +490,16 @@ qemu_irq *ppcuic_init (CPUState *env, qemu_irq *irqs,
492 490 int i;
493 491  
494 492 uic = qemu_mallocz(sizeof(ppcuic_t));
495   - if (uic != NULL) {
496   - uic->dcr_base = dcr_base;
497   - uic->irqs = irqs;
498   - if (has_vr)
499   - uic->use_vectors = 1;
500   - for (i = 0; i < DCR_UICMAX; i++) {
501   - ppc_dcr_register(env, dcr_base + i, uic,
502   - &dcr_read_uic, &dcr_write_uic);
503   - }
504   - qemu_register_reset(ppcuic_reset, uic);
505   - ppcuic_reset(uic);
  493 + uic->dcr_base = dcr_base;
  494 + uic->irqs = irqs;
  495 + if (has_vr)
  496 + uic->use_vectors = 1;
  497 + for (i = 0; i < DCR_UICMAX; i++) {
  498 + ppc_dcr_register(env, dcr_base + i, uic,
  499 + &dcr_read_uic, &dcr_write_uic);
506 500 }
  501 + qemu_register_reset(ppcuic_reset, uic);
  502 + ppcuic_reset(uic);
507 503  
508 504 return qemu_allocate_irqs(&ppcuic_set_irq, uic, UIC_MAX_IRQ);
509 505 }
... ... @@ -829,24 +825,22 @@ void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
829 825 ppc4xx_sdram_t *sdram;
830 826  
831 827 sdram = qemu_mallocz(sizeof(ppc4xx_sdram_t));
832   - if (sdram != NULL) {
833   - sdram->irq = irq;
834   - sdram->nbanks = nbanks;
835   - memset(sdram->ram_bases, 0, 4 * sizeof(target_phys_addr_t));
836   - memcpy(sdram->ram_bases, ram_bases,
837   - nbanks * sizeof(target_phys_addr_t));
838   - memset(sdram->ram_sizes, 0, 4 * sizeof(target_phys_addr_t));
839   - memcpy(sdram->ram_sizes, ram_sizes,
840   - nbanks * sizeof(target_phys_addr_t));
841   - sdram_reset(sdram);
842   - qemu_register_reset(&sdram_reset, sdram);
843   - ppc_dcr_register(env, SDRAM0_CFGADDR,
844   - sdram, &dcr_read_sdram, &dcr_write_sdram);
845   - ppc_dcr_register(env, SDRAM0_CFGDATA,
846   - sdram, &dcr_read_sdram, &dcr_write_sdram);
847   - if (do_init)
848   - sdram_map_bcr(sdram);
849   - }
  828 + sdram->irq = irq;
  829 + sdram->nbanks = nbanks;
  830 + memset(sdram->ram_bases, 0, 4 * sizeof(target_phys_addr_t));
  831 + memcpy(sdram->ram_bases, ram_bases,
  832 + nbanks * sizeof(target_phys_addr_t));
  833 + memset(sdram->ram_sizes, 0, 4 * sizeof(target_phys_addr_t));
  834 + memcpy(sdram->ram_sizes, ram_sizes,
  835 + nbanks * sizeof(target_phys_addr_t));
  836 + sdram_reset(sdram);
  837 + qemu_register_reset(&sdram_reset, sdram);
  838 + ppc_dcr_register(env, SDRAM0_CFGADDR,
  839 + sdram, &dcr_read_sdram, &dcr_write_sdram);
  840 + ppc_dcr_register(env, SDRAM0_CFGDATA,
  841 + sdram, &dcr_read_sdram, &dcr_write_sdram);
  842 + if (do_init)
  843 + sdram_map_bcr(sdram);
850 844 }
851 845  
852 846 /* Fill in consecutive SDRAM banks with 'ram_size' bytes of memory.
... ...
hw/ppc4xx_pci.c
  View file @487414f
... ... @@ -369,8 +369,6 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
369 369 uint8_t *pci_conf;
370 370  
371 371 controller = qemu_mallocz(sizeof(PPC4xxPCIState));
372   - if (!controller)
373   - return NULL;
374 372  
375 373 controller->pci_state.bus = pci_register_bus(ppc4xx_pci_set_irq,
376 374 ppc4xx_pci_map_irq,
... ...
hw/ppc_prep.c
  View file @487414f
... ... @@ -553,8 +553,6 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
553 553 BlockDriverState *fd[MAX_FD];
554 554  
555 555 sysctrl = qemu_mallocz(sizeof(sysctrl_t));
556   - if (sysctrl == NULL)
557   - return;
558 556  
559 557 linux_boot = (kernel_filename != NULL);
560 558  
... ...
hw/r2d.c
  View file @487414f
... ... @@ -170,8 +170,6 @@ static qemu_irq *r2d_fpga_init(target_phys_addr_t base, qemu_irq irl)
170 170 r2d_fpga_t *s;
171 171  
172 172 s = qemu_mallocz(sizeof(r2d_fpga_t));
173   - if (!s)
174   - return NULL;
175 173  
176 174 s->irl = irl;
177 175  
... ...
hw/rc4030.c
  View file @487414f
... ... @@ -718,8 +718,6 @@ qemu_irq *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
718 718 int s_chipset, s_jazzio;
719 719  
720 720 s = qemu_mallocz(sizeof(rc4030State));
721   - if (!s)
722   - return NULL;
723 721  
724 722 *dmas = rc4030_allocate_dmas(s, 4);
725 723 *dma_read = rc4030_dma_read;
... ...
hw/sb16.c
  View file @487414f
... ... @@ -1411,11 +1411,6 @@ int SB16_init (AudioState *audio, qemu_irq *pic)
1411 1411 }
1412 1412  
1413 1413 s = qemu_mallocz (sizeof (*s));
1414   - if (!s) {
1415   - dolog ("Could not allocate memory for SB16 (%zu bytes)\n",
1416   - sizeof (*s));
1417   - return -1;
1418   - }
1419 1414  
1420 1415 s->cmd = -1;
1421 1416 s->pic = pic;
... ...
hw/sbi.c
  View file @487414f
... ... @@ -146,8 +146,6 @@ void *sbi_init(target_phys_addr_t addr, qemu_irq **irq, qemu_irq **cpu_irq,
146 146 SBIState *s;
147 147  
148 148 s = qemu_mallocz(sizeof(SBIState));
149   - if (!s)
150   - return NULL;
151 149  
152 150 for (i = 0; i < MAX_CPUS; i++) {
153 151 s->cpu_irqs[i] = parent_irq[i];
... ...
hw/serial.c
  View file @487414f
... ... @@ -732,8 +732,6 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
732 732 SerialState *s;
733 733  
734 734 s = qemu_mallocz(sizeof(SerialState));
735   - if (!s)
736   - return NULL;
737 735  
738 736 serial_init_core(s, irq, baudbase, chr);
739 737  
... ... @@ -824,8 +822,6 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
824 822 int s_io_memory;
825 823  
826 824 s = qemu_mallocz(sizeof(SerialState));
827   - if (!s)
828   - return NULL;
829 825  
830 826 s->it_shift = it_shift;
831 827  
... ...
hw/sh_intc.c
  View file @487414f
... ... @@ -432,9 +432,7 @@ int sh_intc_init(struct intc_desc *desc,
432 432 desc->nr_prio_regs = nr_prio_regs;
433 433  
434 434 i = sizeof(struct intc_source) * nr_sources;
435   - desc->sources = malloc(i);
436   - if (!desc->sources)
437   - return -1;
  435 + desc->sources = qemu_malloc(i);
438 436  
439 437 memset(desc->sources, 0, i);
440 438 for (i = 0; i < desc->nr_sources; i++) {
... ...
hw/sh_serial.c
  View file @487414f
... ... @@ -376,8 +376,6 @@ void sh_serial_init (target_phys_addr_t base, int feat,
376 376 int s_io_memory;
377 377  
378 378 s = qemu_mallocz(sizeof(sh_serial_state));
379   - if (!s)
380   - return;
381 379  
382 380 s->feat = feat;
383 381 s->flags = SH_SERIAL_FLAG_TEND | SH_SERIAL_FLAG_TDE;
... ...
hw/slavio_intctl.c
  View file @487414f
... ... @@ -381,14 +381,10 @@ void *slavio_intctl_init(target_phys_addr_t addr, target_phys_addr_t addrg,
381 381 SLAVIO_CPUINTCTLState *slave;
382 382  
383 383 s = qemu_mallocz(sizeof(SLAVIO_INTCTLState));
384   - if (!s)
385   - return NULL;
386 384  
387 385 s->intbit_to_level = intbit_to_level;
388 386 for (i = 0; i < MAX_CPUS; i++) {
389 387 slave = qemu_mallocz(sizeof(SLAVIO_CPUINTCTLState));
390   - if (!slave)
391   - return NULL;
392 388  
393 389 slave->cpu = i;
394 390 slave->master = s;
... ...
hw/slavio_misc.c
  View file @487414f
... ... @@ -446,8 +446,6 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
446 446 MiscState *s;
447 447  
448 448 s = qemu_mallocz(sizeof(MiscState));
449   - if (!s)
450   - return NULL;
451 449  
452 450 if (base) {
453 451 /* 8 bit registers */
... ...
hw/slavio_timer.c
  View file @487414f
... ... @@ -372,8 +372,6 @@ static SLAVIO_TIMERState *slavio_timer_init(target_phys_addr_t addr,
372 372 QEMUBH *bh;
373 373  
374 374 s = qemu_mallocz(sizeof(SLAVIO_TIMERState));
375   - if (!s)
376   - return s;
377 375 s->irq = irq;
378 376 s->master = master;
379 377 s->slave_index = slave_index;
... ...
hw/sparc32_dma.c
  View file @487414f
... ... @@ -248,8 +248,6 @@ void *sparc32_dma_init(target_phys_addr_t daddr, qemu_irq parent_irq,
248 248 int dma_io_memory;
249 249  
250 250 s = qemu_mallocz(sizeof(DMAState));
251   - if (!s)
252   - return NULL;
253 251  
254 252 s->irq = parent_irq;
255 253 s->iommu = iommu;
... ...
hw/sun4c_intctl.c
  View file @487414f
... ... @@ -204,8 +204,6 @@ void *sun4c_intctl_init(target_phys_addr_t addr, qemu_irq **irq,
204 204 Sun4c_INTCTLState *s;
205 205  
206 206 s = qemu_mallocz(sizeof(Sun4c_INTCTLState));
207   - if (!s)
208   - return NULL;
209 207  
210 208 sun4c_intctl_io_memory = cpu_register_io_memory(0, sun4c_intctl_mem_read,
211 209 sun4c_intctl_mem_write, s);
... ...
hw/tcx.c
  View file @487414f
... ... @@ -499,8 +499,6 @@ void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
499 499 int size;
500 500  
501 501 s = qemu_mallocz(sizeof(TCXState));
502   - if (!s)
503   - return;
504 502 s->addr = addr;
505 503 s->vram_offset = vram_offset;
506 504 s->width = width;
... ...
hw/usb-bt.c
  View file @487414f
... ... @@ -625,8 +625,6 @@ USBDevice *usb_bt_init(HCIInfo *hci)
625 625 if (!hci)
626 626 return NULL;
627 627 s = qemu_mallocz(sizeof(struct USBBtState));
628   - if (!s)
629   - return NULL;
630 628 s->dev.opaque = s;
631 629 s->dev.speed = USB_SPEED_HIGH;
632 630 s->dev.handle_packet = usb_generic_handle_packet;
... ...
hw/usb-hid.c
  View file @487414f
... ... @@ -851,8 +851,6 @@ USBDevice *usb_tablet_init(void)
851 851 USBHIDState *s;
852 852  
853 853 s = qemu_mallocz(sizeof(USBHIDState));
854   - if (!s)
855   - return NULL;
856 854 s->dev.speed = USB_SPEED_FULL;
857 855 s->dev.handle_packet = usb_generic_handle_packet;
858 856  
... ... @@ -874,8 +872,6 @@ USBDevice *usb_mouse_init(void)
874 872 USBHIDState *s;
875 873  
876 874 s = qemu_mallocz(sizeof(USBHIDState));
877   - if (!s)
878   - return NULL;
879 875 s->dev.speed = USB_SPEED_FULL;
880 876 s->dev.handle_packet = usb_generic_handle_packet;
881 877  
... ... @@ -897,8 +893,6 @@ USBDevice *usb_keyboard_init(void)
897 893 USBHIDState *s;
898 894  
899 895 s = qemu_mallocz(sizeof(USBHIDState));
900   - if (!s)
901   - return NULL;
902 896 s->dev.speed = USB_SPEED_FULL;
903 897 s->dev.handle_packet = usb_generic_handle_packet;
904 898  
... ...
hw/usb-hub.c
  View file @487414f
... ... @@ -530,8 +530,6 @@ USBDevice *usb_hub_init(int nb_ports)
530 530 if (nb_ports > MAX_PORTS)
531 531 return NULL;
532 532 s = qemu_mallocz(sizeof(USBHubState));
533   - if (!s)
534   - return NULL;
535 533 s->dev.speed = USB_SPEED_FULL;
536 534 s->dev.handle_packet = usb_hub_handle_packet;
537 535  
... ...
hw/usb-msd.c
  View file @487414f
... ... @@ -548,8 +548,6 @@ USBDevice *usb_msd_init(const char *filename)
548 548 }
549 549  
550 550 s = qemu_mallocz(sizeof(MSDState));
551   - if (!s)
552   - return NULL;
553 551  
554 552 bdrv = bdrv_new("usb");
555 553 if (bdrv_open2(bdrv, filename, 0, drv) < 0)
... ...
hw/usb-net.c
  View file @487414f
... ... @@ -1430,8 +1430,6 @@ USBDevice *usb_net_init(NICInfo *nd)
1430 1430 USBNetState *s;
1431 1431  
1432 1432 s = qemu_mallocz(sizeof(USBNetState));
1433   - if (!s)
1434   - return NULL;
1435 1433 s->dev.speed = USB_SPEED_FULL;
1436 1434 s->dev.handle_packet = usb_generic_handle_packet;
1437 1435  
... ...
hw/usb-serial.c
  View file @487414f
... ... @@ -554,8 +554,6 @@ USBDevice *usb_serial_init(const char *filename)
554 554 }
555 555 filename++;
556 556 s = qemu_mallocz(sizeof(USBSerialState));
557   - if (!s)
558   - return NULL;
559 557  
560 558 snprintf(label, sizeof(label), "usbserial%d", index++);
561 559 cdrv = qemu_chr_open(label, filename, NULL);
... ...
hw/usb-uhci.c
  View file @487414f
... ... @@ -155,14 +155,13 @@ typedef struct UHCI_QH {
155 155 static UHCIAsync *uhci_async_alloc(UHCIState *s)
156 156 {
157 157 UHCIAsync *async = qemu_malloc(sizeof(UHCIAsync));
158   - if (async) {
159   - memset(&async->packet, 0, sizeof(async->packet));
160   - async->valid = 0;
161   - async->td = 0;
162   - async->token = 0;
163   - async->done = 0;
164   - async->next = NULL;
165   - }
  158 +
  159 + memset(&async->packet, 0, sizeof(async->packet));
  160 + async->valid = 0;
  161 + async->td = 0;
  162 + async->token = 0;
  163 + async->done = 0;
  164 + async->next = NULL;
166 165  
167 166 return async;
168 167 }
... ...
hw/usb-wacom.c
  View file @487414f
... ... @@ -397,8 +397,6 @@ USBDevice *usb_wacom_init(void)
397 397 USBWacomState *s;
398 398  
399 399 s = qemu_mallocz(sizeof(USBWacomState));
400   - if (!s)
401   - return NULL;
402 400 s->dev.speed = USB_SPEED_FULL;
403 401 s->dev.handle_packet = usb_generic_handle_packet;
404 402  
... ...
hw/versatilepb.c
  View file @487414f
... ... @@ -135,8 +135,6 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq)
135 135 int iomemtype;
136 136  
137 137 s = (vpb_sic_state *)qemu_mallocz(sizeof(vpb_sic_state));
138   - if (!s)
139   - return NULL;
140 138 qi = qemu_allocate_irqs(vpb_sic_set_irq, s, 32);
141 139 s->parent = parent;
142 140 s->irq = irq;
... ...
hw/vga.c
  View file @487414f
... ... @@ -2444,8 +2444,6 @@ int isa_vga_init(uint8_t *vga_ram_base,
2444 2444 VGAState *s;
2445 2445  
2446 2446 s = qemu_mallocz(sizeof(VGAState));
2447   - if (!s)
2448   - return -1;
2449 2447  
2450 2448 vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
2451 2449 vga_init(s);
... ... @@ -2469,8 +2467,6 @@ int isa_vga_mm_init(uint8_t *vga_ram_base,
2469 2467 VGAState *s;
2470 2468  
2471 2469 s = qemu_mallocz(sizeof(VGAState));
2472   - if (!s)
2473   - return -1;
2474 2470  
2475 2471 vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
2476 2472 vga_mm_init(s, vram_base, ctrl_base, it_shift);
... ...
hw/virtio-blk.c
  View file @487414f
... ... @@ -104,8 +104,7 @@ static void virtio_blk_rw_complete(void *opaque, int ret)
104 104 static VirtIOBlockReq *virtio_blk_alloc_request(VirtIOBlock *s)
105 105 {
106 106 VirtIOBlockReq *req = qemu_mallocz(sizeof(*req));
107   - if (req != NULL)
108   - req->dev = s;
  107 + req->dev = s;
109 108 return req;
110 109 }
111 110  
... ...
hw/virtio.c
  View file @487414f
... ... @@ -447,8 +447,7 @@ int virtqueue_pop(VirtQueue *vq, VirtQueueElement *elem)
447 447 sg->iov_len = 2 << 20;
448 448  
449 449 sg->iov_base = qemu_malloc(sg->iov_len);
450   - if (sg->iov_base &&
451   - !(vring_desc_flags(vq, i) & VRING_DESC_F_WRITE)) {
  450 + if (!(vring_desc_flags(vq, i) & VRING_DESC_F_WRITE)) {
452 451 cpu_physical_memory_read(vring_desc_addr(vq, i),
453 452 sg->iov_base,
454 453 sg->iov_len);
... ...
hw/vmmouse.c
  View file @487414f
... ... @@ -275,8 +275,6 @@ void *vmmouse_init(void *m)
275 275 DPRINTF("vmmouse_init\n");
276 276  
277 277 s = qemu_mallocz(sizeof(VMMouseState));
278   - if (!s)
279   - return NULL;
280 278  
281 279 s->status = 0xffff;
282 280 s->ps2_mouse = m;
... ...