Commit b3ceef24f4fee8d5ed96b8c4a5d3e80c0a651f0b
1 parent
46525e1f
Rename variables and rearrange code to please gcc -Wshadow checks
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3023 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
3 changed files
with
32 additions
and
29 deletions
hw/slavio_serial.c
... | ... | @@ -354,7 +354,7 @@ static void slavio_serial_update_parameters(ChannelState *s) |
354 | 354 | |
355 | 355 | static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
356 | 356 | { |
357 | - SerialState *ser = opaque; | |
357 | + SerialState *serial = opaque; | |
358 | 358 | ChannelState *s; |
359 | 359 | uint32_t saddr; |
360 | 360 | int newreg, channel; |
... | ... | @@ -362,7 +362,7 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint |
362 | 362 | val &= 0xff; |
363 | 363 | saddr = (addr & 3) >> 1; |
364 | 364 | channel = (addr & SERIAL_MAXADDR) >> 2; |
365 | - s = &ser->chn[channel]; | |
365 | + s = &serial->chn[channel]; | |
366 | 366 | switch (saddr) { |
367 | 367 | case 0: |
368 | 368 | SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, val & 0xff); |
... | ... | @@ -407,13 +407,13 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint |
407 | 407 | default: |
408 | 408 | break; |
409 | 409 | case 0x40: |
410 | - slavio_serial_reset_chn(&ser->chn[1]); | |
410 | + slavio_serial_reset_chn(&serial->chn[1]); | |
411 | 411 | return; |
412 | 412 | case 0x80: |
413 | - slavio_serial_reset_chn(&ser->chn[0]); | |
413 | + slavio_serial_reset_chn(&serial->chn[0]); | |
414 | 414 | return; |
415 | 415 | case 0xc0: |
416 | - slavio_serial_reset(ser); | |
416 | + slavio_serial_reset(serial); | |
417 | 417 | return; |
418 | 418 | } |
419 | 419 | break; |
... | ... | @@ -446,7 +446,7 @@ static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint |
446 | 446 | |
447 | 447 | static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr) |
448 | 448 | { |
449 | - SerialState *ser = opaque; | |
449 | + SerialState *serial = opaque; | |
450 | 450 | ChannelState *s; |
451 | 451 | uint32_t saddr; |
452 | 452 | uint32_t ret; |
... | ... | @@ -454,7 +454,7 @@ static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr) |
454 | 454 | |
455 | 455 | saddr = (addr & 3) >> 1; |
456 | 456 | channel = (addr & SERIAL_MAXADDR) >> 2; |
457 | - s = &ser->chn[channel]; | |
457 | + s = &serial->chn[channel]; | |
458 | 458 | switch (saddr) { |
459 | 459 | case 0: |
460 | 460 | SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", CHN_C(s), s->reg, s->rregs[s->reg]); | ... | ... |
hw/sun4m.c
... | ... | @@ -154,8 +154,6 @@ static void nvram_finish_partition (m48t59_t *nvram, uint32_t start, |
154 | 154 | m48t59_write(nvram, start + 1, sum & 0xff); |
155 | 155 | } |
156 | 156 | |
157 | -static m48t59_t *nvram; | |
158 | - | |
159 | 157 | extern int nographic; |
160 | 158 | |
161 | 159 | static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline, |
... | ... | @@ -292,13 +290,13 @@ static void secondary_cpu_reset(void *opaque) |
292 | 290 | env->halted = 1; |
293 | 291 | } |
294 | 292 | |
295 | -static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size, | |
296 | - DisplayState *ds, const char *cpu_model) | |
293 | +static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size, | |
294 | + DisplayState *ds, const char *cpu_model) | |
297 | 295 | |
298 | 296 | { |
299 | 297 | CPUState *env, *envs[MAX_CPUS]; |
300 | 298 | unsigned int i; |
301 | - void *iommu, *espdma, *ledma, *main_esp; | |
299 | + void *iommu, *espdma, *ledma, *main_esp, *nvram; | |
302 | 300 | const sparc_def_t *def; |
303 | 301 | qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq, |
304 | 302 | *espdma_irq, *ledma_irq; |
... | ... | @@ -328,7 +326,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size, |
328 | 326 | cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS); |
329 | 327 | |
330 | 328 | /* allocate RAM */ |
331 | - cpu_register_physical_memory(0, ram_size, 0); | |
329 | + cpu_register_physical_memory(0, RAM_size, 0); | |
332 | 330 | |
333 | 331 | iommu = iommu_init(hwdef->iommu_base); |
334 | 332 | slavio_intctl = slavio_intctl_init(hwdef->intctl_base, |
... | ... | @@ -347,7 +345,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size, |
347 | 345 | fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth); |
348 | 346 | exit (1); |
349 | 347 | } |
350 | - tcx_init(ds, hwdef->tcx_base, phys_ram_base + ram_size, ram_size, | |
348 | + tcx_init(ds, hwdef->tcx_base, phys_ram_base + RAM_size, RAM_size, | |
351 | 349 | hwdef->vram_size, graphic_width, graphic_height, graphic_depth); |
352 | 350 | |
353 | 351 | if (nd_table[0].model == NULL |
... | ... | @@ -388,13 +386,16 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size, |
388 | 386 | slavio_irq[hwdef->me_irq]); |
389 | 387 | if (hwdef->cs_base != (target_phys_addr_t)-1) |
390 | 388 | cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); |
389 | + | |
390 | + return nvram; | |
391 | 391 | } |
392 | 392 | |
393 | -static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device, | |
393 | +static void sun4m_load_kernel(long vram_size, int RAM_size, int boot_device, | |
394 | 394 | const char *kernel_filename, |
395 | 395 | const char *kernel_cmdline, |
396 | 396 | const char *initrd_filename, |
397 | - int machine_id) | |
397 | + int machine_id, | |
398 | + void *nvram) | |
398 | 399 | { |
399 | 400 | int ret, linux_boot; |
400 | 401 | char buf[1024]; |
... | ... | @@ -403,7 +404,7 @@ static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device, |
403 | 404 | |
404 | 405 | linux_boot = (kernel_filename != NULL); |
405 | 406 | |
406 | - prom_offset = ram_size + vram_size; | |
407 | + prom_offset = RAM_size + vram_size; | |
407 | 408 | cpu_register_physical_memory(PROM_ADDR, |
408 | 409 | (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK, |
409 | 410 | prom_offset | IO_MEM_ROM); |
... | ... | @@ -451,7 +452,7 @@ static void sun4m_load_kernel(long vram_size, int ram_size, int boot_device, |
451 | 452 | } |
452 | 453 | } |
453 | 454 | nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline, |
454 | - boot_device, ram_size, kernel_size, graphic_width, | |
455 | + boot_device, RAM_size, kernel_size, graphic_width, | |
455 | 456 | graphic_height, graphic_depth, machine_id); |
456 | 457 | } |
457 | 458 | |
... | ... | @@ -524,46 +525,48 @@ static const struct hwdef hwdefs[] = { |
524 | 525 | }, |
525 | 526 | }; |
526 | 527 | |
527 | -static void sun4m_common_init(int ram_size, int boot_device, DisplayState *ds, | |
528 | +static void sun4m_common_init(int RAM_size, int boot_device, DisplayState *ds, | |
528 | 529 | const char *kernel_filename, const char *kernel_cmdline, |
529 | 530 | const char *initrd_filename, const char *cpu_model, |
530 | 531 | unsigned int machine, int max_ram) |
531 | 532 | { |
532 | - if ((unsigned int)ram_size > (unsigned int)max_ram) { | |
533 | + void *nvram; | |
534 | + | |
535 | + if ((unsigned int)RAM_size > (unsigned int)max_ram) { | |
533 | 536 | fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n", |
534 | - (unsigned int)ram_size / (1024 * 1024), | |
537 | + (unsigned int)RAM_size / (1024 * 1024), | |
535 | 538 | (unsigned int)max_ram / (1024 * 1024)); |
536 | 539 | exit(1); |
537 | 540 | } |
538 | - sun4m_hw_init(&hwdefs[machine], ram_size, ds, cpu_model); | |
541 | + nvram = sun4m_hw_init(&hwdefs[machine], RAM_size, ds, cpu_model); | |
539 | 542 | |
540 | - sun4m_load_kernel(hwdefs[machine].vram_size, ram_size, boot_device, | |
543 | + sun4m_load_kernel(hwdefs[machine].vram_size, RAM_size, boot_device, | |
541 | 544 | kernel_filename, kernel_cmdline, initrd_filename, |
542 | - hwdefs[machine].machine_id); | |
545 | + hwdefs[machine].machine_id, nvram); | |
543 | 546 | } |
544 | 547 | |
545 | 548 | /* SPARCstation 5 hardware initialisation */ |
546 | -static void ss5_init(int ram_size, int vga_ram_size, int boot_device, | |
549 | +static void ss5_init(int RAM_size, int vga_ram_size, int boot_device, | |
547 | 550 | DisplayState *ds, const char **fd_filename, int snapshot, |
548 | 551 | const char *kernel_filename, const char *kernel_cmdline, |
549 | 552 | const char *initrd_filename, const char *cpu_model) |
550 | 553 | { |
551 | 554 | if (cpu_model == NULL) |
552 | 555 | cpu_model = "Fujitsu MB86904"; |
553 | - sun4m_common_init(ram_size, boot_device, ds, kernel_filename, | |
556 | + sun4m_common_init(RAM_size, boot_device, ds, kernel_filename, | |
554 | 557 | kernel_cmdline, initrd_filename, cpu_model, |
555 | 558 | 0, 0x10000000); |
556 | 559 | } |
557 | 560 | |
558 | 561 | /* SPARCstation 10 hardware initialisation */ |
559 | -static void ss10_init(int ram_size, int vga_ram_size, int boot_device, | |
562 | +static void ss10_init(int RAM_size, int vga_ram_size, int boot_device, | |
560 | 563 | DisplayState *ds, const char **fd_filename, int snapshot, |
561 | 564 | const char *kernel_filename, const char *kernel_cmdline, |
562 | 565 | const char *initrd_filename, const char *cpu_model) |
563 | 566 | { |
564 | 567 | if (cpu_model == NULL) |
565 | 568 | cpu_model = "TI SuperSparc II"; |
566 | - sun4m_common_init(ram_size, boot_device, ds, kernel_filename, | |
569 | + sun4m_common_init(RAM_size, boot_device, ds, kernel_filename, | |
567 | 570 | kernel_cmdline, initrd_filename, cpu_model, |
568 | 571 | 1, PROM_ADDR); // XXX prom overlap, actually first 4GB ok |
569 | 572 | } | ... | ... |
hw/tcx.c
... | ... | @@ -180,7 +180,7 @@ static void tcx_update_display(void *opaque) |
180 | 180 | ram_addr_t page, page_min, page_max; |
181 | 181 | int y, y_start, dd, ds; |
182 | 182 | uint8_t *d, *s; |
183 | - void (*f)(TCXState *s1, uint8_t *d, const uint8_t *s, int width); | |
183 | + void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width); | |
184 | 184 | |
185 | 185 | if (ts->ds->depth == 0) |
186 | 186 | return; | ... | ... |