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/*
* gdb server stub
*
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* Copyright ( c ) 2003 - 2005 Fabrice Bellard
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*
* This library is free software ; you can redistribute it and / or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation ; either
* version 2 of the License , or ( at your option ) any later version .
*
* This library is distributed in the hope that it will be useful ,
* but WITHOUT ANY WARRANTY ; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE . See the GNU
* Lesser General Public License for more details .
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library ; if not , write to the Free Software
* Foundation , Inc ., 59 Temple Place , Suite 330 , Boston , MA 02111 - 1307 USA
*/
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# include "config.h"
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# ifdef CONFIG_USER_ONLY
# include < stdlib . h >
# include < stdio . h >
# include < stdarg . h >
# include < string . h >
# include < errno . h >
# include < unistd . h >
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# include < fcntl . h >
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# include "qemu.h"
# else
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# include "vl.h"
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# endif
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# include "qemu_socket.h"
# ifdef _WIN32
/* XXX: these constants may be independent of the host ones even for Unix */
# ifndef SIGTRAP
# define SIGTRAP 5
# endif
# ifndef SIGINT
# define SIGINT 2
# endif
# else
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# include < signal . h >
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# endif
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// # define DEBUG_GDB
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enum RSState {
RS_IDLE ,
RS_GETLINE ,
RS_CHKSUM1 ,
RS_CHKSUM2 ,
};
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/* XXX: This is not thread safe. Do we care? */
static int gdbserver_fd = - 1 ;
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typedef struct GDBState {
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CPUState * env ; /* current CPU */
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enum RSState state ; /* parsing state */
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int fd ;
char line_buf [ 4096 ];
int line_buf_index ;
int line_csum ;
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# ifdef CONFIG_USER_ONLY
int running_state ;
# endif
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} GDBState ;
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# ifdef CONFIG_USER_ONLY
/* XXX: remove this hack. */
static GDBState gdbserver_state ;
# endif
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static int get_char ( GDBState * s )
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{
uint8_t ch ;
int ret ;
for (;;) {
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ret = recv ( s -> fd , & ch , 1 , 0 );
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if ( ret < 0 ) {
if ( errno != EINTR && errno != EAGAIN )
return - 1 ;
} else if ( ret == 0 ) {
return - 1 ;
} else {
break ;
}
}
return ch ;
}
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static void put_buffer ( GDBState * s , const uint8_t * buf , int len )
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{
int ret ;
while ( len > 0 ) {
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ret = send ( s -> fd , buf , len , 0 );
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if ( ret < 0 ) {
if ( errno != EINTR && errno != EAGAIN )
return ;
} else {
buf += ret ;
len -= ret ;
}
}
}
static inline int fromhex ( int v )
{
if ( v >= '0' && v <= '9' )
return v - '0' ;
else if ( v >= 'A' && v <= 'F' )
return v - 'A' + 10 ;
else if ( v >= 'a' && v <= 'f' )
return v - 'a' + 10 ;
else
return 0 ;
}
static inline int tohex ( int v )
{
if ( v < 10 )
return v + '0' ;
else
return v - 10 + 'a' ;
}
static void memtohex ( char * buf , const uint8_t * mem , int len )
{
int i , c ;
char * q ;
q = buf ;
for ( i = 0 ; i < len ; i ++ ) {
c = mem [ i ];
* q ++ = tohex ( c >> 4 );
* q ++ = tohex ( c & 0xf );
}
* q = '\0' ;
}
static void hextomem ( uint8_t * mem , const char * buf , int len )
{
int i ;
for ( i = 0 ; i < len ; i ++ ) {
mem [ i ] = ( fromhex ( buf [ 0 ]) << 4 ) | fromhex ( buf [ 1 ]);
buf += 2 ;
}
}
/* return -1 if error, 0 if OK */
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static int put_packet ( GDBState * s , char * buf )
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{
char buf1 [ 3 ];
int len , csum , ch , i ;
# ifdef DEBUG_GDB
printf ( "reply='%s' \n " , buf );
# endif
for (;;) {
buf1 [ 0 ] = '$' ;
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put_buffer ( s , buf1 , 1 );
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len = strlen ( buf );
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put_buffer ( s , buf , len );
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csum = 0 ;
for ( i = 0 ; i < len ; i ++ ) {
csum += buf [ i ];
}
buf1 [ 0 ] = '#' ;
buf1 [ 1 ] = tohex (( csum >> 4 ) & 0xf );
buf1 [ 2 ] = tohex (( csum ) & 0xf );
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put_buffer ( s , buf1 , 3 );
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ch = get_char ( s );
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if ( ch < 0 )
return - 1 ;
if ( ch == '+' )
break ;
}
return 0 ;
}
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# if defined ( TARGET_I386 )
static int cpu_gdb_read_registers ( CPUState * env , uint8_t * mem_buf )
{
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uint32_t * registers = ( uint32_t * ) mem_buf ;
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int i , fpus ;
for ( i = 0 ; i < 8 ; i ++ ) {
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registers [ i ] = env -> regs [ i ];
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}
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registers [ 8 ] = env -> eip ;
registers [ 9 ] = env -> eflags ;
registers [ 10 ] = env -> segs [ R_CS ]. selector ;
registers [ 11 ] = env -> segs [ R_SS ]. selector ;
registers [ 12 ] = env -> segs [ R_DS ]. selector ;
registers [ 13 ] = env -> segs [ R_ES ]. selector ;
registers [ 14 ] = env -> segs [ R_FS ]. selector ;
registers [ 15 ] = env -> segs [ R_GS ]. selector ;
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/* XXX: convert floats */
for ( i = 0 ; i < 8 ; i ++ ) {
memcpy ( mem_buf + 16 * 4 + i * 10 , & env -> fpregs [ i ], 10 );
}
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registers [ 36 ] = env -> fpuc ;
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fpus = ( env -> fpus & ~ 0x3800 ) | ( env -> fpstt & 0x7 ) << 11 ;
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registers [ 37 ] = fpus ;
registers [ 38 ] = 0 ; /* XXX: convert tags */
registers [ 39 ] = 0 ; /* fiseg */
registers [ 40 ] = 0 ; /* fioff */
registers [ 41 ] = 0 ; /* foseg */
registers [ 42 ] = 0 ; /* fooff */
registers [ 43 ] = 0 ; /* fop */
for ( i = 0 ; i < 16 ; i ++ )
tswapls ( & registers [ i ]);
for ( i = 36 ; i < 44 ; i ++ )
tswapls ( & registers [ i ]);
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return 44 * 4 ;
}
static void cpu_gdb_write_registers ( CPUState * env , uint8_t * mem_buf , int size )
{
uint32_t * registers = ( uint32_t * ) mem_buf ;
int i ;
for ( i = 0 ; i < 8 ; i ++ ) {
env -> regs [ i ] = tswapl ( registers [ i ]);
}
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env -> eip = tswapl ( registers [ 8 ]);
env -> eflags = tswapl ( registers [ 9 ]);
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# if defined ( CONFIG_USER_ONLY )
# define LOAD_SEG ( index , sreg ) \
if ( tswapl ( registers [ index ]) != env -> segs [ sreg ]. selector ) \
cpu_x86_load_seg ( env , sreg , tswapl ( registers [ index ]));
LOAD_SEG ( 10 , R_CS );
LOAD_SEG ( 11 , R_SS );
LOAD_SEG ( 12 , R_DS );
LOAD_SEG ( 13 , R_ES );
LOAD_SEG ( 14 , R_FS );
LOAD_SEG ( 15 , R_GS );
# endif
}
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# elif defined ( TARGET_PPC )
static int cpu_gdb_read_registers ( CPUState * env , uint8_t * mem_buf )
{
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uint32_t * registers = ( uint32_t * ) mem_buf , tmp ;
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int i ;
/* fill in gprs */
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for ( i = 0 ; i < 32 ; i ++ ) {
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registers [ i ] = tswapl ( env -> gpr [ i ]);
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}
/* fill in fprs */
for ( i = 0 ; i < 32 ; i ++ ) {
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registers [( i * 2 ) + 32 ] = tswapl ( * (( uint32_t * ) & env -> fpr [ i ]));
registers [( i * 2 ) + 33 ] = tswapl ( * (( uint32_t * ) & env -> fpr [ i ] + 1 ));
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}
/* nip, msr, ccr, lnk, ctr, xer, mq */
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registers [ 96 ] = tswapl ( env -> nip );
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registers [ 97 ] = tswapl ( do_load_msr ( env ));
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tmp = 0 ;
for ( i = 0 ; i < 8 ; i ++ )
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tmp |= env -> crf [ i ] << ( 32 - (( i + 1 ) * 4 ));
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registers [ 98 ] = tswapl ( tmp );
registers [ 99 ] = tswapl ( env -> lr );
registers [ 100 ] = tswapl ( env -> ctr );
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registers [ 101 ] = tswapl ( do_load_xer ( env ));
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registers [ 102 ] = 0 ;
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return 103 * 4 ;
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}
static void cpu_gdb_write_registers ( CPUState * env , uint8_t * mem_buf , int size )
{
uint32_t * registers = ( uint32_t * ) mem_buf ;
int i ;
/* fill in gprs */
for ( i = 0 ; i < 32 ; i ++ ) {
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env -> gpr [ i ] = tswapl ( registers [ i ]);
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}
/* fill in fprs */
for ( i = 0 ; i < 32 ; i ++ ) {
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* (( uint32_t * ) & env -> fpr [ i ]) = tswapl ( registers [( i * 2 ) + 32 ]);
* (( uint32_t * ) & env -> fpr [ i ] + 1 ) = tswapl ( registers [( i * 2 ) + 33 ]);
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}
/* nip, msr, ccr, lnk, ctr, xer, mq */
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env -> nip = tswapl ( registers [ 96 ]);
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do_store_msr ( env , tswapl ( registers [ 97 ]));
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registers [ 98 ] = tswapl ( registers [ 98 ]);
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for ( i = 0 ; i < 8 ; i ++ )
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env -> crf [ i ] = ( registers [ 98 ] >> ( 32 - (( i + 1 ) * 4 ))) & 0xF ;
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env -> lr = tswapl ( registers [ 99 ]);
env -> ctr = tswapl ( registers [ 100 ]);
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do_store_xer ( env , tswapl ( registers [ 101 ]));
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}
# elif defined ( TARGET_SPARC )
static int cpu_gdb_read_registers ( CPUState * env , uint8_t * mem_buf )
{
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target_ulong * registers = ( target_ulong * ) mem_buf ;
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int i ;
/* fill in g0..g7 */
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for ( i = 0 ; i < 8 ; i ++ ) {
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registers [ i ] = tswapl ( env -> gregs [ i ]);
}
/* fill in register window */
for ( i = 0 ; i < 24 ; i ++ ) {
registers [ i + 8 ] = tswapl ( env -> regwptr [ i ]);
}
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# ifndef TARGET_SPARC64
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/* fill in fprs */
for ( i = 0 ; i < 32 ; i ++ ) {
registers [ i + 32 ] = tswapl ( * (( uint32_t * ) & env -> fpr [ i ]));
}
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
registers [ 64 ] = tswapl ( env -> y );
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{
target_ulong tmp ;
tmp = GET_PSR ( env );
registers [ 65 ] = tswapl ( tmp );
}
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registers [ 66 ] = tswapl ( env -> wim );
registers [ 67 ] = tswapl ( env -> tbr );
registers [ 68 ] = tswapl ( env -> pc );
registers [ 69 ] = tswapl ( env -> npc );
registers [ 70 ] = tswapl ( env -> fsr );
registers [ 71 ] = 0 ; /* csr */
registers [ 72 ] = 0 ;
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return 73 * sizeof ( target_ulong );
# else
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/* fill in fprs */
for ( i = 0 ; i < 64 ; i += 2 ) {
uint64_t tmp ;
tmp = ( uint64_t ) tswap32 ( * (( uint32_t * ) & env -> fpr [ i ])) << 32 ;
tmp |= tswap32 ( * (( uint32_t * ) & env -> fpr [ i + 1 ]));
registers [ i / 2 + 32 ] = tmp ;
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}
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registers [ 64 ] = tswapl ( env -> pc );
registers [ 65 ] = tswapl ( env -> npc );
registers [ 66 ] = tswapl ( env -> tstate [ env -> tl ]);
registers [ 67 ] = tswapl ( env -> fsr );
registers [ 68 ] = tswapl ( env -> fprs );
registers [ 69 ] = tswapl ( env -> y );
return 70 * sizeof ( target_ulong );
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# endif
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}
static void cpu_gdb_write_registers ( CPUState * env , uint8_t * mem_buf , int size )
{
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target_ulong * registers = ( target_ulong * ) mem_buf ;
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int i ;
/* fill in g0..g7 */
for ( i = 0 ; i < 7 ; i ++ ) {
env -> gregs [ i ] = tswapl ( registers [ i ]);
}
/* fill in register window */
for ( i = 0 ; i < 24 ; i ++ ) {
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env -> regwptr [ i ] = tswapl ( registers [ i + 8 ]);
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}
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# ifndef TARGET_SPARC64
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/* fill in fprs */
for ( i = 0 ; i < 32 ; i ++ ) {
* (( uint32_t * ) & env -> fpr [ i ]) = tswapl ( registers [ i + 32 ]);
}
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
env -> y = tswapl ( registers [ 64 ]);
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PUT_PSR ( env , tswapl ( registers [ 65 ]));
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env -> wim = tswapl ( registers [ 66 ]);
env -> tbr = tswapl ( registers [ 67 ]);
env -> pc = tswapl ( registers [ 68 ]);
env -> npc = tswapl ( registers [ 69 ]);
env -> fsr = tswapl ( registers [ 70 ]);
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# else
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for ( i = 0 ; i < 64 ; i += 2 ) {
* (( uint32_t * ) & env -> fpr [ i ]) = tswap32 ( registers [ i / 2 + 32 ] >> 32 );
* (( uint32_t * ) & env -> fpr [ i + 1 ]) = tswap32 ( registers [ i / 2 + 32 ] & 0xffffffff );
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}
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env -> pc = tswapl ( registers [ 64 ]);
env -> npc = tswapl ( registers [ 65 ]);
env -> tstate [ env -> tl ] = tswapl ( registers [ 66 ]);
env -> fsr = tswapl ( registers [ 67 ]);
env -> fprs = tswapl ( registers [ 68 ]);
env -> y = tswapl ( registers [ 69 ]);
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# endif
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}
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# elif defined ( TARGET_ARM )
static int cpu_gdb_read_registers ( CPUState * env , uint8_t * mem_buf )
{
int i ;
uint8_t * ptr ;
ptr = mem_buf ;
/* 16 core integer registers (4 bytes each). */
for ( i = 0 ; i < 16 ; i ++ )
{
* ( uint32_t * ) ptr = tswapl ( env -> regs [ i ]);
ptr += 4 ;
}
/* 8 FPA registers ( 12 bytes each ), FPS ( 4 bytes ).
Not yet implemented . */
memset ( ptr , 0 , 8 * 12 + 4 );
ptr += 8 * 12 + 4 ;
/* CPSR (4 bytes). */
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* ( uint32_t * ) ptr = tswapl ( cpsr_read ( env ));
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ptr += 4 ;
return ptr - mem_buf ;
}
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static void cpu_gdb_write_registers ( CPUState * env , uint8_t * mem_buf , int size )
{
int i ;
uint8_t * ptr ;
ptr = mem_buf ;
/* Core integer registers. */
for ( i = 0 ; i < 16 ; i ++ )
{
env -> regs [ i ] = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
}
/* Ignore FPA regs and scr. */
ptr += 8 * 12 + 4 ;
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cpsr_write ( env , tswapl ( * ( uint32_t * ) ptr ), 0xffffffff );
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}
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# elif defined ( TARGET_M68K )
static int cpu_gdb_read_registers ( CPUState * env , uint8_t * mem_buf )
{
int i ;
uint8_t * ptr ;
CPU_DoubleU u ;
ptr = mem_buf ;
/* D0-D7 */
for ( i = 0 ; i < 8 ; i ++ ) {
* ( uint32_t * ) ptr = tswapl ( env -> dregs [ i ]);
ptr += 4 ;
}
/* A0-A7 */
for ( i = 0 ; i < 8 ; i ++ ) {
* ( uint32_t * ) ptr = tswapl ( env -> aregs [ i ]);
ptr += 4 ;
}
* ( uint32_t * ) ptr = tswapl ( env -> sr );
ptr += 4 ;
* ( uint32_t * ) ptr = tswapl ( env -> pc );
ptr += 4 ;
/* F0 - F7 . The 68881 / 68040 have 12 - bit extended precision registers .
ColdFire has 8 - bit double precision registers . */
for ( i = 0 ; i < 8 ; i ++ ) {
u . d = env -> fregs [ i ];
* ( uint32_t * ) ptr = tswap32 ( u . l . upper );
* ( uint32_t * ) ptr = tswap32 ( u . l . lower );
}
/* FP control regs (not implemented). */
memset ( ptr , 0 , 3 * 4 );
ptr += 3 * 4 ;
return ptr - mem_buf ;
}
static void cpu_gdb_write_registers ( CPUState * env , uint8_t * mem_buf , int size )
{
int i ;
uint8_t * ptr ;
CPU_DoubleU u ;
ptr = mem_buf ;
/* D0-D7 */
for ( i = 0 ; i < 8 ; i ++ ) {
env -> dregs [ i ] = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
}
/* A0-A7 */
for ( i = 0 ; i < 8 ; i ++ ) {
env -> aregs [ i ] = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
}
env -> sr = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
env -> pc = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
/* F0 - F7 . The 68881 / 68040 have 12 - bit extended precision registers .
ColdFire has 8 - bit double precision registers . */
for ( i = 0 ; i < 8 ; i ++ ) {
u . l . upper = tswap32 ( * ( uint32_t * ) ptr );
u . l . lower = tswap32 ( * ( uint32_t * ) ptr );
env -> fregs [ i ] = u . d ;
}
/* FP control regs (not implemented). */
ptr += 3 * 4 ;
}
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# elif defined ( TARGET_MIPS )
static int cpu_gdb_read_registers ( CPUState * env , uint8_t * mem_buf )
{
int i ;
uint8_t * ptr ;
ptr = mem_buf ;
for ( i = 0 ; i < 32 ; i ++ )
{
* ( uint32_t * ) ptr = tswapl ( env -> gpr [ i ]);
ptr += 4 ;
}
* ( uint32_t * ) ptr = tswapl ( env -> CP0_Status );
ptr += 4 ;
* ( uint32_t * ) ptr = tswapl ( env -> LO );
ptr += 4 ;
* ( uint32_t * ) ptr = tswapl ( env -> HI );
ptr += 4 ;
* ( uint32_t * ) ptr = tswapl ( env -> CP0_BadVAddr );
ptr += 4 ;
* ( uint32_t * ) ptr = tswapl ( env -> CP0_Cause );
ptr += 4 ;
* ( uint32_t * ) ptr = tswapl ( env -> PC );
ptr += 4 ;
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18 years ago
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# ifdef MIPS_USES_FPU
for ( i = 0 ; i < 32 ; i ++ )
{
* ( uint32_t * ) ptr = tswapl ( FPR_W ( env , i ));
ptr += 4 ;
}
* ( uint32_t * ) ptr = tswapl ( env -> fcr31 );
ptr += 4 ;
* ( uint32_t * ) ptr = tswapl ( env -> fcr0 );
ptr += 4 ;
# endif
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/* 32 FP registers, fsr, fir, fp. Not yet implemented. */
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18 years ago
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/* what's 'fp' mean here? */
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return ptr - mem_buf ;
}
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18 years ago
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/* convert MIPS rounding mode in FCR31 to IEEE library */
static unsigned int ieee_rm [] =
{
float_round_nearest_even ,
float_round_to_zero ,
float_round_up ,
float_round_down
};
# define RESTORE_ROUNDING_MODE \
set_float_rounding_mode ( ieee_rm [ env -> fcr31 & 3 ], & env -> fp_status )
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static void cpu_gdb_write_registers ( CPUState * env , uint8_t * mem_buf , int size )
{
int i ;
uint8_t * ptr ;
ptr = mem_buf ;
for ( i = 0 ; i < 32 ; i ++ )
{
env -> gpr [ i ] = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
}
env -> CP0_Status = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
env -> LO = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
env -> HI = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
env -> CP0_BadVAddr = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
env -> CP0_Cause = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
env -> PC = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
ths
authored
18 years ago
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
# ifdef MIPS_USES_FPU
for ( i = 0 ; i < 32 ; i ++ )
{
FPR_W ( env , i ) = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
}
env -> fcr31 = tswapl ( * ( uint32_t * ) ptr ) & 0x0183FFFF ;
ptr += 4 ;
env -> fcr0 = tswapl ( * ( uint32_t * ) ptr );
ptr += 4 ;
/* set rounding mode */
RESTORE_ROUNDING_MODE ;
# ifndef CONFIG_SOFTFLOAT
/* no floating point exception for native float */
SET_FP_ENABLE ( env -> fcr31 , 0 );
# endif
# endif
617
}
618
619
620
621
622
623
624
# elif defined ( TARGET_SH4 )
static int cpu_gdb_read_registers ( CPUState * env , uint8_t * mem_buf )
{
uint32_t * ptr = ( uint32_t * ) mem_buf ;
int i ;
# define SAVE ( x ) * ptr ++= tswapl ( x )
625
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627
628
629
630
if (( env -> sr & ( SR_MD | SR_RB )) == ( SR_MD | SR_RB )) {
for ( i = 0 ; i < 8 ; i ++ ) SAVE ( env -> gregs [ i + 16 ]);
} else {
for ( i = 0 ; i < 8 ; i ++ ) SAVE ( env -> gregs [ i ]);
}
for ( i = 8 ; i < 16 ; i ++ ) SAVE ( env -> gregs [ i ]);
631
632
633
634
635
636
637
638
639
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642
643
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646
647
648
649
650
651
652
SAVE ( env -> pc );
SAVE ( env -> pr );
SAVE ( env -> gbr );
SAVE ( env -> vbr );
SAVE ( env -> mach );
SAVE ( env -> macl );
SAVE ( env -> sr );
SAVE ( 0 ); /* TICKS */
SAVE ( 0 ); /* STALLS */
SAVE ( 0 ); /* CYCLES */
SAVE ( 0 ); /* INSTS */
SAVE ( 0 ); /* PLR */
return (( uint8_t * ) ptr - mem_buf );
}
static void cpu_gdb_write_registers ( CPUState * env , uint8_t * mem_buf , int size )
{
uint32_t * ptr = ( uint32_t * ) mem_buf ;
int i ;
# define LOAD ( x ) ( x ) =* ptr ++ ;
653
654
655
656
657
658
if (( env -> sr & ( SR_MD | SR_RB )) == ( SR_MD | SR_RB )) {
for ( i = 0 ; i < 8 ; i ++ ) LOAD ( env -> gregs [ i + 16 ]);
} else {
for ( i = 0 ; i < 8 ; i ++ ) LOAD ( env -> gregs [ i ]);
}
for ( i = 8 ; i < 16 ; i ++ ) LOAD ( env -> gregs [ i ]);
659
660
661
662
663
664
665
666
LOAD ( env -> pc );
LOAD ( env -> pr );
LOAD ( env -> gbr );
LOAD ( env -> vbr );
LOAD ( env -> mach );
LOAD ( env -> macl );
LOAD ( env -> sr );
}
667
# else
668
669
670
671
672
673
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675
676
677
static int cpu_gdb_read_registers ( CPUState * env , uint8_t * mem_buf )
{
return 0 ;
}
static void cpu_gdb_write_registers ( CPUState * env , uint8_t * mem_buf , int size )
{
}
# endif
678
679
static int gdb_handle_packet ( GDBState * s , CPUState * env , const char * line_buf )
680
681
{
const char * p ;
682
int ch , reg_size , type ;
683
684
685
char buf [ 4096 ];
uint8_t mem_buf [ 2000 ];
uint32_t * registers ;
686
target_ulong addr , len ;
687
688
689
690
691
692
693
694
# ifdef DEBUG_GDB
printf ( "command='%s' \n " , line_buf );
# endif
p = line_buf ;
ch = * p ++ ;
switch ( ch ) {
case '?' :
695
/* TODO: Make this return the correct value for user-mode. */
696
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698
699
700
snprintf ( buf , sizeof ( buf ), "S%02x" , SIGTRAP );
put_packet ( s , buf );
break ;
case 'c' :
if ( * p != '\0' ) {
701
addr = strtoull ( p , ( char ** ) & p , 16 );
702
# if defined ( TARGET_I386 )
703
env -> eip = addr ;
704
# elif defined ( TARGET_PPC )
705
env -> nip = addr ;
706
707
708
# elif defined ( TARGET_SPARC )
env -> pc = addr ;
env -> npc = addr + 4 ;
709
710
# elif defined ( TARGET_ARM )
env -> regs [ 15 ] = addr ;
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712
# elif defined ( TARGET_SH4 )
env -> pc = addr ;
713
# endif
714
}
715
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717
718
719
720
# ifdef CONFIG_USER_ONLY
s -> running_state = 1 ;
# else
vm_start ();
# endif
return RS_IDLE ;
721
722
723
case 's' :
if ( * p != '\0' ) {
addr = strtoul ( p , ( char ** ) & p , 16 );
724
# if defined ( TARGET_I386 )
725
env -> eip = addr ;
726
# elif defined ( TARGET_PPC )
727
env -> nip = addr ;
728
729
730
# elif defined ( TARGET_SPARC )
env -> pc = addr ;
env -> npc = addr + 4 ;
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732
# elif defined ( TARGET_ARM )
env -> regs [ 15 ] = addr ;
733
734
# elif defined ( TARGET_SH4 )
env -> pc = addr ;
735
# endif
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737
}
cpu_single_step ( env , 1 );
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741
742
743
# ifdef CONFIG_USER_ONLY
s -> running_state = 1 ;
# else
vm_start ();
# endif
return RS_IDLE ;
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748
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756
case 'g' :
reg_size = cpu_gdb_read_registers ( env , mem_buf );
memtohex ( buf , mem_buf , reg_size );
put_packet ( s , buf );
break ;
case 'G' :
registers = ( void * ) mem_buf ;
len = strlen ( p ) / 2 ;
hextomem (( uint8_t * ) registers , p , len );
cpu_gdb_write_registers ( env , mem_buf , len );
put_packet ( s , "OK" );
break ;
case 'm' :
757
addr = strtoull ( p , ( char ** ) & p , 16 );
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759
if ( * p == ',' )
p ++ ;
760
len = strtoull ( p , NULL , 16 );
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764
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766
if ( cpu_memory_rw_debug ( env , addr , mem_buf , len , 0 ) != 0 ) {
put_packet ( s , "E14" );
} else {
memtohex ( buf , mem_buf , len );
put_packet ( s , buf );
}
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768
break ;
case 'M' :
769
addr = strtoull ( p , ( char ** ) & p , 16 );
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771
if ( * p == ',' )
p ++ ;
772
len = strtoull ( p , ( char ** ) & p , 16 );
773
if ( * p == ':' )
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776
p ++ ;
hextomem ( mem_buf , p , len );
if ( cpu_memory_rw_debug ( env , addr , mem_buf , len , 1 ) != 0 )
777
put_packet ( s , "E14" );
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779
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else
put_packet ( s , "OK" );
break ;
case 'Z' :
type = strtoul ( p , ( char ** ) & p , 16 );
if ( * p == ',' )
p ++ ;
785
addr = strtoull ( p , ( char ** ) & p , 16 );
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787
if ( * p == ',' )
p ++ ;
788
len = strtoull ( p , ( char ** ) & p , 16 );
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790
791
792
793
794
if ( type == 0 || type == 1 ) {
if ( cpu_breakpoint_insert ( env , addr ) < 0 )
goto breakpoint_error ;
put_packet ( s , "OK" );
} else {
breakpoint_error :
795
put_packet ( s , "E22" );
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801
}
break ;
case 'z' :
type = strtoul ( p , ( char ** ) & p , 16 );
if ( * p == ',' )
p ++ ;
802
addr = strtoull ( p , ( char ** ) & p , 16 );
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804
if ( * p == ',' )
p ++ ;
805
len = strtoull ( p , ( char ** ) & p , 16 );
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809
810
811
812
if ( type == 0 || type == 1 ) {
cpu_breakpoint_remove ( env , addr );
put_packet ( s , "OK" );
} else {
goto breakpoint_error ;
}
break ;
ths
authored
18 years ago
813
# ifdef CONFIG_LINUX_USER
814
815
816
817
818
819
820
821
822
823
824
case 'q' :
if ( strncmp ( p , "Offsets" , 7 ) == 0 ) {
TaskState * ts = env -> opaque ;
sprintf ( buf , "Text=%x;Data=%x;Bss=%x" , ts -> info -> code_offset ,
ts -> info -> data_offset , ts -> info -> data_offset );
put_packet ( s , buf );
break ;
}
/* Fall through. */
# endif
825
826
827
828
829
830
831
832
833
834
default :
// unknown_command :
/* put empty packet */
buf [ 0 ] = '\0' ;
put_packet ( s , buf );
break ;
}
return RS_IDLE ;
}
835
836
extern void tb_flush ( CPUState * env );
837
# ifndef CONFIG_USER_ONLY
838
839
840
841
842
843
844
static void gdb_vm_stopped ( void * opaque , int reason )
{
GDBState * s = opaque ;
char buf [ 256 ];
int ret ;
/* disable single step if it was enable */
845
cpu_single_step ( s -> env , 0 );
846
847
if ( reason == EXCP_DEBUG ) {
848
tb_flush ( s -> env );
849
ret = SIGTRAP ;
850
851
852
} else if ( reason == EXCP_INTERRUPT ) {
ret = SIGINT ;
} else {
853
ret = 0 ;
854
}
855
856
857
snprintf ( buf , sizeof ( buf ), "S%02x" , ret );
put_packet ( s , buf );
}
858
# endif
859
860
static void gdb_read_byte ( GDBState * s , int ch )
861
{
862
CPUState * env = s -> env ;
863
864
865
int i , csum ;
char reply [ 1 ];
866
# ifndef CONFIG_USER_ONLY
867
868
869
870
if ( vm_running ) {
/* when the CPU is running , we cannot do anything except stop
it when receiving a char */
vm_stop ( EXCP_INTERRUPT );
871
} else
872
# endif
873
{
874
875
876
877
878
switch ( s -> state ) {
case RS_IDLE :
if ( ch == '$' ) {
s -> line_buf_index = 0 ;
s -> state = RS_GETLINE ;
879
}
880
break ;
881
882
883
884
885
case RS_GETLINE :
if ( ch == '#' ) {
s -> state = RS_CHKSUM1 ;
} else if ( s -> line_buf_index >= sizeof ( s -> line_buf ) - 1 ) {
s -> state = RS_IDLE ;
886
} else {
887
s -> line_buf [ s -> line_buf_index ++ ] = ch ;
888
889
}
break ;
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
case RS_CHKSUM1 :
s -> line_buf [ s -> line_buf_index ] = '\0' ;
s -> line_csum = fromhex ( ch ) << 4 ;
s -> state = RS_CHKSUM2 ;
break ;
case RS_CHKSUM2 :
s -> line_csum |= fromhex ( ch );
csum = 0 ;
for ( i = 0 ; i < s -> line_buf_index ; i ++ ) {
csum += s -> line_buf [ i ];
}
if ( s -> line_csum != ( csum & 0xff )) {
reply [ 0 ] = '-' ;
put_buffer ( s , reply , 1 );
s -> state = RS_IDLE ;
905
} else {
906
907
reply [ 0 ] = '+' ;
put_buffer ( s , reply , 1 );
908
s -> state = gdb_handle_packet ( s , env , s -> line_buf );
909
910
}
break ;
911
912
913
914
}
}
}
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
# ifdef CONFIG_USER_ONLY
int
gdb_handlesig ( CPUState * env , int sig )
{
GDBState * s ;
char buf [ 256 ];
int n ;
if ( gdbserver_fd < 0 )
return sig ;
s = & gdbserver_state ;
/* disable single step if it was enabled */
cpu_single_step ( env , 0 );
tb_flush ( env );
if ( sig != 0 )
{
snprintf ( buf , sizeof ( buf ), "S%02x" , sig );
put_packet ( s , buf );
}
sig = 0 ;
s -> state = RS_IDLE ;
940
941
s -> running_state = 0 ;
while ( s -> running_state == 0 ) {
942
943
944
945
946
947
n = read ( s -> fd , buf , 256 );
if ( n > 0 )
{
int i ;
for ( i = 0 ; i < n ; i ++ )
948
gdb_read_byte ( s , buf [ i ]);
949
950
951
952
953
954
955
}
else if ( n == 0 || errno != EAGAIN )
{
/* XXX : Connection closed . Should probably wait for annother
connection before continuing . */
return sig ;
}
956
}
957
958
return sig ;
}
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
/* Tell the remote gdb that the process has exited. */
void gdb_exit ( CPUState * env , int code )
{
GDBState * s ;
char buf [ 4 ];
if ( gdbserver_fd < 0 )
return ;
s = & gdbserver_state ;
snprintf ( buf , sizeof ( buf ), "W%02x" , code );
put_packet ( s , buf );
}
975
# else
976
static void gdb_read ( void * opaque )
977
978
{
GDBState * s = opaque ;
979
980
981
int i , size ;
uint8_t buf [ 4096 ];
982
size = recv ( s -> fd , buf , sizeof ( buf ), 0 );
983
984
if ( size < 0 )
return ;
985
986
987
if ( size == 0 ) {
/* end of connection */
qemu_del_vm_stop_handler ( gdb_vm_stopped , s );
988
qemu_set_fd_handler ( s -> fd , NULL , NULL , NULL );
989
qemu_free ( s );
990
991
if ( autostart )
vm_start ();
992
993
} else {
for ( i = 0 ; i < size ; i ++ )
994
gdb_read_byte ( s , buf [ i ]);
995
996
997
}
}
998
999
# endif
1000
static void gdb_accept ( void * opaque )
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
{
GDBState * s ;
struct sockaddr_in sockaddr ;
socklen_t len ;
int val , fd ;
for (;;) {
len = sizeof ( sockaddr );
fd = accept ( gdbserver_fd , ( struct sockaddr * ) & sockaddr , & len );
if ( fd < 0 && errno != EINTR ) {
perror ( "accept" );
return ;
} else if ( fd >= 0 ) {
1014
1015
1016
break ;
}
}
1017
1018
1019
/* set short latency */
val = 1 ;
1020
setsockopt ( fd , IPPROTO_TCP , TCP_NODELAY , ( char * ) & val , sizeof ( val ));
1021
1022
1023
1024
1025
# ifdef CONFIG_USER_ONLY
s = & gdbserver_state ;
memset ( s , 0 , sizeof ( GDBState ));
# else
1026
1027
1028
1029
1030
s = qemu_mallocz ( sizeof ( GDBState ));
if ( ! s ) {
close ( fd );
return ;
}
1031
# endif
1032
s -> env = first_cpu ; /* XXX: allow to change CPU */
1033
1034
s -> fd = fd ;
1035
# ifdef CONFIG_USER_ONLY
1036
fcntl ( fd , F_SETFL , O_NONBLOCK );
1037
1038
# else
socket_set_nonblock ( fd );
1039
1040
1041
1042
1043
/* stop the VM */
vm_stop ( EXCP_INTERRUPT );
/* start handling I/O */
1044
qemu_set_fd_handler ( s -> fd , gdb_read , NULL , s );
1045
1046
/* when the VM is stopped, the following callback is called */
qemu_add_vm_stop_handler ( gdb_vm_stopped , s );
1047
# endif
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
}
static int gdbserver_open ( int port )
{
struct sockaddr_in sockaddr ;
int fd , val , ret ;
fd = socket ( PF_INET , SOCK_STREAM , 0 );
if ( fd < 0 ) {
perror ( "socket" );
return - 1 ;
}
/* allow fast reuse */
val = 1 ;
1063
setsockopt ( fd , SOL_SOCKET , SO_REUSEADDR , ( char * ) & val , sizeof ( val ));
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
sockaddr . sin_family = AF_INET ;
sockaddr . sin_port = htons ( port );
sockaddr . sin_addr . s_addr = 0 ;
ret = bind ( fd , ( struct sockaddr * ) & sockaddr , sizeof ( sockaddr ));
if ( ret < 0 ) {
perror ( "bind" );
return - 1 ;
}
ret = listen ( fd , 0 );
if ( ret < 0 ) {
perror ( "listen" );
return - 1 ;
}
1078
# ifndef CONFIG_USER_ONLY
1079
socket_set_nonblock ( fd );
1080
# endif
1081
1082
1083
1084
1085
1086
1087
1088
1089
return fd ;
}
int gdbserver_start ( int port )
{
gdbserver_fd = gdbserver_open ( port );
if ( gdbserver_fd < 0 )
return - 1 ;
/* accept connections */
1090
# ifdef CONFIG_USER_ONLY
1091
gdb_accept ( NULL );
1092
# else
1093
qemu_set_fd_handler ( gdbserver_fd , gdb_accept , NULL , NULL );
1094
# endif
1095
1096
return 0 ;
}