gwj / at91sam9263 · Commits

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2541 c046a42c-6fe2-441c-8c8c-71466251a162

Carlos O'Donell.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2540 c046a42c-6fe2-441c-8c8c-71466251a162

handled. By Carlos O'Donell.


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which implemented only MIPS32R1. Thanks to Stefan Weil to insist he's
right on that. :-)


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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2531 c046a42c-6fe2-441c-8c8c-71466251a162

PowerPC 64 fixes.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2530 c046a42c-6fe2-441c-8c8c-71466251a162

and GPR ones, as the lengths can be different.


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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162

- add missing 64 bits rotate instructions
- safely define TARGET_PPCSPE when 64 bits registers are used
  a separate target will be needed to use it in 32 bits mode on 32 bits hosts.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2527 c046a42c-6fe2-441c-8c8c-71466251a162

- must clear carry bit when doing addic with a zero immediate value
- fix missing RETURN in micro-operation that would lead to random failures
  and crashes
- add USE_PRECISE_EMULATION compilation-time option to choose between
  getting exact floating point results and fast but less accurate computation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2526 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2525 c046a42c-6fe2-441c-8c8c-71466251a162

Win32 replacement of lockf should be used here.


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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2509 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2508 c046a42c-6fe2-441c-8c8c-71466251a162

Daniel P. Berrange.


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