gwj / at91sam9263 · Commits

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3334 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162

Use it at CPU initialisation time.


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Don't abort on illegal GPSR reads, instead only warn.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3324 c046a42c-6fe2-441c-8c8c-71466251a162

effect is implementation dependant.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3323 c046a42c-6fe2-441c-8c8c-71466251a162

* fix the tunable cache line size probe for PowerPC 970.
* initialize HID5 so cache line is 32 bytes long when running in user-mode only


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162

Implement dcbz tunable cache line size for PowerPC 970.
Make hardware reset vector implementation dependant.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3320 c046a42c-6fe2-441c-8c8c-71466251a162

Cleanups in MMU exceptions generation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3319 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3318 c046a42c-6fe2-441c-8c8c-71466251a162

reset must occur after we defined the CPU features.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3317 c046a42c-6fe2-441c-8c8c-71466251a162

Protect PowerPC 64 only features with #ifdef (TARGET_PPC64)


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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3315 c046a42c-6fe2-441c-8c8c-71466251a162

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3314 c046a42c-6fe2-441c-8c8c-71466251a162

Add comments in load & store tables to ease code reading.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3313 c046a42c-6fe2-441c-8c8c-71466251a162

on 32 bits hosts.


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exceptions from op helpers.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3308 c046a42c-6fe2-441c-8c8c-71466251a162

of supporting code.
Implement 74xx software TLB model.
Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss
  on those processors.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3307 c046a42c-6fe2-441c-8c8c-71466251a162

Tag unused functions with unused attribute instead of using #ifdef (TODO)
  to ease tests: just have to enable the implementation in the cpu_defs table.


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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3303 c046a42c-6fe2-441c-8c8c-71466251a162

call the helpers directly from the micro-ops.
Avoid duplicated code for tlbsx. implementation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3302 c046a42c-6fe2-441c-8c8c-71466251a162

Add comments about some unimplemented storage control dedicated SPRs.


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Fix critical input interrupt generation.


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