Commit e3a79bcadd9792c6efd4b7379fed026061bdfdbb
1 parent
045380be
Fix Debian serial console boot problem reported by Aurelien Jarno
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3883 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files
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15 additions
and
13 deletions
hw/slavio_intctl.c
... | ... | @@ -59,7 +59,7 @@ typedef struct SLAVIO_INTCTLState { |
59 | 59 | #endif |
60 | 60 | qemu_irq *cpu_irqs[MAX_CPUS]; |
61 | 61 | const uint32_t *intbit_to_level; |
62 | - uint32_t cputimer_bit; | |
62 | + uint32_t cputimer_lbit, cputimer_mbit; | |
63 | 63 | uint32_t pil_out[MAX_CPUS]; |
64 | 64 | } SLAVIO_INTCTLState; |
65 | 65 | |
... | ... | @@ -257,7 +257,6 @@ static void slavio_check_interrupts(void *opaque) |
257 | 257 | if (pending & (1 << j)) |
258 | 258 | pil_pending |= 1 << s->intbit_to_level[j]; |
259 | 259 | } |
260 | - pil_pending |= s->intreg_pending[i] & CPU_HARDIRQ_MASK; | |
261 | 260 | } |
262 | 261 | pil_pending |= (s->intreg_pending[i] & CPU_SOFTIRQ_MASK) >> 16; |
263 | 262 | |
... | ... | @@ -307,10 +306,13 @@ static void slavio_set_timer_irq_cpu(void *opaque, int cpu, int level) |
307 | 306 | |
308 | 307 | DPRINTF("Set cpu %d local timer level %d\n", cpu, level); |
309 | 308 | |
310 | - if (level) | |
311 | - s->intreg_pending[cpu] |= s->cputimer_bit; | |
312 | - else | |
313 | - s->intreg_pending[cpu] &= ~s->cputimer_bit; | |
309 | + if (level) { | |
310 | + s->intregm_pending |= s->cputimer_mbit; | |
311 | + s->intreg_pending[cpu] |= s->cputimer_lbit; | |
312 | + } else { | |
313 | + s->intregm_pending &= ~s->cputimer_mbit; | |
314 | + s->intreg_pending[cpu] &= ~s->cputimer_lbit; | |
315 | + } | |
314 | 316 | |
315 | 317 | slavio_check_interrupts(s); |
316 | 318 | } |
... | ... | @@ -388,7 +390,8 @@ void *slavio_intctl_init(target_phys_addr_t addr, target_phys_addr_t addrg, |
388 | 390 | *irq = qemu_allocate_irqs(slavio_set_irq, s, 32); |
389 | 391 | |
390 | 392 | *cpu_irq = qemu_allocate_irqs(slavio_set_timer_irq_cpu, s, MAX_CPUS); |
391 | - s->cputimer_bit = 1 << cputimer; | |
393 | + s->cputimer_mbit = 1 << cputimer; | |
394 | + s->cputimer_lbit = 1 << intbit_to_level[cputimer]; | |
392 | 395 | slavio_intctl_reset(s); |
393 | 396 | return s; |
394 | 397 | } | ... | ... |
hw/sun4m.c
... | ... | @@ -89,8 +89,7 @@ struct hwdef { |
89 | 89 | target_phys_addr_t sun4c_intctl_base, sun4c_counter_base; |
90 | 90 | long vram_size, nvram_size; |
91 | 91 | // IRQ numbers are not PIL ones, but master interrupt controller |
92 | - // register bit numbers except for clock_irq, which indexes cpu | |
93 | - // interrupt controller register | |
92 | + // register bit numbers | |
94 | 93 | int intctl_g_intr, esp_irq, le_irq, clock_irq, clock1_irq; |
95 | 94 | int ser_irq, ms_kb_irq, fd_irq, me_irq, cs_irq; |
96 | 95 | int machine_id; // For NVRAM |
... | ... | @@ -695,7 +694,7 @@ static const struct hwdef hwdefs[] = { |
695 | 694 | .nvram_size = 0x2000, |
696 | 695 | .esp_irq = 18, |
697 | 696 | .le_irq = 16, |
698 | - .clock_irq = 14, | |
697 | + .clock_irq = 7, | |
699 | 698 | .clock1_irq = 19, |
700 | 699 | .ms_kb_irq = 14, |
701 | 700 | .ser_irq = 15, |
... | ... | @@ -736,7 +735,7 @@ static const struct hwdef hwdefs[] = { |
736 | 735 | .nvram_size = 0x2000, |
737 | 736 | .esp_irq = 18, |
738 | 737 | .le_irq = 16, |
739 | - .clock_irq = 14, | |
738 | + .clock_irq = 7, | |
740 | 739 | .clock1_irq = 19, |
741 | 740 | .ms_kb_irq = 14, |
742 | 741 | .ser_irq = 15, |
... | ... | @@ -777,7 +776,7 @@ static const struct hwdef hwdefs[] = { |
777 | 776 | .nvram_size = 0x2000, |
778 | 777 | .esp_irq = 18, |
779 | 778 | .le_irq = 16, |
780 | - .clock_irq = 14, | |
779 | + .clock_irq = 7, | |
781 | 780 | .clock1_irq = 19, |
782 | 781 | .ms_kb_irq = 14, |
783 | 782 | .ser_irq = 15, |
... | ... | @@ -818,7 +817,7 @@ static const struct hwdef hwdefs[] = { |
818 | 817 | .nvram_size = 0x2000, |
819 | 818 | .esp_irq = 18, |
820 | 819 | .le_irq = 16, |
821 | - .clock_irq = 14, | |
820 | + .clock_irq = 7, | |
822 | 821 | .clock1_irq = 19, |
823 | 822 | .ms_kb_irq = 14, |
824 | 823 | .ser_irq = 15, | ... | ... |