Commit d07b4d0ea72311b619c0f3799d849957446b5761
1 parent
8d162c2b
Fix MXCC register 64 bit read word order (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
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4 additions
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4 deletions
target-sparc/op_helper.c
@@ -196,8 +196,8 @@ void helper_ld_asi(int asi, int size, int sign) | @@ -196,8 +196,8 @@ void helper_ld_asi(int asi, int size, int sign) | ||
196 | switch (T0) { | 196 | switch (T0) { |
197 | case 0x01c00a00: /* MXCC control register */ | 197 | case 0x01c00a00: /* MXCC control register */ |
198 | if (size == 8) { | 198 | if (size == 8) { |
199 | - ret = env->mxccregs[3]; | ||
200 | - T0 = env->mxccregs[3] >> 32; | 199 | + ret = env->mxccregs[3] >> 32; |
200 | + T0 = env->mxccregs[3]; | ||
201 | } else | 201 | } else |
202 | DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size); | 202 | DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size); |
203 | break; | 203 | break; |
@@ -217,8 +217,8 @@ void helper_ld_asi(int asi, int size, int sign) | @@ -217,8 +217,8 @@ void helper_ld_asi(int asi, int size, int sign) | ||
217 | break; | 217 | break; |
218 | case 0x01c00f00: /* MBus port address register */ | 218 | case 0x01c00f00: /* MBus port address register */ |
219 | if (size == 8) { | 219 | if (size == 8) { |
220 | - ret = env->mxccregs[7]; | ||
221 | - T0 = env->mxccregs[7] >> 32; | 220 | + ret = env->mxccregs[7] >> 32; |
221 | + T0 = env->mxccregs[7]; | ||
222 | } else | 222 | } else |
223 | DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size); | 223 | DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size); |
224 | break; | 224 | break; |