Commit d07b4d0ea72311b619c0f3799d849957446b5761

Authored by blueswir1
1 parent 8d162c2b

Fix MXCC register 64 bit read word order (Robert Reif)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 4 additions and 4 deletions
target-sparc/op_helper.c
... ... @@ -196,8 +196,8 @@ void helper_ld_asi(int asi, int size, int sign)
196 196 switch (T0) {
197 197 case 0x01c00a00: /* MXCC control register */
198 198 if (size == 8) {
199   - ret = env->mxccregs[3];
200   - T0 = env->mxccregs[3] >> 32;
  199 + ret = env->mxccregs[3] >> 32;
  200 + T0 = env->mxccregs[3];
201 201 } else
202 202 DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
203 203 break;
... ... @@ -217,8 +217,8 @@ void helper_ld_asi(int asi, int size, int sign)
217 217 break;
218 218 case 0x01c00f00: /* MBus port address register */
219 219 if (size == 8) {
220   - ret = env->mxccregs[7];
221   - T0 = env->mxccregs[7] >> 32;
  220 + ret = env->mxccregs[7] >> 32;
  221 + T0 = env->mxccregs[7];
222 222 } else
223 223 DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
224 224 break;
... ...