gwj / at91sam9263 · Commits

Commit f5dc2e5490a7c4784e023978b319a343c3d94361

Authored by Filip Navara
1 parent 88c1e3db

Replace gen_adc with gen_add_carry. 

Signed-off-by: Filip Navara <filip.navara@gmail.com>
Inline Side-by-side
Showing 1 changed file with 2 additions and 12 deletions
target-arm/translate.c
  View file @f5dc2e5
@@ -380,16 +380,6 @@ static inline void gen_logic_CC(TCGv var) @@ -380,16 +380,6 @@ static inline void gen_logic_CC(TCGv var)
380 tcg_gen_st_i32(var, cpu_env, offsetof(CPUState, ZF)); 380 tcg_gen_st_i32(var, cpu_env, offsetof(CPUState, ZF));
381 } 381 }
382 382
383 -/* T0 += T1 + CF. */  
384 -static void gen_adc(TCGv t0, TCGv t1)  
385 -{  
386 - TCGv tmp;  
387 - tcg_gen_add_i32(t0, t0, t1);  
388 - tmp = load_cpu_field(CF);  
389 - tcg_gen_add_i32(t0, t0, tmp);  
390 - dead_tmp(tmp);  
391 -}  
392 -  
393 /* dest = T0 + T1 + CF. */ 383 /* dest = T0 + T1 + CF. */
394 static void gen_add_carry(TCGv dest, TCGv t0, TCGv t1) 384 static void gen_add_carry(TCGv dest, TCGv t0, TCGv t1)
395 { 385 {
@@ -6995,7 +6985,7 @@ gen_thumb2_data_op(DisasContext *s, int op, int conds, uint32_t shifter_out, TCG @@ -6995,7 +6985,7 @@ gen_thumb2_data_op(DisasContext *s, int op, int conds, uint32_t shifter_out, TCG
6995 if (conds) 6985 if (conds)
6996 gen_helper_adc_cc(t0, t0, t1); 6986 gen_helper_adc_cc(t0, t0, t1);
6997 else 6987 else
6998 - gen_adc(t0, t1); 6988 + gen_add_carry(t0, t0, t1);
6999 break; 6989 break;
7000 case 11: /* sbc */ 6990 case 11: /* sbc */
7001 if (conds) 6991 if (conds)
@@ -8275,7 +8265,7 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s) @@ -8275,7 +8265,7 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s)
8275 break; 8265 break;
8276 case 0x5: /* adc */ 8266 case 0x5: /* adc */
8277 if (s->condexec_mask) 8267 if (s->condexec_mask)
8278 - gen_adc(tmp, tmp2); 8268 + gen_add_carry(tmp, tmp, tmp2);
8279 else 8269 else
8280 gen_helper_adc_cc(tmp, tmp, tmp2); 8270 gen_helper_adc_cc(tmp, tmp, tmp2);
8281 break; 8271 break;