gwj / at91sam9263 · Commits

Commit e6bb7d7efd76a8aeed5300e72481646e4d2b4d7e

Authored by ths
1 parent 27848470

Fix mov[tf].ps handling for MIPS, by Richard Sandiford. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4563 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 10 additions and 6 deletions
target-mips/op.c
  View file @e6bb7d7
@@ -1632,10 +1632,11 @@ FLOAT_OP(movf, s) @@ -1632,10 +1632,11 @@ FLOAT_OP(movf, s)
1632 } 1632 }
1633 FLOAT_OP(movf, ps) 1633 FLOAT_OP(movf, ps)
1634 { 1634 {
1635 - if (!(env->fpu->fcr31 & PARAM1)) { 1635 + unsigned int mask = GET_FP_COND (env->fpu) >> PARAM1;
  1636 + if (!(mask & 1))
1636 WT2 = WT0; 1637 WT2 = WT0;
  1638 + if (!(mask & 2))
1637 WTH2 = WTH0; 1639 WTH2 = WTH0;
1638 - }  
1639 DEBUG_FPU_STATE(); 1640 DEBUG_FPU_STATE();
1640 FORCE_RET(); 1641 FORCE_RET();
1641 } 1642 }
@@ -1655,10 +1656,11 @@ FLOAT_OP(movt, s) @@ -1655,10 +1656,11 @@ FLOAT_OP(movt, s)
1655 } 1656 }
1656 FLOAT_OP(movt, ps) 1657 FLOAT_OP(movt, ps)
1657 { 1658 {
1658 - if (env->fpu->fcr31 & PARAM1) { 1659 + unsigned int mask = GET_FP_COND (env->fpu) >> PARAM1;
  1660 + if (mask & 1)
1659 WT2 = WT0; 1661 WT2 = WT0;
  1662 + if (mask & 2)
1660 WTH2 = WTH0; 1663 WTH2 = WTH0;
1661 - }  
1662 DEBUG_FPU_STATE(); 1664 DEBUG_FPU_STATE();
1663 FORCE_RET(); 1665 FORCE_RET();
1664 } 1666 }
target-mips/translate.c
  View file @e6bb7d7
@@ -5594,7 +5594,6 @@ static void glue(gen_movcf_, fmt) (DisasContext *ctx, int cc, int tf) \ @@ -5594,7 +5594,6 @@ static void glue(gen_movcf_, fmt) (DisasContext *ctx, int cc, int tf) \
5594 } 5594 }
5595 GEN_MOVCF(d); 5595 GEN_MOVCF(d);
5596 GEN_MOVCF(s); 5596 GEN_MOVCF(s);
5597 -GEN_MOVCF(ps);  
5598 #undef GEN_MOVCF 5597 #undef GEN_MOVCF
5599 5598
5600 static void gen_farith (DisasContext *ctx, uint32_t op1, 5599 static void gen_farith (DisasContext *ctx, uint32_t op1,
@@ -6213,7 +6212,10 @@ static void gen_farith (DisasContext *ctx, uint32_t op1, @@ -6213,7 +6212,10 @@ static void gen_farith (DisasContext *ctx, uint32_t op1,
6213 GEN_LOAD_FREG_FTN(WTH0, fs); 6212 GEN_LOAD_FREG_FTN(WTH0, fs);
6214 GEN_LOAD_FREG_FTN(WT2, fd); 6213 GEN_LOAD_FREG_FTN(WT2, fd);
6215 GEN_LOAD_FREG_FTN(WTH2, fd); 6214 GEN_LOAD_FREG_FTN(WTH2, fd);
6216 - gen_movcf_ps(ctx, (ft >> 2) & 0x7, ft & 0x1); 6215 + if (ft & 0x1)
  6216 + gen_op_float_movt_ps ((ft >> 2) & 0x7);
  6217 + else
  6218 + gen_op_float_movf_ps ((ft >> 2) & 0x7);
6217 GEN_STORE_FTN_FREG(fd, WT2); 6219 GEN_STORE_FTN_FREG(fd, WT2);
6218 GEN_STORE_FTN_FREG(fd, WTH2); 6220 GEN_STORE_FTN_FREG(fd, WTH2);
6219 opn = "movcf.ps"; 6221 opn = "movcf.ps";