Commit e1f3808e03f73e7a7fa966afbed2455dd052202e
1 parent
3979144c
Convert m68k target to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4565 c046a42c-6fe2-441c-8c8c-71466251a162
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configure
| ... | ... | @@ -1237,10 +1237,8 @@ case "$target_cpu" in |
| 1237 | 1237 | ;; |
| 1238 | 1238 | m68k) |
| 1239 | 1239 | echo "TARGET_ARCH=m68k" >> $config_mak |
| 1240 | - echo "CONFIG_DYNGEN_OP=yes" >> $config_mak | |
| 1241 | 1240 | echo "#define TARGET_ARCH \"m68k\"" >> $config_h |
| 1242 | 1241 | echo "#define TARGET_M68K 1" >> $config_h |
| 1243 | - echo "#define CONFIG_DYNGEN_OP 1" >> $config_h | |
| 1244 | 1242 | bflt="yes" |
| 1245 | 1243 | ;; |
| 1246 | 1244 | mips|mipsel) | ... | ... |
target-m68k/cpu.h
| ... | ... | @@ -108,7 +108,7 @@ typedef struct CPUM68KState { |
| 108 | 108 | int exception_index; |
| 109 | 109 | int interrupt_request; |
| 110 | 110 | int user_mode_only; |
| 111 | - int halted; | |
| 111 | + uint32_t halted; | |
| 112 | 112 | |
| 113 | 113 | int pending_vector; |
| 114 | 114 | int pending_level; |
| ... | ... | @@ -120,6 +120,7 @@ typedef struct CPUM68KState { |
| 120 | 120 | uint32_t features; |
| 121 | 121 | } CPUM68KState; |
| 122 | 122 | |
| 123 | +void m68k_tcg_init(void); | |
| 123 | 124 | CPUM68KState *cpu_m68k_init(const char *cpu_model); |
| 124 | 125 | int cpu_m68k_exec(CPUM68KState *s); |
| 125 | 126 | void cpu_m68k_close(CPUM68KState *s); |
| ... | ... | @@ -141,9 +142,7 @@ enum { |
| 141 | 142 | CC_OP_CMPW, /* CC_DEST = result, CC_SRC = source */ |
| 142 | 143 | CC_OP_ADDX, /* CC_DEST = result, CC_SRC = source */ |
| 143 | 144 | CC_OP_SUBX, /* CC_DEST = result, CC_SRC = source */ |
| 144 | - CC_OP_SHL, /* CC_DEST = source, CC_SRC = shift */ | |
| 145 | - CC_OP_SHR, /* CC_DEST = source, CC_SRC = shift */ | |
| 146 | - CC_OP_SAR, /* CC_DEST = source, CC_SRC = shift */ | |
| 145 | + CC_OP_SHIFT, /* CC_DEST = result, CC_SRC = carry */ | |
| 147 | 146 | }; |
| 148 | 147 | |
| 149 | 148 | #define CCF_C 0x01 | ... | ... |
target-m68k/exec.h
| ... | ... | @@ -45,8 +45,6 @@ int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
| 45 | 45 | #endif |
| 46 | 46 | |
| 47 | 47 | void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op); |
| 48 | -float64 helper_sub_cmpf64(CPUM68KState *env, float64 src0, float64 src1); | |
| 49 | -void helper_movec(CPUM68KState *env, int reg, uint32_t val); | |
| 50 | 48 | |
| 51 | 49 | void cpu_loop_exit(void); |
| 52 | 50 | ... | ... |
target-m68k/helper.c
| ... | ... | @@ -27,6 +27,10 @@ |
| 27 | 27 | #include "exec-all.h" |
| 28 | 28 | #include "qemu-common.h" |
| 29 | 29 | |
| 30 | +#include "helpers.h" | |
| 31 | + | |
| 32 | +#define SIGNBIT (1u << 31) | |
| 33 | + | |
| 30 | 34 | enum m68k_cpuid { |
| 31 | 35 | M68K_CPUID_M5206, |
| 32 | 36 | M68K_CPUID_M5208, |
| ... | ... | @@ -121,11 +125,16 @@ void cpu_reset(CPUM68KState *env) |
| 121 | 125 | CPUM68KState *cpu_m68k_init(const char *cpu_model) |
| 122 | 126 | { |
| 123 | 127 | CPUM68KState *env; |
| 128 | + static int inited; | |
| 124 | 129 | |
| 125 | 130 | env = malloc(sizeof(CPUM68KState)); |
| 126 | 131 | if (!env) |
| 127 | 132 | return NULL; |
| 128 | 133 | cpu_exec_init(env); |
| 134 | + if (!inited) { | |
| 135 | + inited = 1; | |
| 136 | + m68k_tcg_init(); | |
| 137 | + } | |
| 129 | 138 | |
| 130 | 139 | env->cpu_model_str = cpu_model; |
| 131 | 140 | |
| ... | ... | @@ -211,34 +220,9 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op) |
| 211 | 220 | if (HIGHBIT & (tmp ^ dest) & (tmp ^ src)) |
| 212 | 221 | flags |= CCF_V; |
| 213 | 222 | break; |
| 214 | - case CC_OP_SHL: | |
| 215 | - if (src >= 32) { | |
| 216 | - SET_NZ(0); | |
| 217 | - } else { | |
| 218 | - tmp = dest << src; | |
| 219 | - SET_NZ(tmp); | |
| 220 | - } | |
| 221 | - if (src && src <= 32 && (dest & (1 << (32 - src)))) | |
| 222 | - flags |= CCF_C; | |
| 223 | - break; | |
| 224 | - case CC_OP_SHR: | |
| 225 | - if (src >= 32) { | |
| 226 | - SET_NZ(0); | |
| 227 | - } else { | |
| 228 | - tmp = dest >> src; | |
| 229 | - SET_NZ(tmp); | |
| 230 | - } | |
| 231 | - if (src && src <= 32 && ((dest >> (src - 1)) & 1)) | |
| 232 | - flags |= CCF_C; | |
| 233 | - break; | |
| 234 | - case CC_OP_SAR: | |
| 235 | - if (src >= 32) { | |
| 236 | - SET_NZ(-1); | |
| 237 | - } else { | |
| 238 | - tmp = (int32_t)dest >> src; | |
| 239 | - SET_NZ(tmp); | |
| 240 | - } | |
| 241 | - if (src && src <= 32 && (((int32_t)dest >> (src - 1)) & 1)) | |
| 223 | + case CC_OP_SHIFT: | |
| 224 | + SET_NZ(dest); | |
| 225 | + if (src) | |
| 242 | 226 | flags |= CCF_C; |
| 243 | 227 | break; |
| 244 | 228 | default: |
| ... | ... | @@ -248,25 +232,7 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op) |
| 248 | 232 | env->cc_dest = flags; |
| 249 | 233 | } |
| 250 | 234 | |
| 251 | -float64 helper_sub_cmpf64(CPUM68KState *env, float64 src0, float64 src1) | |
| 252 | -{ | |
| 253 | - /* ??? This may incorrectly raise exceptions. */ | |
| 254 | - /* ??? Should flush denormals to zero. */ | |
| 255 | - float64 res; | |
| 256 | - res = float64_sub(src0, src1, &env->fp_status); | |
| 257 | - if (float64_is_nan(res)) { | |
| 258 | - /* +/-inf compares equal against itself, but sub returns nan. */ | |
| 259 | - if (!float64_is_nan(src0) | |
| 260 | - && !float64_is_nan(src1)) { | |
| 261 | - res = float64_zero; | |
| 262 | - if (float64_lt_quiet(src0, res, &env->fp_status)) | |
| 263 | - res = float64_chs(res); | |
| 264 | - } | |
| 265 | - } | |
| 266 | - return res; | |
| 267 | -} | |
| 268 | - | |
| 269 | -void helper_movec(CPUM68KState *env, int reg, uint32_t val) | |
| 235 | +void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val) | |
| 270 | 236 | { |
| 271 | 237 | switch (reg) { |
| 272 | 238 | case 0x02: /* CACR */ |
| ... | ... | @@ -286,7 +252,7 @@ void helper_movec(CPUM68KState *env, int reg, uint32_t val) |
| 286 | 252 | } |
| 287 | 253 | } |
| 288 | 254 | |
| 289 | -void m68k_set_macsr(CPUM68KState *env, uint32_t val) | |
| 255 | +void HELPER(set_macsr)(CPUM68KState *env, uint32_t val) | |
| 290 | 256 | { |
| 291 | 257 | uint32_t acc; |
| 292 | 258 | int8_t exthigh; |
| ... | ... | @@ -376,3 +342,541 @@ void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector) |
| 376 | 342 | } |
| 377 | 343 | |
| 378 | 344 | #endif |
| 345 | + | |
| 346 | +uint32_t HELPER(bitrev)(uint32_t x) | |
| 347 | +{ | |
| 348 | + x = ((x >> 1) & 0x55555555u) | ((x << 1) & 0xaaaaaaaau); | |
| 349 | + x = ((x >> 2) & 0x33333333u) | ((x << 2) & 0xccccccccu); | |
| 350 | + x = ((x >> 4) & 0x0f0f0f0fu) | ((x << 4) & 0xf0f0f0f0u); | |
| 351 | + return bswap32(x); | |
| 352 | +} | |
| 353 | + | |
| 354 | +uint32_t HELPER(ff1)(uint32_t x) | |
| 355 | +{ | |
| 356 | + int n; | |
| 357 | + for (n = 32; x; n--) | |
| 358 | + x >>= 1; | |
| 359 | + return n; | |
| 360 | +} | |
| 361 | + | |
| 362 | +uint32_t HELPER(sats)(uint32_t val, uint32_t ccr) | |
| 363 | +{ | |
| 364 | + /* The result has the opposite sign to the original value. */ | |
| 365 | + if (ccr & CCF_V) | |
| 366 | + val = (((int32_t)val) >> 31) ^ SIGNBIT; | |
| 367 | + return val; | |
| 368 | +} | |
| 369 | + | |
| 370 | +uint32_t HELPER(subx_cc)(CPUState *env, uint32_t op1, uint32_t op2) | |
| 371 | +{ | |
| 372 | + uint32_t res; | |
| 373 | + uint32_t old_flags; | |
| 374 | + | |
| 375 | + old_flags = env->cc_dest; | |
| 376 | + if (env->cc_x) { | |
| 377 | + env->cc_x = (op1 <= op2); | |
| 378 | + env->cc_op = CC_OP_SUBX; | |
| 379 | + res = op1 - (op2 + 1); | |
| 380 | + } else { | |
| 381 | + env->cc_x = (op1 < op2); | |
| 382 | + env->cc_op = CC_OP_SUB; | |
| 383 | + res = op1 - op2; | |
| 384 | + } | |
| 385 | + env->cc_dest = res; | |
| 386 | + env->cc_src = op2; | |
| 387 | + cpu_m68k_flush_flags(env, env->cc_op); | |
| 388 | + /* !Z is sticky. */ | |
| 389 | + env->cc_dest &= (old_flags | ~CCF_Z); | |
| 390 | + return res; | |
| 391 | +} | |
| 392 | + | |
| 393 | +uint32_t HELPER(addx_cc)(CPUState *env, uint32_t op1, uint32_t op2) | |
| 394 | +{ | |
| 395 | + uint32_t res; | |
| 396 | + uint32_t old_flags; | |
| 397 | + | |
| 398 | + old_flags = env->cc_dest; | |
| 399 | + if (env->cc_x) { | |
| 400 | + res = op1 + op2 + 1; | |
| 401 | + env->cc_x = (res <= op2); | |
| 402 | + env->cc_op = CC_OP_ADDX; | |
| 403 | + } else { | |
| 404 | + res = op1 + op2; | |
| 405 | + env->cc_x = (res < op2); | |
| 406 | + env->cc_op = CC_OP_ADD; | |
| 407 | + } | |
| 408 | + env->cc_dest = res; | |
| 409 | + env->cc_src = op2; | |
| 410 | + cpu_m68k_flush_flags(env, env->cc_op); | |
| 411 | + /* !Z is sticky. */ | |
| 412 | + env->cc_dest &= (old_flags | ~CCF_Z); | |
| 413 | + return res; | |
| 414 | +} | |
| 415 | + | |
| 416 | +uint32_t HELPER(xflag_lt)(uint32_t a, uint32_t b) | |
| 417 | +{ | |
| 418 | + return a < b; | |
| 419 | +} | |
| 420 | + | |
| 421 | +uint32_t HELPER(btest)(uint32_t x) | |
| 422 | +{ | |
| 423 | + return x != 0; | |
| 424 | +} | |
| 425 | + | |
| 426 | +void HELPER(set_sr)(CPUState *env, uint32_t val) | |
| 427 | +{ | |
| 428 | + env->sr = val & 0xffff; | |
| 429 | + m68k_switch_sp(env); | |
| 430 | +} | |
| 431 | + | |
| 432 | +uint32_t HELPER(shl_cc)(CPUState *env, uint32_t val, uint32_t shift) | |
| 433 | +{ | |
| 434 | + uint32_t result; | |
| 435 | + uint32_t cf; | |
| 436 | + | |
| 437 | + shift &= 63; | |
| 438 | + if (shift == 0) { | |
| 439 | + result = val; | |
| 440 | + cf = env->cc_src & CCF_C; | |
| 441 | + } else if (shift < 32) { | |
| 442 | + result = val << shift; | |
| 443 | + cf = (val >> (32 - shift)) & 1; | |
| 444 | + } else if (shift == 32) { | |
| 445 | + result = 0; | |
| 446 | + cf = val & 1; | |
| 447 | + } else /* shift > 32 */ { | |
| 448 | + result = 0; | |
| 449 | + cf = 0; | |
| 450 | + } | |
| 451 | + env->cc_src = cf; | |
| 452 | + env->cc_x = (cf != 0); | |
| 453 | + env->cc_dest = result; | |
| 454 | + return result; | |
| 455 | +} | |
| 456 | + | |
| 457 | +uint32_t HELPER(shr_cc)(CPUState *env, uint32_t val, uint32_t shift) | |
| 458 | +{ | |
| 459 | + uint32_t result; | |
| 460 | + uint32_t cf; | |
| 461 | + | |
| 462 | + shift &= 63; | |
| 463 | + if (shift == 0) { | |
| 464 | + result = val; | |
| 465 | + cf = env->cc_src & CCF_C; | |
| 466 | + } else if (shift < 32) { | |
| 467 | + result = val >> shift; | |
| 468 | + cf = (val >> (shift - 1)) & 1; | |
| 469 | + } else if (shift == 32) { | |
| 470 | + result = 0; | |
| 471 | + cf = val >> 31; | |
| 472 | + } else /* shift > 32 */ { | |
| 473 | + result = 0; | |
| 474 | + cf = 0; | |
| 475 | + } | |
| 476 | + env->cc_src = cf; | |
| 477 | + env->cc_x = (cf != 0); | |
| 478 | + env->cc_dest = result; | |
| 479 | + return result; | |
| 480 | +} | |
| 481 | + | |
| 482 | +uint32_t HELPER(sar_cc)(CPUState *env, uint32_t val, uint32_t shift) | |
| 483 | +{ | |
| 484 | + uint32_t result; | |
| 485 | + uint32_t cf; | |
| 486 | + | |
| 487 | + shift &= 63; | |
| 488 | + if (shift == 0) { | |
| 489 | + result = val; | |
| 490 | + cf = (env->cc_src & CCF_C) != 0; | |
| 491 | + } else if (shift < 32) { | |
| 492 | + result = (int32_t)val >> shift; | |
| 493 | + cf = (val >> (shift - 1)) & 1; | |
| 494 | + } else /* shift >= 32 */ { | |
| 495 | + result = (int32_t)val >> 31; | |
| 496 | + cf = val >> 31; | |
| 497 | + } | |
| 498 | + env->cc_src = cf; | |
| 499 | + env->cc_x = cf; | |
| 500 | + env->cc_dest = result; | |
| 501 | + return result; | |
| 502 | +} | |
| 503 | + | |
| 504 | +/* FPU helpers. */ | |
| 505 | +uint32_t HELPER(f64_to_i32)(CPUState *env, float64 val) | |
| 506 | +{ | |
| 507 | + return float64_to_int32(val, &env->fp_status); | |
| 508 | +} | |
| 509 | + | |
| 510 | +float32 HELPER(f64_to_f32)(CPUState *env, float64 val) | |
| 511 | +{ | |
| 512 | + return float64_to_float32(val, &env->fp_status); | |
| 513 | +} | |
| 514 | + | |
| 515 | +float64 HELPER(i32_to_f64)(CPUState *env, uint32_t val) | |
| 516 | +{ | |
| 517 | + return int32_to_float64(val, &env->fp_status); | |
| 518 | +} | |
| 519 | + | |
| 520 | +float64 HELPER(f32_to_f64)(CPUState *env, float32 val) | |
| 521 | +{ | |
| 522 | + return float32_to_float64(val, &env->fp_status); | |
| 523 | +} | |
| 524 | + | |
| 525 | +float64 HELPER(iround_f64)(CPUState *env, float64 val) | |
| 526 | +{ | |
| 527 | + return float64_round_to_int(val, &env->fp_status); | |
| 528 | +} | |
| 529 | + | |
| 530 | +float64 HELPER(itrunc_f64)(CPUState *env, float64 val) | |
| 531 | +{ | |
| 532 | + return float64_trunc_to_int(val, &env->fp_status); | |
| 533 | +} | |
| 534 | + | |
| 535 | +float64 HELPER(sqrt_f64)(CPUState *env, float64 val) | |
| 536 | +{ | |
| 537 | + return float64_sqrt(val, &env->fp_status); | |
| 538 | +} | |
| 539 | + | |
| 540 | +float64 HELPER(abs_f64)(float64 val) | |
| 541 | +{ | |
| 542 | + return float64_abs(val); | |
| 543 | +} | |
| 544 | + | |
| 545 | +float64 HELPER(chs_f64)(float64 val) | |
| 546 | +{ | |
| 547 | + return float64_chs(val); | |
| 548 | +} | |
| 549 | + | |
| 550 | +float64 HELPER(add_f64)(CPUState *env, float64 a, float64 b) | |
| 551 | +{ | |
| 552 | + return float64_add(a, b, &env->fp_status); | |
| 553 | +} | |
| 554 | + | |
| 555 | +float64 HELPER(sub_f64)(CPUState *env, float64 a, float64 b) | |
| 556 | +{ | |
| 557 | + return float64_sub(a, b, &env->fp_status); | |
| 558 | +} | |
| 559 | + | |
| 560 | +float64 HELPER(mul_f64)(CPUState *env, float64 a, float64 b) | |
| 561 | +{ | |
| 562 | + return float64_mul(a, b, &env->fp_status); | |
| 563 | +} | |
| 564 | + | |
| 565 | +float64 HELPER(div_f64)(CPUState *env, float64 a, float64 b) | |
| 566 | +{ | |
| 567 | + return float64_div(a, b, &env->fp_status); | |
| 568 | +} | |
| 569 | + | |
| 570 | +float64 HELPER(sub_cmp_f64)(CPUState *env, float64 a, float64 b) | |
| 571 | +{ | |
| 572 | + /* ??? This may incorrectly raise exceptions. */ | |
| 573 | + /* ??? Should flush denormals to zero. */ | |
| 574 | + float64 res; | |
| 575 | + res = float64_sub(a, b, &env->fp_status); | |
| 576 | + if (float64_is_nan(res)) { | |
| 577 | + /* +/-inf compares equal against itself, but sub returns nan. */ | |
| 578 | + if (!float64_is_nan(a) | |
| 579 | + && !float64_is_nan(b)) { | |
| 580 | + res = float64_zero; | |
| 581 | + if (float64_lt_quiet(a, res, &env->fp_status)) | |
| 582 | + res = float64_chs(res); | |
| 583 | + } | |
| 584 | + } | |
| 585 | + return res; | |
| 586 | +} | |
| 587 | + | |
| 588 | +uint32_t HELPER(compare_f64)(CPUState *env, float64 val) | |
| 589 | +{ | |
| 590 | + return float64_compare_quiet(val, float64_zero, &env->fp_status); | |
| 591 | +} | |
| 592 | + | |
| 593 | +/* MAC unit. */ | |
| 594 | +/* FIXME: The MAC unit implementation is a bit of a mess. Some helpers | |
| 595 | + take values, others take register numbers and manipulate the contents | |
| 596 | + in-place. */ | |
| 597 | +void HELPER(mac_move)(CPUState *env, uint32_t dest, uint32_t src) | |
| 598 | +{ | |
| 599 | + uint32_t mask; | |
| 600 | + env->macc[dest] = env->macc[src]; | |
| 601 | + mask = MACSR_PAV0 << dest; | |
| 602 | + if (env->macsr & (MACSR_PAV0 << src)) | |
| 603 | + env->macsr |= mask; | |
| 604 | + else | |
| 605 | + env->macsr &= ~mask; | |
| 606 | +} | |
| 607 | + | |
| 608 | +uint64_t HELPER(macmuls)(CPUState *env, uint32_t op1, uint32_t op2) | |
| 609 | +{ | |
| 610 | + int64_t product; | |
| 611 | + int64_t res; | |
| 612 | + | |
| 613 | + product = (uint64_t)op1 * op2; | |
| 614 | + res = (product << 24) >> 24; | |
| 615 | + if (res != product) { | |
| 616 | + env->macsr |= MACSR_V; | |
| 617 | + if (env->macsr & MACSR_OMC) { | |
| 618 | + /* Make sure the accumulate operation overflows. */ | |
| 619 | + if (product < 0) | |
| 620 | + res = ~(1ll << 50); | |
| 621 | + else | |
| 622 | + res = 1ll << 50; | |
| 623 | + } | |
| 624 | + } | |
| 625 | + return res; | |
| 626 | +} | |
| 627 | + | |
| 628 | +uint64_t HELPER(macmulu)(CPUState *env, uint32_t op1, uint32_t op2) | |
| 629 | +{ | |
| 630 | + uint64_t product; | |
| 631 | + | |
| 632 | + product = (uint64_t)op1 * op2; | |
| 633 | + if (product & (0xffffffull << 40)) { | |
| 634 | + env->macsr |= MACSR_V; | |
| 635 | + if (env->macsr & MACSR_OMC) { | |
| 636 | + /* Make sure the accumulate operation overflows. */ | |
| 637 | + product = 1ll << 50; | |
| 638 | + } else { | |
| 639 | + product &= ((1ull << 40) - 1); | |
| 640 | + } | |
| 641 | + } | |
| 642 | + return product; | |
| 643 | +} | |
| 644 | + | |
| 645 | +uint64_t HELPER(macmulf)(CPUState *env, uint32_t op1, uint32_t op2) | |
| 646 | +{ | |
| 647 | + uint64_t product; | |
| 648 | + uint32_t remainder; | |
| 649 | + | |
| 650 | + product = (uint64_t)op1 * op2; | |
| 651 | + if (env->macsr & MACSR_RT) { | |
| 652 | + remainder = product & 0xffffff; | |
| 653 | + product >>= 24; | |
| 654 | + if (remainder > 0x800000) | |
| 655 | + product++; | |
| 656 | + else if (remainder == 0x800000) | |
| 657 | + product += (product & 1); | |
| 658 | + } else { | |
| 659 | + product >>= 24; | |
| 660 | + } | |
| 661 | + return product; | |
| 662 | +} | |
| 663 | + | |
| 664 | +void HELPER(macsats)(CPUState *env, uint32_t acc) | |
| 665 | +{ | |
| 666 | + int64_t tmp; | |
| 667 | + int64_t result; | |
| 668 | + tmp = env->macc[acc]; | |
| 669 | + result = ((tmp << 16) >> 16); | |
| 670 | + if (result != tmp) { | |
| 671 | + env->macsr |= MACSR_V; | |
| 672 | + } | |
| 673 | + if (env->macsr & MACSR_V) { | |
| 674 | + env->macsr |= MACSR_PAV0 << acc; | |
| 675 | + if (env->macsr & MACSR_OMC) { | |
| 676 | + /* The result is saturated to 32 bits, despite overflow occuring | |
| 677 | + at 48 bits. Seems weird, but that's what the hardware docs | |
| 678 | + say. */ | |
| 679 | + result = (result >> 63) ^ 0x7fffffff; | |
| 680 | + } | |
| 681 | + } | |
| 682 | + env->macc[acc] = result; | |
| 683 | +} | |
| 684 | + | |
| 685 | +void HELPER(macsatu)(CPUState *env, uint32_t acc) | |
| 686 | +{ | |
| 687 | + uint64_t val; | |
| 688 | + | |
| 689 | + val = env->macc[acc]; | |
| 690 | + if (val & (0xffffull << 48)) { | |
| 691 | + env->macsr |= MACSR_V; | |
| 692 | + } | |
| 693 | + if (env->macsr & MACSR_V) { | |
| 694 | + env->macsr |= MACSR_PAV0 << acc; | |
| 695 | + if (env->macsr & MACSR_OMC) { | |
| 696 | + if (val > (1ull << 53)) | |
| 697 | + val = 0; | |
| 698 | + else | |
| 699 | + val = (1ull << 48) - 1; | |
| 700 | + } else { | |
| 701 | + val &= ((1ull << 48) - 1); | |
| 702 | + } | |
| 703 | + } | |
| 704 | + env->macc[acc] = val; | |
| 705 | +} | |
| 706 | + | |
| 707 | +void HELPER(macsatf)(CPUState *env, uint32_t acc) | |
| 708 | +{ | |
| 709 | + int64_t sum; | |
| 710 | + int64_t result; | |
| 711 | + | |
| 712 | + sum = env->macc[acc]; | |
| 713 | + result = (sum << 16) >> 16; | |
| 714 | + if (result != sum) { | |
| 715 | + env->macsr |= MACSR_V; | |
| 716 | + } | |
| 717 | + if (env->macsr & MACSR_V) { | |
| 718 | + env->macsr |= MACSR_PAV0 << acc; | |
| 719 | + if (env->macsr & MACSR_OMC) { | |
| 720 | + result = (result >> 63) ^ 0x7fffffffffffll; | |
| 721 | + } | |
| 722 | + } | |
| 723 | + env->macc[acc] = result; | |
| 724 | +} | |
| 725 | + | |
| 726 | +void HELPER(mac_set_flags)(CPUState *env, uint32_t acc) | |
| 727 | +{ | |
| 728 | + uint64_t val; | |
| 729 | + val = env->macc[acc]; | |
| 730 | + if (val == 0) | |
| 731 | + env->macsr |= MACSR_Z; | |
| 732 | + else if (val & (1ull << 47)); | |
| 733 | + env->macsr |= MACSR_N; | |
| 734 | + if (env->macsr & (MACSR_PAV0 << acc)) { | |
| 735 | + env->macsr |= MACSR_V; | |
| 736 | + } | |
| 737 | + if (env->macsr & MACSR_FI) { | |
| 738 | + val = ((int64_t)val) >> 40; | |
| 739 | + if (val != 0 && val != -1) | |
| 740 | + env->macsr |= MACSR_EV; | |
| 741 | + } else if (env->macsr & MACSR_SU) { | |
| 742 | + val = ((int64_t)val) >> 32; | |
| 743 | + if (val != 0 && val != -1) | |
| 744 | + env->macsr |= MACSR_EV; | |
| 745 | + } else { | |
| 746 | + if ((val >> 32) != 0) | |
| 747 | + env->macsr |= MACSR_EV; | |
| 748 | + } | |
| 749 | +} | |
| 750 | + | |
| 751 | +void HELPER(flush_flags)(CPUState *env, uint32_t cc_op) | |
| 752 | +{ | |
| 753 | + cpu_m68k_flush_flags(env, cc_op); | |
| 754 | +} | |
| 755 | + | |
| 756 | +uint32_t HELPER(get_macf)(CPUState *env, uint64_t val) | |
| 757 | +{ | |
| 758 | + int rem; | |
| 759 | + uint32_t result; | |
| 760 | + | |
| 761 | + if (env->macsr & MACSR_SU) { | |
| 762 | + /* 16-bit rounding. */ | |
| 763 | + rem = val & 0xffffff; | |
| 764 | + val = (val >> 24) & 0xffffu; | |
| 765 | + if (rem > 0x800000) | |
| 766 | + val++; | |
| 767 | + else if (rem == 0x800000) | |
| 768 | + val += (val & 1); | |
| 769 | + } else if (env->macsr & MACSR_RT) { | |
| 770 | + /* 32-bit rounding. */ | |
| 771 | + rem = val & 0xff; | |
| 772 | + val >>= 8; | |
| 773 | + if (rem > 0x80) | |
| 774 | + val++; | |
| 775 | + else if (rem == 0x80) | |
| 776 | + val += (val & 1); | |
| 777 | + } else { | |
| 778 | + /* No rounding. */ | |
| 779 | + val >>= 8; | |
| 780 | + } | |
| 781 | + if (env->macsr & MACSR_OMC) { | |
| 782 | + /* Saturate. */ | |
| 783 | + if (env->macsr & MACSR_SU) { | |
| 784 | + if (val != (uint16_t) val) { | |
| 785 | + result = ((val >> 63) ^ 0x7fff) & 0xffff; | |
| 786 | + } else { | |
| 787 | + result = val & 0xffff; | |
| 788 | + } | |
| 789 | + } else { | |
| 790 | + if (val != (uint32_t)val) { | |
| 791 | + result = ((uint32_t)(val >> 63) & 0x7fffffff); | |
| 792 | + } else { | |
| 793 | + result = (uint32_t)val; | |
| 794 | + } | |
| 795 | + } | |
| 796 | + } else { | |
| 797 | + /* No saturation. */ | |
| 798 | + if (env->macsr & MACSR_SU) { | |
| 799 | + result = val & 0xffff; | |
| 800 | + } else { | |
| 801 | + result = (uint32_t)val; | |
| 802 | + } | |
| 803 | + } | |
| 804 | + return result; | |
| 805 | +} | |
| 806 | + | |
| 807 | +uint32_t HELPER(get_macs)(uint64_t val) | |
| 808 | +{ | |
| 809 | + if (val == (int32_t)val) { | |
| 810 | + return (int32_t)val; | |
| 811 | + } else { | |
| 812 | + return (val >> 61) ^ ~SIGNBIT; | |
| 813 | + } | |
| 814 | +} | |
| 815 | + | |
| 816 | +uint32_t HELPER(get_macu)(uint64_t val) | |
| 817 | +{ | |
| 818 | + if ((val >> 32) == 0) { | |
| 819 | + return (uint32_t)val; | |
| 820 | + } else { | |
| 821 | + return 0xffffffffu; | |
| 822 | + } | |
| 823 | +} | |
| 824 | + | |
| 825 | +uint32_t HELPER(get_mac_extf)(CPUState *env, uint32_t acc) | |
| 826 | +{ | |
| 827 | + uint32_t val; | |
| 828 | + val = env->macc[acc] & 0x00ff; | |
| 829 | + val = (env->macc[acc] >> 32) & 0xff00; | |
| 830 | + val |= (env->macc[acc + 1] << 16) & 0x00ff0000; | |
| 831 | + val |= (env->macc[acc + 1] >> 16) & 0xff000000; | |
| 832 | + return val; | |
| 833 | +} | |
| 834 | + | |
| 835 | +uint32_t HELPER(get_mac_exti)(CPUState *env, uint32_t acc) | |
| 836 | +{ | |
| 837 | + uint32_t val; | |
| 838 | + val = (env->macc[acc] >> 32) & 0xffff; | |
| 839 | + val |= (env->macc[acc + 1] >> 16) & 0xffff0000; | |
| 840 | + return val; | |
| 841 | +} | |
| 842 | + | |
| 843 | +void HELPER(set_mac_extf)(CPUState *env, uint32_t val, uint32_t acc) | |
| 844 | +{ | |
| 845 | + int64_t res; | |
| 846 | + int32_t tmp; | |
| 847 | + res = env->macc[acc] & 0xffffffff00ull; | |
| 848 | + tmp = (int16_t)(val & 0xff00); | |
| 849 | + res |= ((int64_t)tmp) << 32; | |
| 850 | + res |= val & 0xff; | |
| 851 | + env->macc[acc] = res; | |
| 852 | + res = env->macc[acc + 1] & 0xffffffff00ull; | |
| 853 | + tmp = (val & 0xff000000); | |
| 854 | + res |= ((int64_t)tmp) << 16; | |
| 855 | + res |= (val >> 16) & 0xff; | |
| 856 | + env->macc[acc + 1] = res; | |
| 857 | +} | |
| 858 | + | |
| 859 | +void HELPER(set_mac_exts)(CPUState *env, uint32_t val, uint32_t acc) | |
| 860 | +{ | |
| 861 | + int64_t res; | |
| 862 | + int32_t tmp; | |
| 863 | + res = (uint32_t)env->macc[acc]; | |
| 864 | + tmp = (int16_t)val; | |
| 865 | + res |= ((int64_t)tmp) << 32; | |
| 866 | + env->macc[acc] = res; | |
| 867 | + res = (uint32_t)env->macc[acc + 1]; | |
| 868 | + tmp = val & 0xffff0000; | |
| 869 | + res |= (int64_t)tmp << 16; | |
| 870 | + env->macc[acc + 1] = res; | |
| 871 | +} | |
| 872 | + | |
| 873 | +void HELPER(set_mac_extu)(CPUState *env, uint32_t val, uint32_t acc) | |
| 874 | +{ | |
| 875 | + uint64_t res; | |
| 876 | + res = (uint32_t)env->macc[acc]; | |
| 877 | + res |= ((uint64_t)(val & 0xffff)) << 32; | |
| 878 | + env->macc[acc] = res; | |
| 879 | + res = (uint32_t)env->macc[acc + 1]; | |
| 880 | + res |= (uint64_t)(val & 0xffff0000) << 16; | |
| 881 | + env->macc[acc + 1] = res; | |
| 882 | +} | ... | ... |
target-m68k/helpers.h
0 → 100644
| 1 | +#ifndef DEF_HELPER | |
| 2 | +#define DEF_HELPER(name, ret, args) ret glue(helper_,name) args; | |
| 3 | +#endif | |
| 4 | + | |
| 5 | +#ifdef GEN_HELPER | |
| 6 | +#define DEF_HELPER_0_0(name, ret, args) \ | |
| 7 | +DEF_HELPER(name, ret, args) \ | |
| 8 | +static inline void gen_helper_##name(void) \ | |
| 9 | +{ \ | |
| 10 | + tcg_gen_helper_0_0(helper_##name); \ | |
| 11 | +} | |
| 12 | +#define DEF_HELPER_0_1(name, ret, args) \ | |
| 13 | +DEF_HELPER(name, ret, args) \ | |
| 14 | +static inline void gen_helper_##name(TCGv arg1) \ | |
| 15 | +{ \ | |
| 16 | + tcg_gen_helper_0_1(helper_##name, arg1); \ | |
| 17 | +} | |
| 18 | +#define DEF_HELPER_0_2(name, ret, args) \ | |
| 19 | +DEF_HELPER(name, ret, args) \ | |
| 20 | +static inline void gen_helper_##name(TCGv arg1, TCGv arg2) \ | |
| 21 | +{ \ | |
| 22 | + tcg_gen_helper_0_2(helper_##name, arg1, arg2); \ | |
| 23 | +} | |
| 24 | +#define DEF_HELPER_0_3(name, ret, args) \ | |
| 25 | +DEF_HELPER(name, ret, args) \ | |
| 26 | +static inline void gen_helper_##name( \ | |
| 27 | + TCGv arg1, TCGv arg2, TCGv arg3) \ | |
| 28 | +{ \ | |
| 29 | + tcg_gen_helper_0_3(helper_##name, arg1, arg2, arg3); \ | |
| 30 | +} | |
| 31 | +#define DEF_HELPER_1_0(name, ret, args) \ | |
| 32 | +DEF_HELPER(name, ret, args) \ | |
| 33 | +static inline void gen_helper_##name(TCGv ret) \ | |
| 34 | +{ \ | |
| 35 | + tcg_gen_helper_1_0(helper_##name, ret); \ | |
| 36 | +} | |
| 37 | +#define DEF_HELPER_1_1(name, ret, args) \ | |
| 38 | +DEF_HELPER(name, ret, args) \ | |
| 39 | +static inline void gen_helper_##name(TCGv ret, TCGv arg1) \ | |
| 40 | +{ \ | |
| 41 | + tcg_gen_helper_1_1(helper_##name, ret, arg1); \ | |
| 42 | +} | |
| 43 | +#define DEF_HELPER_1_2(name, ret, args) \ | |
| 44 | +DEF_HELPER(name, ret, args) \ | |
| 45 | +static inline void gen_helper_##name(TCGv ret, TCGv arg1, TCGv arg2) \ | |
| 46 | +{ \ | |
| 47 | + tcg_gen_helper_1_2(helper_##name, ret, arg1, arg2); \ | |
| 48 | +} | |
| 49 | +#define DEF_HELPER_1_3(name, ret, args) \ | |
| 50 | +DEF_HELPER(name, ret, args) \ | |
| 51 | +static inline void gen_helper_##name(TCGv ret, \ | |
| 52 | + TCGv arg1, TCGv arg2, TCGv arg3) \ | |
| 53 | +{ \ | |
| 54 | + tcg_gen_helper_1_3(helper_##name, ret, arg1, arg2, arg3); \ | |
| 55 | +} | |
| 56 | +#define DEF_HELPER_1_4(name, ret, args) \ | |
| 57 | +DEF_HELPER(name, ret, args) \ | |
| 58 | +static inline void gen_helper_##name(TCGv ret, \ | |
| 59 | + TCGv arg1, TCGv arg2, TCGv arg3, TCGv arg4) \ | |
| 60 | +{ \ | |
| 61 | + tcg_gen_helper_1_4(helper_##name, ret, arg1, arg2, arg3, arg4); \ | |
| 62 | +} | |
| 63 | +#else /* !GEN_HELPER */ | |
| 64 | +#define DEF_HELPER_0_0 DEF_HELPER | |
| 65 | +#define DEF_HELPER_0_1 DEF_HELPER | |
| 66 | +#define DEF_HELPER_0_2 DEF_HELPER | |
| 67 | +#define DEF_HELPER_0_3 DEF_HELPER | |
| 68 | +#define DEF_HELPER_1_0 DEF_HELPER | |
| 69 | +#define DEF_HELPER_1_1 DEF_HELPER | |
| 70 | +#define DEF_HELPER_1_2 DEF_HELPER | |
| 71 | +#define DEF_HELPER_1_3 DEF_HELPER | |
| 72 | +#define DEF_HELPER_1_4 DEF_HELPER | |
| 73 | +#define HELPER(x) glue(helper_,x) | |
| 74 | +#endif | |
| 75 | + | |
| 76 | +DEF_HELPER_1_1(bitrev, uint32_t, (uint32_t)) | |
| 77 | +DEF_HELPER_1_1(ff1, uint32_t, (uint32_t)) | |
| 78 | +DEF_HELPER_1_2(sats, uint32_t, (uint32_t, uint32_t)) | |
| 79 | +DEF_HELPER_0_2(divu, void, (CPUState *, uint32_t)) | |
| 80 | +DEF_HELPER_0_2(divs, void, (CPUState *, uint32_t)) | |
| 81 | +DEF_HELPER_1_3(addx_cc, uint32_t, (CPUState *, uint32_t, uint32_t)) | |
| 82 | +DEF_HELPER_1_3(subx_cc, uint32_t, (CPUState *, uint32_t, uint32_t)) | |
| 83 | +DEF_HELPER_1_3(shl_cc, uint32_t, (CPUState *, uint32_t, uint32_t)) | |
| 84 | +DEF_HELPER_1_3(shr_cc, uint32_t, (CPUState *, uint32_t, uint32_t)) | |
| 85 | +DEF_HELPER_1_3(sar_cc, uint32_t, (CPUState *, uint32_t, uint32_t)) | |
| 86 | +DEF_HELPER_1_2(xflag_lt, uint32_t, (uint32_t, uint32_t)) | |
| 87 | +DEF_HELPER_0_2(set_sr, void, (CPUState *, uint32_t)) | |
| 88 | +DEF_HELPER_0_3(movec, void, (CPUState *, uint32_t, uint32_t)) | |
| 89 | + | |
| 90 | +DEF_HELPER_1_2(f64_to_i32, float32, (CPUState *, float64)) | |
| 91 | +DEF_HELPER_1_2(f64_to_f32, float32, (CPUState *, float64)) | |
| 92 | +DEF_HELPER_1_2(i32_to_f64, float64, (CPUState *, uint32_t)) | |
| 93 | +DEF_HELPER_1_2(f32_to_f64, float64, (CPUState *, float32)) | |
| 94 | +DEF_HELPER_1_2(iround_f64, float64, (CPUState *, float64)) | |
| 95 | +DEF_HELPER_1_2(itrunc_f64, float64, (CPUState *, float64)) | |
| 96 | +DEF_HELPER_1_2(sqrt_f64, float64, (CPUState *, float64)) | |
| 97 | +DEF_HELPER_1_1(abs_f64, float64, (float64)) | |
| 98 | +DEF_HELPER_1_1(chs_f64, float64, (float64)) | |
| 99 | +DEF_HELPER_1_3(add_f64, float64, (CPUState *, float64, float64)) | |
| 100 | +DEF_HELPER_1_3(sub_f64, float64, (CPUState *, float64, float64)) | |
| 101 | +DEF_HELPER_1_3(mul_f64, float64, (CPUState *, float64, float64)) | |
| 102 | +DEF_HELPER_1_3(div_f64, float64, (CPUState *, float64, float64)) | |
| 103 | +DEF_HELPER_1_3(sub_cmp_f64, float64, (CPUState *, float64, float64)) | |
| 104 | +DEF_HELPER_1_2(compare_f64, uint32_t, (CPUState *, float64)) | |
| 105 | + | |
| 106 | +DEF_HELPER_0_3(mac_move, void, (CPUState *, uint32_t, uint32_t)) | |
| 107 | +DEF_HELPER_1_3(macmulf, uint64_t, (CPUState *, uint32_t, uint32_t)) | |
| 108 | +DEF_HELPER_1_3(macmuls, uint64_t, (CPUState *, uint32_t, uint32_t)) | |
| 109 | +DEF_HELPER_1_3(macmulu, uint64_t, (CPUState *, uint32_t, uint32_t)) | |
| 110 | +DEF_HELPER_0_2(macsats, void, (CPUState *, uint32_t)) | |
| 111 | +DEF_HELPER_0_2(macsatu, void, (CPUState *, uint32_t)) | |
| 112 | +DEF_HELPER_0_2(macsatf, void, (CPUState *, uint32_t)) | |
| 113 | +DEF_HELPER_0_2(mac_set_flags, void, (CPUState *, uint32_t)) | |
| 114 | +DEF_HELPER_0_2(set_macsr, void, (CPUState *, uint32_t)) | |
| 115 | +DEF_HELPER_1_2(get_macf, uint32_t, (CPUState *, uint64_t)) | |
| 116 | +DEF_HELPER_1_1(get_macs, uint32_t, (uint64_t)) | |
| 117 | +DEF_HELPER_1_1(get_macu, uint32_t, (uint64_t)) | |
| 118 | +DEF_HELPER_1_2(get_mac_extf, uint32_t, (CPUState *, uint32_t)) | |
| 119 | +DEF_HELPER_1_2(get_mac_exti, uint32_t, (CPUState *, uint32_t)) | |
| 120 | +DEF_HELPER_0_3(set_mac_extf, void, (CPUState *, uint32_t, uint32_t)) | |
| 121 | +DEF_HELPER_0_3(set_mac_exts, void, (CPUState *, uint32_t, uint32_t)) | |
| 122 | +DEF_HELPER_0_3(set_mac_extu, void, (CPUState *, uint32_t, uint32_t)) | |
| 123 | + | |
| 124 | +DEF_HELPER_0_2(flush_flags, void, (CPUState *, uint32_t)) | |
| 125 | +DEF_HELPER_0_1(raise_exception, void, (uint32_t)) | |
| 126 | + | |
| 127 | +#undef DEF_HELPER | |
| 128 | +#undef DEF_HELPER_0_0 | |
| 129 | +#undef DEF_HELPER_0_1 | |
| 130 | +#undef DEF_HELPER_0_2 | |
| 131 | +#undef DEF_HELPER_0_3 | |
| 132 | +#undef DEF_HELPER_1_0 | |
| 133 | +#undef DEF_HELPER_1_1 | |
| 134 | +#undef DEF_HELPER_1_2 | |
| 135 | +#undef DEF_HELPER_1_3 | |
| 136 | +#undef DEF_HELPER_1_4 | |
| 137 | +#undef GEN_HELPER | |
| 138 | +#undef DEF_HELPER | ... | ... |
target-m68k/op-hacks.h deleted
100644 → 0
| 1 | -/* Various hacks to make code written for a dynamic code generator work | |
| 2 | - with regular QEMU. */ | |
| 3 | - | |
| 4 | -static int free_qreg; | |
| 5 | - | |
| 6 | -#define QMODE_I32 1 | |
| 7 | -#define QMODE_F32 1 | |
| 8 | -#define QMODE_F64 2 | |
| 9 | - | |
| 10 | -static inline int gen_new_qreg(int mode) | |
| 11 | -{ | |
| 12 | - int qreg; | |
| 13 | - | |
| 14 | - qreg = free_qreg; | |
| 15 | - free_qreg += mode; | |
| 16 | - if (free_qreg > MAX_QREGS) { | |
| 17 | - fprintf(stderr, "qreg overflow\n"); | |
| 18 | - abort(); | |
| 19 | - } | |
| 20 | - return qreg + TARGET_NUM_QREGS; | |
| 21 | -} | |
| 22 | - | |
| 23 | -static inline int gen_im32(uint32_t i) | |
| 24 | -{ | |
| 25 | - int qreg = gen_new_qreg(QMODE_I32); | |
| 26 | - gen_op_mov32_im(qreg, i); | |
| 27 | - return qreg; | |
| 28 | -} | |
| 29 | - | |
| 30 | -static inline void gen_op_ldf32_raw(int dest, int addr) | |
| 31 | -{ | |
| 32 | - gen_op_ld32_raw(dest, addr); | |
| 33 | -} | |
| 34 | - | |
| 35 | -static inline void gen_op_stf32_raw(int addr, int dest) | |
| 36 | -{ | |
| 37 | - gen_op_st32_raw(addr, dest); | |
| 38 | -} | |
| 39 | - | |
| 40 | -#if !defined(CONFIG_USER_ONLY) | |
| 41 | -static inline void gen_op_ldf32_user(int dest, int addr) | |
| 42 | -{ | |
| 43 | - gen_op_ld32_user(dest, addr); | |
| 44 | -} | |
| 45 | - | |
| 46 | -static inline void gen_op_stf32_user(int addr, int dest) | |
| 47 | -{ | |
| 48 | - gen_op_st32_user(addr, dest); | |
| 49 | -} | |
| 50 | - | |
| 51 | -static inline void gen_op_ldf32_kernel(int dest, int addr) | |
| 52 | -{ | |
| 53 | - gen_op_ld32_kernel(dest, addr); | |
| 54 | -} | |
| 55 | - | |
| 56 | -static inline void gen_op_stf32_kernel(int addr, int dest) | |
| 57 | -{ | |
| 58 | - gen_op_st32_kernel(addr, dest); | |
| 59 | -} | |
| 60 | -#endif | |
| 61 | - | |
| 62 | -static inline void gen_op_pack_32_f32(int dest, int src) | |
| 63 | -{ | |
| 64 | - gen_op_mov32(dest, src); | |
| 65 | -} | |
| 66 | - | |
| 67 | -static inline void gen_op_pack_f32_32(int dest, int src) | |
| 68 | -{ | |
| 69 | - gen_op_mov32(dest, src); | |
| 70 | -} | |
| 71 | - | |
| 72 | -static inline void gen_op_flags_set(void) | |
| 73 | -{ | |
| 74 | - /* Dummy op. */ | |
| 75 | -} | |
| 76 | - | |
| 77 | -static inline void gen_op_shl_im_cc(int val, int shift) | |
| 78 | -{ | |
| 79 | - gen_op_shl_cc(val, gen_im32(shift)); | |
| 80 | -} | |
| 81 | - | |
| 82 | -static inline void gen_op_shr_im_cc(int val, int shift) | |
| 83 | -{ | |
| 84 | - gen_op_shr_cc(val, gen_im32(shift)); | |
| 85 | -} | |
| 86 | - | |
| 87 | -static inline void gen_op_sar_im_cc(int val, int shift) | |
| 88 | -{ | |
| 89 | - gen_op_sar_cc(val, gen_im32(shift)); | |
| 90 | -} | |
| 91 | - | |
| 92 | -#ifdef USE_DIRECT_JUMP | |
| 93 | -#define TBPARAM(x) | |
| 94 | -#else | |
| 95 | -#define TBPARAM(x) (long)(x) | |
| 96 | -#endif | |
| 97 | - | |
| 98 | -static inline void gen_op_goto_tb(int dummy, int n, long tb) | |
| 99 | -{ | |
| 100 | - if (n == 0) { | |
| 101 | - gen_op_goto_tb0(TBPARAM(tb)); | |
| 102 | - } else { | |
| 103 | - gen_op_goto_tb1(TBPARAM(tb)); | |
| 104 | - } | |
| 105 | -} | |
| 106 | - | |
| 107 | -static inline void gen_op_jmp_z32(int val, int label) | |
| 108 | -{ | |
| 109 | - gen_op_set_T0_z32(val); | |
| 110 | - gen_op_jmp_T0(label); | |
| 111 | -} | |
| 112 | - | |
| 113 | -static inline void gen_op_jmp_nz32(int val, int label) | |
| 114 | -{ | |
| 115 | - gen_op_set_T0_nz32(val); | |
| 116 | - gen_op_jmp_T0(label); | |
| 117 | -} | |
| 118 | - | |
| 119 | -static inline void gen_op_jmp_s32(int val, int label) | |
| 120 | -{ | |
| 121 | - gen_op_set_T0_s32(val); | |
| 122 | - gen_op_jmp_T0(label); | |
| 123 | -} | |
| 124 | - | |
| 125 | -static inline void gen_op_jmp_ns32(int val, int label) | |
| 126 | -{ | |
| 127 | - gen_op_set_T0_ns32(val); | |
| 128 | - gen_op_jmp_T0(label); | |
| 129 | -} | |
| 130 | - |
target-m68k/op.c deleted
100644 → 0
| 1 | -/* | |
| 2 | - * m68k micro operations | |
| 3 | - * | |
| 4 | - * Copyright (c) 2006-2007 CodeSourcery | |
| 5 | - * Written by Paul Brook | |
| 6 | - * | |
| 7 | - * This library is free software; you can redistribute it and/or | |
| 8 | - * modify it under the terms of the GNU Lesser General Public | |
| 9 | - * License as published by the Free Software Foundation; either | |
| 10 | - * version 2 of the License, or (at your option) any later version. | |
| 11 | - * | |
| 12 | - * This library is distributed in the hope that it will be useful, | |
| 13 | - * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 | - * General Public License for more details. | |
| 16 | - * | |
| 17 | - * You should have received a copy of the GNU Lesser General Public | |
| 18 | - * License along with this library; if not, write to the Free Software | |
| 19 | - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 20 | - */ | |
| 21 | - | |
| 22 | -#include "exec.h" | |
| 23 | -#include "m68k-qreg.h" | |
| 24 | - | |
| 25 | -#ifndef offsetof | |
| 26 | -#define offsetof(type, field) ((size_t) &((type *)0)->field) | |
| 27 | -#endif | |
| 28 | - | |
| 29 | -static long qreg_offsets[] = { | |
| 30 | -#define DEFO32(name, offset) offsetof(CPUState, offset), | |
| 31 | -#define DEFR(name, reg, mode) -1, | |
| 32 | -#define DEFF64(name, offset) offsetof(CPUState, offset), | |
| 33 | - 0, | |
| 34 | -#include "qregs.def" | |
| 35 | -}; | |
| 36 | - | |
| 37 | -#define CPU_FP_STATUS env->fp_status | |
| 38 | - | |
| 39 | -#define RAISE_EXCEPTION(n) do { \ | |
| 40 | - env->exception_index = n; \ | |
| 41 | - cpu_loop_exit(); \ | |
| 42 | - } while(0) | |
| 43 | - | |
| 44 | -#define get_op helper_get_op | |
| 45 | -#define set_op helper_set_op | |
| 46 | -#define get_opf64 helper_get_opf64 | |
| 47 | -#define set_opf64 helper_set_opf64 | |
| 48 | -uint32_t | |
| 49 | -get_op(int qreg) | |
| 50 | -{ | |
| 51 | - if (qreg >= TARGET_NUM_QREGS) { | |
| 52 | - return env->qregs[qreg - TARGET_NUM_QREGS]; | |
| 53 | - } else if (qreg == QREG_T0) { | |
| 54 | - return T0; | |
| 55 | - } else { | |
| 56 | - return *(uint32_t *)(((long)env) + qreg_offsets[qreg]); | |
| 57 | - } | |
| 58 | -} | |
| 59 | - | |
| 60 | -void set_op(int qreg, uint32_t val) | |
| 61 | -{ | |
| 62 | - if (qreg >= TARGET_NUM_QREGS) { | |
| 63 | - env->qregs[qreg - TARGET_NUM_QREGS] = val; | |
| 64 | - } else if (qreg == QREG_T0) { | |
| 65 | - T0 = val; | |
| 66 | - } else { | |
| 67 | - *(uint32_t *)(((long)env) + qreg_offsets[qreg]) = val; | |
| 68 | - } | |
| 69 | -} | |
| 70 | - | |
| 71 | -float64 get_opf64(int qreg) | |
| 72 | -{ | |
| 73 | - if (qreg < TARGET_NUM_QREGS) { | |
| 74 | - return *(float64 *)(((long)env) + qreg_offsets[qreg]); | |
| 75 | - } else { | |
| 76 | - return *(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS]; | |
| 77 | - } | |
| 78 | -} | |
| 79 | - | |
| 80 | -void set_opf64(int qreg, float64 val) | |
| 81 | -{ | |
| 82 | - if (qreg < TARGET_NUM_QREGS) { | |
| 83 | - *(float64 *)(((long)env) + qreg_offsets[qreg]) = val; | |
| 84 | - } else { | |
| 85 | - *(float64 *)&env->qregs[qreg - TARGET_NUM_QREGS] = val; | |
| 86 | - } | |
| 87 | -} | |
| 88 | - | |
| 89 | -#define OP(name) void OPPROTO glue(op_,name) (void) | |
| 90 | - | |
| 91 | -OP(mov32) | |
| 92 | -{ | |
| 93 | - set_op(PARAM1, get_op(PARAM2)); | |
| 94 | - FORCE_RET(); | |
| 95 | -} | |
| 96 | - | |
| 97 | -OP(mov32_im) | |
| 98 | -{ | |
| 99 | - set_op(PARAM1, PARAM2); | |
| 100 | - FORCE_RET(); | |
| 101 | -} | |
| 102 | - | |
| 103 | -OP(movf64) | |
| 104 | -{ | |
| 105 | - set_opf64(PARAM1, get_opf64(PARAM2)); | |
| 106 | - FORCE_RET(); | |
| 107 | -} | |
| 108 | - | |
| 109 | -OP(zerof64) | |
| 110 | -{ | |
| 111 | - set_opf64(PARAM1, float64_zero); | |
| 112 | - FORCE_RET(); | |
| 113 | -} | |
| 114 | - | |
| 115 | -OP(add32) | |
| 116 | -{ | |
| 117 | - uint32_t op2 = get_op(PARAM2); | |
| 118 | - uint32_t op3 = get_op(PARAM3); | |
| 119 | - set_op(PARAM1, op2 + op3); | |
| 120 | - FORCE_RET(); | |
| 121 | -} | |
| 122 | - | |
| 123 | -OP(sub32) | |
| 124 | -{ | |
| 125 | - uint32_t op2 = get_op(PARAM2); | |
| 126 | - uint32_t op3 = get_op(PARAM3); | |
| 127 | - set_op(PARAM1, op2 - op3); | |
| 128 | - FORCE_RET(); | |
| 129 | -} | |
| 130 | - | |
| 131 | -OP(mul32) | |
| 132 | -{ | |
| 133 | - uint32_t op2 = get_op(PARAM2); | |
| 134 | - uint32_t op3 = get_op(PARAM3); | |
| 135 | - set_op(PARAM1, op2 * op3); | |
| 136 | - FORCE_RET(); | |
| 137 | -} | |
| 138 | - | |
| 139 | -OP(not32) | |
| 140 | -{ | |
| 141 | - uint32_t arg = get_op(PARAM2); | |
| 142 | - set_op(PARAM1, ~arg); | |
| 143 | - FORCE_RET(); | |
| 144 | -} | |
| 145 | - | |
| 146 | -OP(neg32) | |
| 147 | -{ | |
| 148 | - uint32_t arg = get_op(PARAM2); | |
| 149 | - set_op(PARAM1, -arg); | |
| 150 | - FORCE_RET(); | |
| 151 | -} | |
| 152 | - | |
| 153 | -OP(bswap32) | |
| 154 | -{ | |
| 155 | - uint32_t arg = get_op(PARAM2); | |
| 156 | - arg = (arg >> 24) | (arg << 24) | |
| 157 | - | ((arg >> 16) & 0xff00) | ((arg << 16) & 0xff0000); | |
| 158 | - set_op(PARAM1, arg); | |
| 159 | - FORCE_RET(); | |
| 160 | -} | |
| 161 | - | |
| 162 | -OP(btest) | |
| 163 | -{ | |
| 164 | - uint32_t op1 = get_op(PARAM1); | |
| 165 | - uint32_t op2 = get_op(PARAM2); | |
| 166 | - if (op1 & op2) | |
| 167 | - env->cc_dest &= ~CCF_Z; | |
| 168 | - else | |
| 169 | - env->cc_dest |= CCF_Z; | |
| 170 | - FORCE_RET(); | |
| 171 | -} | |
| 172 | - | |
| 173 | -OP(ff1) | |
| 174 | -{ | |
| 175 | - uint32_t arg = get_op(PARAM2); | |
| 176 | - int n; | |
| 177 | - for (n = 32; arg; n--) | |
| 178 | - arg >>= 1; | |
| 179 | - set_op(PARAM1, n); | |
| 180 | - FORCE_RET(); | |
| 181 | -} | |
| 182 | - | |
| 183 | -OP(subx_cc) | |
| 184 | -{ | |
| 185 | - uint32_t op1 = get_op(PARAM1); | |
| 186 | - uint32_t op2 = get_op(PARAM2); | |
| 187 | - uint32_t res; | |
| 188 | - if (env->cc_x) { | |
| 189 | - env->cc_x = (op1 <= op2); | |
| 190 | - env->cc_op = CC_OP_SUBX; | |
| 191 | - res = op1 - (op2 + 1); | |
| 192 | - } else { | |
| 193 | - env->cc_x = (op1 < op2); | |
| 194 | - env->cc_op = CC_OP_SUB; | |
| 195 | - res = op1 - op2; | |
| 196 | - } | |
| 197 | - set_op(PARAM1, res); | |
| 198 | - FORCE_RET(); | |
| 199 | -} | |
| 200 | - | |
| 201 | -OP(addx_cc) | |
| 202 | -{ | |
| 203 | - uint32_t op1 = get_op(PARAM1); | |
| 204 | - uint32_t op2 = get_op(PARAM2); | |
| 205 | - uint32_t res; | |
| 206 | - if (env->cc_x) { | |
| 207 | - res = op1 + op2 + 1; | |
| 208 | - env->cc_x = (res <= op2); | |
| 209 | - env->cc_op = CC_OP_ADDX; | |
| 210 | - } else { | |
| 211 | - res = op1 + op2; | |
| 212 | - env->cc_x = (res < op2); | |
| 213 | - env->cc_op = CC_OP_ADD; | |
| 214 | - } | |
| 215 | - set_op(PARAM1, res); | |
| 216 | - FORCE_RET(); | |
| 217 | -} | |
| 218 | - | |
| 219 | -/* Logic ops. */ | |
| 220 | - | |
| 221 | -OP(and32) | |
| 222 | -{ | |
| 223 | - uint32_t op2 = get_op(PARAM2); | |
| 224 | - uint32_t op3 = get_op(PARAM3); | |
| 225 | - set_op(PARAM1, op2 & op3); | |
| 226 | - FORCE_RET(); | |
| 227 | -} | |
| 228 | - | |
| 229 | -OP(or32) | |
| 230 | -{ | |
| 231 | - uint32_t op2 = get_op(PARAM2); | |
| 232 | - uint32_t op3 = get_op(PARAM3); | |
| 233 | - set_op(PARAM1, op2 | op3); | |
| 234 | - FORCE_RET(); | |
| 235 | -} | |
| 236 | - | |
| 237 | -OP(xor32) | |
| 238 | -{ | |
| 239 | - uint32_t op2 = get_op(PARAM2); | |
| 240 | - uint32_t op3 = get_op(PARAM3); | |
| 241 | - set_op(PARAM1, op2 ^ op3); | |
| 242 | - FORCE_RET(); | |
| 243 | -} | |
| 244 | - | |
| 245 | -/* Shifts. */ | |
| 246 | -OP(shl32) | |
| 247 | -{ | |
| 248 | - uint32_t op2 = get_op(PARAM2); | |
| 249 | - uint32_t op3 = get_op(PARAM3); | |
| 250 | - uint32_t result; | |
| 251 | - result = op2 << op3; | |
| 252 | - set_op(PARAM1, result); | |
| 253 | - FORCE_RET(); | |
| 254 | -} | |
| 255 | - | |
| 256 | -OP(shl_cc) | |
| 257 | -{ | |
| 258 | - uint32_t op1 = get_op(PARAM1); | |
| 259 | - uint32_t op2 = get_op(PARAM2); | |
| 260 | - uint32_t result; | |
| 261 | - result = op1 << op2; | |
| 262 | - set_op(PARAM1, result); | |
| 263 | - env->cc_x = (op1 << (op2 - 1)) & 1; | |
| 264 | - FORCE_RET(); | |
| 265 | -} | |
| 266 | - | |
| 267 | -OP(shr32) | |
| 268 | -{ | |
| 269 | - uint32_t op2 = get_op(PARAM2); | |
| 270 | - uint32_t op3 = get_op(PARAM3); | |
| 271 | - uint32_t result; | |
| 272 | - result = op2 >> op3; | |
| 273 | - set_op(PARAM1, result); | |
| 274 | - FORCE_RET(); | |
| 275 | -} | |
| 276 | - | |
| 277 | -OP(shr_cc) | |
| 278 | -{ | |
| 279 | - uint32_t op1 = get_op(PARAM1); | |
| 280 | - uint32_t op2 = get_op(PARAM2); | |
| 281 | - uint32_t result; | |
| 282 | - result = op1 >> op2; | |
| 283 | - set_op(PARAM1, result); | |
| 284 | - env->cc_x = (op1 >> (op2 - 1)) & 1; | |
| 285 | - FORCE_RET(); | |
| 286 | -} | |
| 287 | - | |
| 288 | -OP(sar32) | |
| 289 | -{ | |
| 290 | - int32_t op2 = get_op(PARAM2); | |
| 291 | - uint32_t op3 = get_op(PARAM3); | |
| 292 | - uint32_t result; | |
| 293 | - result = op2 >> op3; | |
| 294 | - set_op(PARAM1, result); | |
| 295 | - FORCE_RET(); | |
| 296 | -} | |
| 297 | - | |
| 298 | -OP(sar_cc) | |
| 299 | -{ | |
| 300 | - int32_t op1 = get_op(PARAM1); | |
| 301 | - uint32_t op2 = get_op(PARAM2); | |
| 302 | - uint32_t result; | |
| 303 | - result = op1 >> op2; | |
| 304 | - set_op(PARAM1, result); | |
| 305 | - env->cc_x = (op1 >> (op2 - 1)) & 1; | |
| 306 | - FORCE_RET(); | |
| 307 | -} | |
| 308 | - | |
| 309 | -/* Value extend. */ | |
| 310 | - | |
| 311 | -OP(ext8u32) | |
| 312 | -{ | |
| 313 | - uint32_t op2 = get_op(PARAM2); | |
| 314 | - set_op(PARAM1, (uint8_t)op2); | |
| 315 | - FORCE_RET(); | |
| 316 | -} | |
| 317 | - | |
| 318 | -OP(ext8s32) | |
| 319 | -{ | |
| 320 | - uint32_t op2 = get_op(PARAM2); | |
| 321 | - set_op(PARAM1, (int8_t)op2); | |
| 322 | - FORCE_RET(); | |
| 323 | -} | |
| 324 | - | |
| 325 | -OP(ext16u32) | |
| 326 | -{ | |
| 327 | - uint32_t op2 = get_op(PARAM2); | |
| 328 | - set_op(PARAM1, (uint16_t)op2); | |
| 329 | - FORCE_RET(); | |
| 330 | -} | |
| 331 | - | |
| 332 | -OP(ext16s32) | |
| 333 | -{ | |
| 334 | - uint32_t op2 = get_op(PARAM2); | |
| 335 | - set_op(PARAM1, (int16_t)op2); | |
| 336 | - FORCE_RET(); | |
| 337 | -} | |
| 338 | - | |
| 339 | -OP(flush_flags) | |
| 340 | -{ | |
| 341 | - cpu_m68k_flush_flags(env, env->cc_op); | |
| 342 | - FORCE_RET(); | |
| 343 | -} | |
| 344 | - | |
| 345 | -OP(divu) | |
| 346 | -{ | |
| 347 | - uint32_t num; | |
| 348 | - uint32_t den; | |
| 349 | - uint32_t quot; | |
| 350 | - uint32_t rem; | |
| 351 | - uint32_t flags; | |
| 352 | - | |
| 353 | - num = env->div1; | |
| 354 | - den = env->div2; | |
| 355 | - /* ??? This needs to make sure the throwing location is accurate. */ | |
| 356 | - if (den == 0) | |
| 357 | - RAISE_EXCEPTION(EXCP_DIV0); | |
| 358 | - quot = num / den; | |
| 359 | - rem = num % den; | |
| 360 | - flags = 0; | |
| 361 | - /* Avoid using a PARAM1 of zero. This breaks dyngen because it uses | |
| 362 | - the address of a symbol, and gcc knows symbols can't have address | |
| 363 | - zero. */ | |
| 364 | - if (PARAM1 == 2 && quot > 0xffff) | |
| 365 | - flags |= CCF_V; | |
| 366 | - if (quot == 0) | |
| 367 | - flags |= CCF_Z; | |
| 368 | - else if ((int32_t)quot < 0) | |
| 369 | - flags |= CCF_N; | |
| 370 | - env->div1 = quot; | |
| 371 | - env->div2 = rem; | |
| 372 | - env->cc_dest = flags; | |
| 373 | - FORCE_RET(); | |
| 374 | -} | |
| 375 | - | |
| 376 | -OP(divs) | |
| 377 | -{ | |
| 378 | - int32_t num; | |
| 379 | - int32_t den; | |
| 380 | - int32_t quot; | |
| 381 | - int32_t rem; | |
| 382 | - int32_t flags; | |
| 383 | - | |
| 384 | - num = env->div1; | |
| 385 | - den = env->div2; | |
| 386 | - if (den == 0) | |
| 387 | - RAISE_EXCEPTION(EXCP_DIV0); | |
| 388 | - quot = num / den; | |
| 389 | - rem = num % den; | |
| 390 | - flags = 0; | |
| 391 | - if (PARAM1 == 2 && quot != (int16_t)quot) | |
| 392 | - flags |= CCF_V; | |
| 393 | - if (quot == 0) | |
| 394 | - flags |= CCF_Z; | |
| 395 | - else if (quot < 0) | |
| 396 | - flags |= CCF_N; | |
| 397 | - env->div1 = quot; | |
| 398 | - env->div2 = rem; | |
| 399 | - env->cc_dest = flags; | |
| 400 | - FORCE_RET(); | |
| 401 | -} | |
| 402 | - | |
| 403 | -/* Halt is special because it may be a semihosting call. */ | |
| 404 | -OP(halt) | |
| 405 | -{ | |
| 406 | - RAISE_EXCEPTION(EXCP_HALT_INSN); | |
| 407 | - FORCE_RET(); | |
| 408 | -} | |
| 409 | - | |
| 410 | -OP(stop) | |
| 411 | -{ | |
| 412 | - env->halted = 1; | |
| 413 | - RAISE_EXCEPTION(EXCP_HLT); | |
| 414 | - FORCE_RET(); | |
| 415 | -} | |
| 416 | - | |
| 417 | -OP(raise_exception) | |
| 418 | -{ | |
| 419 | - RAISE_EXCEPTION(PARAM1); | |
| 420 | - FORCE_RET(); | |
| 421 | -} | |
| 422 | - | |
| 423 | -/* Floating point comparison sets flags differently to other instructions. */ | |
| 424 | - | |
| 425 | -OP(sub_cmpf64) | |
| 426 | -{ | |
| 427 | - float64 src0; | |
| 428 | - float64 src1; | |
| 429 | - src0 = get_opf64(PARAM2); | |
| 430 | - src1 = get_opf64(PARAM3); | |
| 431 | - set_opf64(PARAM1, helper_sub_cmpf64(env, src0, src1)); | |
| 432 | - FORCE_RET(); | |
| 433 | -} | |
| 434 | - | |
| 435 | -OP(update_xflag_tst) | |
| 436 | -{ | |
| 437 | - uint32_t op1 = get_op(PARAM1); | |
| 438 | - env->cc_x = op1; | |
| 439 | - FORCE_RET(); | |
| 440 | -} | |
| 441 | - | |
| 442 | -OP(update_xflag_lt) | |
| 443 | -{ | |
| 444 | - uint32_t op1 = get_op(PARAM1); | |
| 445 | - uint32_t op2 = get_op(PARAM2); | |
| 446 | - env->cc_x = (op1 < op2); | |
| 447 | - FORCE_RET(); | |
| 448 | -} | |
| 449 | - | |
| 450 | -OP(get_xflag) | |
| 451 | -{ | |
| 452 | - set_op(PARAM1, env->cc_x); | |
| 453 | - FORCE_RET(); | |
| 454 | -} | |
| 455 | - | |
| 456 | -OP(logic_cc) | |
| 457 | -{ | |
| 458 | - uint32_t op1 = get_op(PARAM1); | |
| 459 | - env->cc_dest = op1; | |
| 460 | - FORCE_RET(); | |
| 461 | -} | |
| 462 | - | |
| 463 | -OP(update_cc_add) | |
| 464 | -{ | |
| 465 | - uint32_t op1 = get_op(PARAM1); | |
| 466 | - uint32_t op2 = get_op(PARAM2); | |
| 467 | - env->cc_dest = op1; | |
| 468 | - env->cc_src = op2; | |
| 469 | - FORCE_RET(); | |
| 470 | -} | |
| 471 | - | |
| 472 | -OP(fp_result) | |
| 473 | -{ | |
| 474 | - env->fp_result = get_opf64(PARAM1); | |
| 475 | - FORCE_RET(); | |
| 476 | -} | |
| 477 | - | |
| 478 | -OP(set_sr) | |
| 479 | -{ | |
| 480 | - env->sr = get_op(PARAM1) & 0xffff; | |
| 481 | - m68k_switch_sp(env); | |
| 482 | - FORCE_RET(); | |
| 483 | -} | |
| 484 | - | |
| 485 | -OP(jmp_im) | |
| 486 | -{ | |
| 487 | - GOTO_LABEL_PARAM(1); | |
| 488 | -} | |
| 489 | - | |
| 490 | -OP(set_T0_z32) | |
| 491 | -{ | |
| 492 | - uint32_t arg = get_op(PARAM1); | |
| 493 | - T0 = (arg == 0); | |
| 494 | - FORCE_RET(); | |
| 495 | -} | |
| 496 | - | |
| 497 | -OP(set_T0_nz32) | |
| 498 | -{ | |
| 499 | - uint32_t arg = get_op(PARAM1); | |
| 500 | - T0 = (arg != 0); | |
| 501 | - FORCE_RET(); | |
| 502 | -} | |
| 503 | - | |
| 504 | -OP(set_T0_s32) | |
| 505 | -{ | |
| 506 | - int32_t arg = get_op(PARAM1); | |
| 507 | - T0 = (arg < 0); | |
| 508 | - FORCE_RET(); | |
| 509 | -} | |
| 510 | - | |
| 511 | -OP(set_T0_ns32) | |
| 512 | -{ | |
| 513 | - int32_t arg = get_op(PARAM1); | |
| 514 | - T0 = (arg >= 0); | |
| 515 | - FORCE_RET(); | |
| 516 | -} | |
| 517 | - | |
| 518 | -OP(jmp_T0) | |
| 519 | -{ | |
| 520 | - if (T0) | |
| 521 | - GOTO_LABEL_PARAM(1); | |
| 522 | - FORCE_RET(); | |
| 523 | -} | |
| 524 | - | |
| 525 | -/* Floating point. */ | |
| 526 | -OP(f64_to_i32) | |
| 527 | -{ | |
| 528 | - set_op(PARAM1, float64_to_int32(get_opf64(PARAM2), &CPU_FP_STATUS)); | |
| 529 | - FORCE_RET(); | |
| 530 | -} | |
| 531 | - | |
| 532 | -OP(f64_to_f32) | |
| 533 | -{ | |
| 534 | - union { | |
| 535 | - float32 f; | |
| 536 | - uint32_t i; | |
| 537 | - } u; | |
| 538 | - u.f = float64_to_float32(get_opf64(PARAM2), &CPU_FP_STATUS); | |
| 539 | - set_op(PARAM1, u.i); | |
| 540 | - FORCE_RET(); | |
| 541 | -} | |
| 542 | - | |
| 543 | -OP(i32_to_f64) | |
| 544 | -{ | |
| 545 | - set_opf64(PARAM1, int32_to_float64(get_op(PARAM2), &CPU_FP_STATUS)); | |
| 546 | - FORCE_RET(); | |
| 547 | -} | |
| 548 | - | |
| 549 | -OP(f32_to_f64) | |
| 550 | -{ | |
| 551 | - union { | |
| 552 | - float32 f; | |
| 553 | - uint32_t i; | |
| 554 | - } u; | |
| 555 | - u.i = get_op(PARAM2); | |
| 556 | - set_opf64(PARAM1, float32_to_float64(u.f, &CPU_FP_STATUS)); | |
| 557 | - FORCE_RET(); | |
| 558 | -} | |
| 559 | - | |
| 560 | -OP(absf64) | |
| 561 | -{ | |
| 562 | - float64 op0 = get_opf64(PARAM2); | |
| 563 | - set_opf64(PARAM1, float64_abs(op0)); | |
| 564 | - FORCE_RET(); | |
| 565 | -} | |
| 566 | - | |
| 567 | -OP(chsf64) | |
| 568 | -{ | |
| 569 | - float64 op0 = get_opf64(PARAM2); | |
| 570 | - set_opf64(PARAM1, float64_chs(op0)); | |
| 571 | - FORCE_RET(); | |
| 572 | -} | |
| 573 | - | |
| 574 | -OP(sqrtf64) | |
| 575 | -{ | |
| 576 | - float64 op0 = get_opf64(PARAM2); | |
| 577 | - set_opf64(PARAM1, float64_sqrt(op0, &CPU_FP_STATUS)); | |
| 578 | - FORCE_RET(); | |
| 579 | -} | |
| 580 | - | |
| 581 | -OP(addf64) | |
| 582 | -{ | |
| 583 | - float64 op0 = get_opf64(PARAM2); | |
| 584 | - float64 op1 = get_opf64(PARAM3); | |
| 585 | - set_opf64(PARAM1, float64_add(op0, op1, &CPU_FP_STATUS)); | |
| 586 | - FORCE_RET(); | |
| 587 | -} | |
| 588 | - | |
| 589 | -OP(subf64) | |
| 590 | -{ | |
| 591 | - float64 op0 = get_opf64(PARAM2); | |
| 592 | - float64 op1 = get_opf64(PARAM3); | |
| 593 | - set_opf64(PARAM1, float64_sub(op0, op1, &CPU_FP_STATUS)); | |
| 594 | - FORCE_RET(); | |
| 595 | -} | |
| 596 | - | |
| 597 | -OP(mulf64) | |
| 598 | -{ | |
| 599 | - float64 op0 = get_opf64(PARAM2); | |
| 600 | - float64 op1 = get_opf64(PARAM3); | |
| 601 | - set_opf64(PARAM1, float64_mul(op0, op1, &CPU_FP_STATUS)); | |
| 602 | - FORCE_RET(); | |
| 603 | -} | |
| 604 | - | |
| 605 | -OP(divf64) | |
| 606 | -{ | |
| 607 | - float64 op0 = get_opf64(PARAM2); | |
| 608 | - float64 op1 = get_opf64(PARAM3); | |
| 609 | - set_opf64(PARAM1, float64_div(op0, op1, &CPU_FP_STATUS)); | |
| 610 | - FORCE_RET(); | |
| 611 | -} | |
| 612 | - | |
| 613 | -OP(iround_f64) | |
| 614 | -{ | |
| 615 | - float64 op0 = get_opf64(PARAM2); | |
| 616 | - set_opf64(PARAM1, float64_round_to_int(op0, &CPU_FP_STATUS)); | |
| 617 | - FORCE_RET(); | |
| 618 | -} | |
| 619 | - | |
| 620 | -OP(itrunc_f64) | |
| 621 | -{ | |
| 622 | - float64 op0 = get_opf64(PARAM2); | |
| 623 | - set_opf64(PARAM1, float64_trunc_to_int(op0, &CPU_FP_STATUS)); | |
| 624 | - FORCE_RET(); | |
| 625 | -} | |
| 626 | - | |
| 627 | -OP(compare_quietf64) | |
| 628 | -{ | |
| 629 | - float64 op0 = get_opf64(PARAM2); | |
| 630 | - float64 op1 = get_opf64(PARAM3); | |
| 631 | - set_op(PARAM1, float64_compare_quiet(op0, op1, &CPU_FP_STATUS)); | |
| 632 | - FORCE_RET(); | |
| 633 | -} | |
| 634 | - | |
| 635 | -OP(movec) | |
| 636 | -{ | |
| 637 | - int op1 = get_op(PARAM1); | |
| 638 | - uint32_t op2 = get_op(PARAM2); | |
| 639 | - helper_movec(env, op1, op2); | |
| 640 | -} | |
| 641 | - | |
| 642 | -/* Memory access. */ | |
| 643 | - | |
| 644 | -#define MEMSUFFIX _raw | |
| 645 | -#include "op_mem.h" | |
| 646 | - | |
| 647 | -#if !defined(CONFIG_USER_ONLY) | |
| 648 | -#define MEMSUFFIX _user | |
| 649 | -#include "op_mem.h" | |
| 650 | -#define MEMSUFFIX _kernel | |
| 651 | -#include "op_mem.h" | |
| 652 | -#endif | |
| 653 | - | |
| 654 | -/* MAC unit. */ | |
| 655 | -/* TODO: The MAC instructions use 64-bit arithmetic fairly extensively. | |
| 656 | - This results in fairly large ops (and sometimes other issues) on 32-bit | |
| 657 | - hosts. Maybe move most of them into helpers. */ | |
| 658 | -OP(macmuls) | |
| 659 | -{ | |
| 660 | - uint32_t op1 = get_op(PARAM1); | |
| 661 | - uint32_t op2 = get_op(PARAM2); | |
| 662 | - int64_t product; | |
| 663 | - int64_t res; | |
| 664 | - | |
| 665 | - product = (uint64_t)op1 * op2; | |
| 666 | - res = (product << 24) >> 24; | |
| 667 | - if (res != product) { | |
| 668 | - env->macsr |= MACSR_V; | |
| 669 | - if (env->macsr & MACSR_OMC) { | |
| 670 | - /* Make sure the accumulate operation overflows. */ | |
| 671 | - if (product < 0) | |
| 672 | - res = ~(1ll << 50); | |
| 673 | - else | |
| 674 | - res = 1ll << 50; | |
| 675 | - } | |
| 676 | - } | |
| 677 | - env->mactmp = res; | |
| 678 | - FORCE_RET(); | |
| 679 | -} | |
| 680 | - | |
| 681 | -OP(macmulu) | |
| 682 | -{ | |
| 683 | - uint32_t op1 = get_op(PARAM1); | |
| 684 | - uint32_t op2 = get_op(PARAM2); | |
| 685 | - uint64_t product; | |
| 686 | - | |
| 687 | - product = (uint64_t)op1 * op2; | |
| 688 | - if (product & (0xffffffull << 40)) { | |
| 689 | - env->macsr |= MACSR_V; | |
| 690 | - if (env->macsr & MACSR_OMC) { | |
| 691 | - /* Make sure the accumulate operation overflows. */ | |
| 692 | - product = 1ll << 50; | |
| 693 | - } else { | |
| 694 | - product &= ((1ull << 40) - 1); | |
| 695 | - } | |
| 696 | - } | |
| 697 | - env->mactmp = product; | |
| 698 | - FORCE_RET(); | |
| 699 | -} | |
| 700 | - | |
| 701 | -OP(macmulf) | |
| 702 | -{ | |
| 703 | - int32_t op1 = get_op(PARAM1); | |
| 704 | - int32_t op2 = get_op(PARAM2); | |
| 705 | - uint64_t product; | |
| 706 | - uint32_t remainder; | |
| 707 | - | |
| 708 | - product = (uint64_t)op1 * op2; | |
| 709 | - if (env->macsr & MACSR_RT) { | |
| 710 | - remainder = product & 0xffffff; | |
| 711 | - product >>= 24; | |
| 712 | - if (remainder > 0x800000) | |
| 713 | - product++; | |
| 714 | - else if (remainder == 0x800000) | |
| 715 | - product += (product & 1); | |
| 716 | - } else { | |
| 717 | - product >>= 24; | |
| 718 | - } | |
| 719 | - env->mactmp = product; | |
| 720 | - FORCE_RET(); | |
| 721 | -} | |
| 722 | - | |
| 723 | -OP(macshl) | |
| 724 | -{ | |
| 725 | - env->mactmp <<= 1; | |
| 726 | -} | |
| 727 | - | |
| 728 | -OP(macshr) | |
| 729 | -{ | |
| 730 | - env->mactmp >>= 1; | |
| 731 | -} | |
| 732 | - | |
| 733 | -OP(macadd) | |
| 734 | -{ | |
| 735 | - int acc = PARAM1; | |
| 736 | - env->macc[acc] += env->mactmp; | |
| 737 | - FORCE_RET(); | |
| 738 | -} | |
| 739 | - | |
| 740 | -OP(macsub) | |
| 741 | -{ | |
| 742 | - int acc = PARAM1; | |
| 743 | - env->macc[acc] -= env->mactmp; | |
| 744 | - FORCE_RET(); | |
| 745 | -} | |
| 746 | - | |
| 747 | -OP(macsats) | |
| 748 | -{ | |
| 749 | - int acc = PARAM1; | |
| 750 | - int64_t sum; | |
| 751 | - int64_t result; | |
| 752 | - | |
| 753 | - sum = env->macc[acc]; | |
| 754 | - result = (sum << 16) >> 16; | |
| 755 | - if (result != sum) { | |
| 756 | - env->macsr |= MACSR_V; | |
| 757 | - } | |
| 758 | - if (env->macsr & MACSR_V) { | |
| 759 | - env->macsr |= MACSR_PAV0 << acc; | |
| 760 | - if (env->macsr & MACSR_OMC) { | |
| 761 | - /* The result is saturated to 32 bits, despite overflow occuring | |
| 762 | - at 48 bits. Seems weird, but that's what the hardware docs | |
| 763 | - say. */ | |
| 764 | - result = (result >> 63) ^ 0x7fffffff; | |
| 765 | - } | |
| 766 | - } | |
| 767 | - env->macc[acc] = result; | |
| 768 | - FORCE_RET(); | |
| 769 | -} | |
| 770 | - | |
| 771 | -OP(macsatu) | |
| 772 | -{ | |
| 773 | - int acc = PARAM1; | |
| 774 | - uint64_t sum; | |
| 775 | - | |
| 776 | - sum = env->macc[acc]; | |
| 777 | - if (sum & (0xffffull << 48)) { | |
| 778 | - env->macsr |= MACSR_V; | |
| 779 | - } | |
| 780 | - if (env->macsr & MACSR_V) { | |
| 781 | - env->macsr |= MACSR_PAV0 << acc; | |
| 782 | - if (env->macsr & MACSR_OMC) { | |
| 783 | - if (sum > (1ull << 53)) | |
| 784 | - sum = 0; | |
| 785 | - else | |
| 786 | - sum = (1ull << 48) - 1; | |
| 787 | - } else { | |
| 788 | - sum &= ((1ull << 48) - 1); | |
| 789 | - } | |
| 790 | - } | |
| 791 | - FORCE_RET(); | |
| 792 | -} | |
| 793 | - | |
| 794 | -OP(macsatf) | |
| 795 | -{ | |
| 796 | - int acc = PARAM1; | |
| 797 | - int64_t sum; | |
| 798 | - int64_t result; | |
| 799 | - | |
| 800 | - sum = env->macc[acc]; | |
| 801 | - result = (sum << 16) >> 16; | |
| 802 | - if (result != sum) { | |
| 803 | - env->macsr |= MACSR_V; | |
| 804 | - } | |
| 805 | - if (env->macsr & MACSR_V) { | |
| 806 | - env->macsr |= MACSR_PAV0 << acc; | |
| 807 | - if (env->macsr & MACSR_OMC) { | |
| 808 | - result = (result >> 63) ^ 0x7fffffffffffll; | |
| 809 | - } | |
| 810 | - } | |
| 811 | - env->macc[acc] = result; | |
| 812 | - FORCE_RET(); | |
| 813 | -} | |
| 814 | - | |
| 815 | -OP(mac_clear_flags) | |
| 816 | -{ | |
| 817 | - env->macsr &= ~(MACSR_V | MACSR_Z | MACSR_N | MACSR_EV); | |
| 818 | -} | |
| 819 | - | |
| 820 | -OP(mac_set_flags) | |
| 821 | -{ | |
| 822 | - int acc = PARAM1; | |
| 823 | - uint64_t val; | |
| 824 | - val = env->macc[acc]; | |
| 825 | - if (val == 0) | |
| 826 | - env->macsr |= MACSR_Z; | |
| 827 | - else if (val & (1ull << 47)); | |
| 828 | - env->macsr |= MACSR_N; | |
| 829 | - if (env->macsr & (MACSR_PAV0 << acc)) { | |
| 830 | - env->macsr |= MACSR_V; | |
| 831 | - } | |
| 832 | - if (env->macsr & MACSR_FI) { | |
| 833 | - val = ((int64_t)val) >> 40; | |
| 834 | - if (val != 0 && val != -1) | |
| 835 | - env->macsr |= MACSR_EV; | |
| 836 | - } else if (env->macsr & MACSR_SU) { | |
| 837 | - val = ((int64_t)val) >> 32; | |
| 838 | - if (val != 0 && val != -1) | |
| 839 | - env->macsr |= MACSR_EV; | |
| 840 | - } else { | |
| 841 | - if ((val >> 32) != 0) | |
| 842 | - env->macsr |= MACSR_EV; | |
| 843 | - } | |
| 844 | - FORCE_RET(); | |
| 845 | -} | |
| 846 | - | |
| 847 | -OP(get_macf) | |
| 848 | -{ | |
| 849 | - int acc = PARAM2; | |
| 850 | - int64_t val; | |
| 851 | - int rem; | |
| 852 | - uint32_t result; | |
| 853 | - | |
| 854 | - val = env->macc[acc]; | |
| 855 | - if (env->macsr & MACSR_SU) { | |
| 856 | - /* 16-bit rounding. */ | |
| 857 | - rem = val & 0xffffff; | |
| 858 | - val = (val >> 24) & 0xffffu; | |
| 859 | - if (rem > 0x800000) | |
| 860 | - val++; | |
| 861 | - else if (rem == 0x800000) | |
| 862 | - val += (val & 1); | |
| 863 | - } else if (env->macsr & MACSR_RT) { | |
| 864 | - /* 32-bit rounding. */ | |
| 865 | - rem = val & 0xff; | |
| 866 | - val >>= 8; | |
| 867 | - if (rem > 0x80) | |
| 868 | - val++; | |
| 869 | - else if (rem == 0x80) | |
| 870 | - val += (val & 1); | |
| 871 | - } else { | |
| 872 | - /* No rounding. */ | |
| 873 | - val >>= 8; | |
| 874 | - } | |
| 875 | - if (env->macsr & MACSR_OMC) { | |
| 876 | - /* Saturate. */ | |
| 877 | - if (env->macsr & MACSR_SU) { | |
| 878 | - if (val != (uint16_t) val) { | |
| 879 | - result = ((val >> 63) ^ 0x7fff) & 0xffff; | |
| 880 | - } else { | |
| 881 | - result = val & 0xffff; | |
| 882 | - } | |
| 883 | - } else { | |
| 884 | - if (val != (uint32_t)val) { | |
| 885 | - result = ((uint32_t)(val >> 63) & 0x7fffffff); | |
| 886 | - } else { | |
| 887 | - result = (uint32_t)val; | |
| 888 | - } | |
| 889 | - } | |
| 890 | - } else { | |
| 891 | - /* No saturation. */ | |
| 892 | - if (env->macsr & MACSR_SU) { | |
| 893 | - result = val & 0xffff; | |
| 894 | - } else { | |
| 895 | - result = (uint32_t)val; | |
| 896 | - } | |
| 897 | - } | |
| 898 | - set_op(PARAM1, result); | |
| 899 | - FORCE_RET(); | |
| 900 | -} | |
| 901 | - | |
| 902 | -OP(get_maci) | |
| 903 | -{ | |
| 904 | - int acc = PARAM2; | |
| 905 | - set_op(PARAM1, (uint32_t)env->macc[acc]); | |
| 906 | - FORCE_RET(); | |
| 907 | -} | |
| 908 | - | |
| 909 | -OP(get_macs) | |
| 910 | -{ | |
| 911 | - int acc = PARAM2; | |
| 912 | - int64_t val = env->macc[acc]; | |
| 913 | - uint32_t result; | |
| 914 | - if (val == (int32_t)val) { | |
| 915 | - result = (int32_t)val; | |
| 916 | - } else { | |
| 917 | - result = (val >> 61) ^ 0x7fffffff; | |
| 918 | - } | |
| 919 | - set_op(PARAM1, result); | |
| 920 | - FORCE_RET(); | |
| 921 | -} | |
| 922 | - | |
| 923 | -OP(get_macu) | |
| 924 | -{ | |
| 925 | - int acc = PARAM2; | |
| 926 | - uint64_t val = env->macc[acc]; | |
| 927 | - uint32_t result; | |
| 928 | - if ((val >> 32) == 0) { | |
| 929 | - result = (uint32_t)val; | |
| 930 | - } else { | |
| 931 | - result = 0xffffffffu; | |
| 932 | - } | |
| 933 | - set_op(PARAM1, result); | |
| 934 | - FORCE_RET(); | |
| 935 | -} | |
| 936 | - | |
| 937 | -OP(clear_mac) | |
| 938 | -{ | |
| 939 | - int acc = PARAM1; | |
| 940 | - | |
| 941 | - env->macc[acc] = 0; | |
| 942 | - env->macsr &= ~(MACSR_PAV0 << acc); | |
| 943 | - FORCE_RET(); | |
| 944 | -} | |
| 945 | - | |
| 946 | -OP(move_mac) | |
| 947 | -{ | |
| 948 | - int dest = PARAM1; | |
| 949 | - int src = PARAM2; | |
| 950 | - uint32_t mask; | |
| 951 | - env->macc[dest] = env->macc[src]; | |
| 952 | - mask = MACSR_PAV0 << dest; | |
| 953 | - if (env->macsr & (MACSR_PAV0 << src)) | |
| 954 | - env->macsr |= mask; | |
| 955 | - else | |
| 956 | - env->macsr &= ~mask; | |
| 957 | - FORCE_RET(); | |
| 958 | -} | |
| 959 | - | |
| 960 | -OP(get_mac_extf) | |
| 961 | -{ | |
| 962 | - uint32_t val; | |
| 963 | - int acc = PARAM2; | |
| 964 | - val = env->macc[acc] & 0x00ff; | |
| 965 | - val = (env->macc[acc] >> 32) & 0xff00; | |
| 966 | - val |= (env->macc[acc + 1] << 16) & 0x00ff0000; | |
| 967 | - val |= (env->macc[acc + 1] >> 16) & 0xff000000; | |
| 968 | - set_op(PARAM1, val); | |
| 969 | - FORCE_RET(); | |
| 970 | -} | |
| 971 | - | |
| 972 | -OP(get_mac_exti) | |
| 973 | -{ | |
| 974 | - uint32_t val; | |
| 975 | - int acc = PARAM2; | |
| 976 | - val = (env->macc[acc] >> 32) & 0xffff; | |
| 977 | - val |= (env->macc[acc + 1] >> 16) & 0xffff0000; | |
| 978 | - set_op(PARAM1, val); | |
| 979 | - FORCE_RET(); | |
| 980 | -} | |
| 981 | - | |
| 982 | -OP(set_macf) | |
| 983 | -{ | |
| 984 | - int acc = PARAM2; | |
| 985 | - int32_t val = get_op(PARAM1); | |
| 986 | - env->macc[acc] = ((int64_t)val) << 8; | |
| 987 | - env->macsr &= ~(MACSR_PAV0 << acc); | |
| 988 | - FORCE_RET(); | |
| 989 | -} | |
| 990 | - | |
| 991 | -OP(set_macs) | |
| 992 | -{ | |
| 993 | - int acc = PARAM2; | |
| 994 | - int32_t val = get_op(PARAM1); | |
| 995 | - env->macc[acc] = val; | |
| 996 | - env->macsr &= ~(MACSR_PAV0 << acc); | |
| 997 | - FORCE_RET(); | |
| 998 | -} | |
| 999 | - | |
| 1000 | -OP(set_macu) | |
| 1001 | -{ | |
| 1002 | - int acc = PARAM2; | |
| 1003 | - uint32_t val = get_op(PARAM1); | |
| 1004 | - env->macc[acc] = val; | |
| 1005 | - env->macsr &= ~(MACSR_PAV0 << acc); | |
| 1006 | - FORCE_RET(); | |
| 1007 | -} | |
| 1008 | - | |
| 1009 | -OP(set_mac_extf) | |
| 1010 | -{ | |
| 1011 | - int acc = PARAM2; | |
| 1012 | - int32_t val = get_op(PARAM1); | |
| 1013 | - int64_t res; | |
| 1014 | - int32_t tmp; | |
| 1015 | - res = env->macc[acc] & 0xffffffff00ull; | |
| 1016 | - tmp = (int16_t)(val & 0xff00); | |
| 1017 | - res |= ((int64_t)tmp) << 32; | |
| 1018 | - res |= val & 0xff; | |
| 1019 | - env->macc[acc] = res; | |
| 1020 | - res = env->macc[acc + 1] & 0xffffffff00ull; | |
| 1021 | - tmp = (val & 0xff000000); | |
| 1022 | - res |= ((int64_t)tmp) << 16; | |
| 1023 | - res |= (val >> 16) & 0xff; | |
| 1024 | - env->macc[acc + 1] = res; | |
| 1025 | -} | |
| 1026 | - | |
| 1027 | -OP(set_mac_exts) | |
| 1028 | -{ | |
| 1029 | - int acc = PARAM2; | |
| 1030 | - int32_t val = get_op(PARAM1); | |
| 1031 | - int64_t res; | |
| 1032 | - int32_t tmp; | |
| 1033 | - res = (uint32_t)env->macc[acc]; | |
| 1034 | - tmp = (int16_t)val; | |
| 1035 | - res |= ((int64_t)tmp) << 32; | |
| 1036 | - env->macc[acc] = res; | |
| 1037 | - res = (uint32_t)env->macc[acc + 1]; | |
| 1038 | - tmp = val & 0xffff0000; | |
| 1039 | - res |= (int64_t)tmp << 16; | |
| 1040 | - env->macc[acc + 1] = res; | |
| 1041 | -} | |
| 1042 | - | |
| 1043 | -OP(set_mac_extu) | |
| 1044 | -{ | |
| 1045 | - int acc = PARAM2; | |
| 1046 | - int32_t val = get_op(PARAM1); | |
| 1047 | - uint64_t res; | |
| 1048 | - res = (uint32_t)env->macc[acc]; | |
| 1049 | - res |= ((uint64_t)(val & 0xffff)) << 32; | |
| 1050 | - env->macc[acc] = res; | |
| 1051 | - res = (uint32_t)env->macc[acc + 1]; | |
| 1052 | - res |= (uint64_t)(val & 0xffff0000) << 16; | |
| 1053 | - env->macc[acc + 1] = res; | |
| 1054 | -} | |
| 1055 | - | |
| 1056 | -OP(set_macsr) | |
| 1057 | -{ | |
| 1058 | - m68k_set_macsr(env, get_op(PARAM1)); | |
| 1059 | -} |
target-m68k/op_helper.c
| ... | ... | @@ -18,6 +18,7 @@ |
| 18 | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | 19 | */ |
| 20 | 20 | #include "exec.h" |
| 21 | +#include "helpers.h" | |
| 21 | 22 | |
| 22 | 23 | #if defined(CONFIG_USER_ONLY) |
| 23 | 24 | |
| ... | ... | @@ -161,3 +162,71 @@ void do_interrupt(int is_hw) |
| 161 | 162 | } |
| 162 | 163 | |
| 163 | 164 | #endif |
| 165 | + | |
| 166 | +static void raise_exception(int tt) | |
| 167 | +{ | |
| 168 | + env->exception_index = tt; | |
| 169 | + cpu_loop_exit(); | |
| 170 | +} | |
| 171 | + | |
| 172 | +void HELPER(raise_exception)(uint32_t tt) | |
| 173 | +{ | |
| 174 | + raise_exception(tt); | |
| 175 | +} | |
| 176 | + | |
| 177 | +void HELPER(divu)(CPUState *env, uint32_t word) | |
| 178 | +{ | |
| 179 | + uint32_t num; | |
| 180 | + uint32_t den; | |
| 181 | + uint32_t quot; | |
| 182 | + uint32_t rem; | |
| 183 | + uint32_t flags; | |
| 184 | + | |
| 185 | + num = env->div1; | |
| 186 | + den = env->div2; | |
| 187 | + /* ??? This needs to make sure the throwing location is accurate. */ | |
| 188 | + if (den == 0) | |
| 189 | + raise_exception(EXCP_DIV0); | |
| 190 | + quot = num / den; | |
| 191 | + rem = num % den; | |
| 192 | + flags = 0; | |
| 193 | + /* Avoid using a PARAM1 of zero. This breaks dyngen because it uses | |
| 194 | + the address of a symbol, and gcc knows symbols can't have address | |
| 195 | + zero. */ | |
| 196 | + if (word && quot > 0xffff) | |
| 197 | + flags |= CCF_V; | |
| 198 | + if (quot == 0) | |
| 199 | + flags |= CCF_Z; | |
| 200 | + else if ((int32_t)quot < 0) | |
| 201 | + flags |= CCF_N; | |
| 202 | + env->div1 = quot; | |
| 203 | + env->div2 = rem; | |
| 204 | + env->cc_dest = flags; | |
| 205 | +} | |
| 206 | + | |
| 207 | +void HELPER(divs)(CPUState *env, uint32_t word) | |
| 208 | +{ | |
| 209 | + int32_t num; | |
| 210 | + int32_t den; | |
| 211 | + int32_t quot; | |
| 212 | + int32_t rem; | |
| 213 | + int32_t flags; | |
| 214 | + | |
| 215 | + num = env->div1; | |
| 216 | + den = env->div2; | |
| 217 | + if (den == 0) | |
| 218 | + raise_exception(EXCP_DIV0); | |
| 219 | + quot = num / den; | |
| 220 | + rem = num % den; | |
| 221 | + flags = 0; | |
| 222 | + if (word && quot != (int16_t)quot) | |
| 223 | + flags |= CCF_V; | |
| 224 | + if (quot == 0) | |
| 225 | + flags |= CCF_Z; | |
| 226 | + else if (quot < 0) | |
| 227 | + flags |= CCF_N; | |
| 228 | + env->div1 = quot; | |
| 229 | + env->div2 = rem; | |
| 230 | + env->cc_dest = flags; | |
| 231 | +} | |
| 232 | + | ... | ... |
target-m68k/op_mem.h deleted
100644 → 0
| 1 | -/* Load/store ops. */ | |
| 2 | -#define MEM_LD_OP(name,suffix) \ | |
| 3 | -OP(glue(glue(ld,name),MEMSUFFIX)) \ | |
| 4 | -{ \ | |
| 5 | - uint32_t addr = get_op(PARAM2); \ | |
| 6 | - set_op(PARAM1, glue(glue(ld,suffix),MEMSUFFIX)(addr)); \ | |
| 7 | - FORCE_RET(); \ | |
| 8 | -} | |
| 9 | - | |
| 10 | -MEM_LD_OP(8u32,ub) | |
| 11 | -MEM_LD_OP(8s32,sb) | |
| 12 | -MEM_LD_OP(16u32,uw) | |
| 13 | -MEM_LD_OP(16s32,sw) | |
| 14 | -MEM_LD_OP(32,l) | |
| 15 | - | |
| 16 | -#undef MEM_LD_OP | |
| 17 | - | |
| 18 | -#define MEM_ST_OP(name,suffix) \ | |
| 19 | -OP(glue(glue(st,name),MEMSUFFIX)) \ | |
| 20 | -{ \ | |
| 21 | - uint32_t addr = get_op(PARAM1); \ | |
| 22 | - glue(glue(st,suffix),MEMSUFFIX)(addr, get_op(PARAM2)); \ | |
| 23 | - FORCE_RET(); \ | |
| 24 | -} | |
| 25 | - | |
| 26 | -MEM_ST_OP(8,b) | |
| 27 | -MEM_ST_OP(16,w) | |
| 28 | -MEM_ST_OP(32,l) | |
| 29 | - | |
| 30 | -#undef MEM_ST_OP | |
| 31 | - | |
| 32 | -OP(glue(ldf64,MEMSUFFIX)) | |
| 33 | -{ | |
| 34 | - uint32_t addr = get_op(PARAM2); | |
| 35 | - set_opf64(PARAM1, glue(ldfq,MEMSUFFIX)(addr)); | |
| 36 | - FORCE_RET(); | |
| 37 | -} | |
| 38 | - | |
| 39 | -OP(glue(stf64,MEMSUFFIX)) | |
| 40 | -{ | |
| 41 | - uint32_t addr = get_op(PARAM1); | |
| 42 | - glue(stfq,MEMSUFFIX)(addr, get_opf64(PARAM2)); | |
| 43 | - FORCE_RET(); | |
| 44 | -} | |
| 45 | - | |
| 46 | -#undef MEMSUFFIX |
target-m68k/qregs.def
| 1 | -DEFO32(D0, dregs[0]) | |
| 2 | -DEFO32(D1, dregs[1]) | |
| 3 | -DEFO32(D2, dregs[2]) | |
| 4 | -DEFO32(D3, dregs[3]) | |
| 5 | -DEFO32(D4, dregs[4]) | |
| 6 | -DEFO32(D5, dregs[5]) | |
| 7 | -DEFO32(D6, dregs[6]) | |
| 8 | -DEFO32(D7, dregs[7]) | |
| 9 | -DEFO32(A0, aregs[0]) | |
| 10 | -DEFO32(A1, aregs[1]) | |
| 11 | -DEFO32(A2, aregs[2]) | |
| 12 | -DEFO32(A3, aregs[3]) | |
| 13 | -DEFO32(A4, aregs[4]) | |
| 14 | -DEFO32(A5, aregs[5]) | |
| 15 | -DEFO32(A6, aregs[6]) | |
| 16 | -DEFO32(SP, aregs[7]) /* A7 */ | |
| 17 | -DEFF64(F0, fregs[0]) | |
| 18 | -DEFF64(F1, fregs[1]) | |
| 19 | -DEFF64(F2, fregs[2]) | |
| 20 | -DEFF64(F3, fregs[3]) | |
| 21 | -DEFF64(F4, fregs[4]) | |
| 22 | -DEFF64(F5, fregs[5]) | |
| 23 | -DEFF64(F6, fregs[6]) | |
| 24 | -DEFF64(F7, fregs[7]) | |
| 25 | 1 | DEFF64(FP_RESULT, fp_result) |
| 26 | 2 | DEFO32(PC, pc) |
| 27 | 3 | DEFO32(SR, sr) |
| 28 | 4 | DEFO32(CC_OP, cc_op) |
| 29 | -DEFR(T0, AREG1, QMODE_I32) | |
| 30 | 5 | DEFO32(CC_DEST, cc_dest) |
| 31 | 6 | DEFO32(CC_SRC, cc_src) |
| 32 | 7 | DEFO32(CC_X, cc_x) |
| 33 | 8 | DEFO32(DIV1, div1) |
| 34 | 9 | DEFO32(DIV2, div2) |
| 35 | 10 | DEFO32(EXCEPTION, exception_index) |
| 11 | +DEFO32(HALTED, halted) | |
| 36 | 12 | DEFO32(MACSR, macsr) |
| 37 | 13 | DEFO32(MAC_MASK, mac_mask) | ... | ... |