Commit dfaa85834f5b9eac62bd0c8e951b309d9bafc66b
1 parent
01ff9cc8
target-alpha: instruction decoding simplification
Use a litteral value of 0 when rb31 is used. This reduces the tests in the instruction decoding. Also remove almost unused corner cases. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5250 c046a42c-6fe2-441c-8c8c-71466251a162
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1 changed file
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134 additions
and
234 deletions
target-alpha/translate.c
... | ... | @@ -378,10 +378,8 @@ static always_inline void gen_arith3 (DisasContext *ctx, |
378 | 378 | tcg_gen_movi_i64(cpu_T[0], 0); |
379 | 379 | if (islit) |
380 | 380 | tcg_gen_movi_i64(cpu_T[1], lit); |
381 | - else if (rb != 31) | |
382 | - tcg_gen_mov_i64(cpu_T[1], cpu_ir[rb]); | |
383 | 381 | else |
384 | - tcg_gen_movi_i64(cpu_T[1], 0); | |
382 | + tcg_gen_mov_i64(cpu_T[1], cpu_ir[rb]); | |
385 | 383 | (*gen_arith_op)(); |
386 | 384 | if (rc != 31) |
387 | 385 | tcg_gen_mov_i64(cpu_ir[rc], cpu_T[0]); |
... | ... | @@ -416,10 +414,8 @@ static always_inline void gen_cmov (DisasContext *ctx, |
416 | 414 | |
417 | 415 | if (islit) |
418 | 416 | tcg_gen_movi_i64(cpu_ir[rc], lit); |
419 | - else if (rb != 31) | |
420 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
421 | 417 | else |
422 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
418 | + tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
423 | 419 | gen_set_label(l1); |
424 | 420 | } |
425 | 421 | |
... | ... | @@ -483,9 +479,12 @@ static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1), |
483 | 479 | return; |
484 | 480 | |
485 | 481 | if (ra != 31) { |
486 | - if (islit) | |
487 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 64 - ((lit & 7) * 8)); | |
488 | - else if (rb != 31) { | |
482 | + if (islit) { | |
483 | + if (lit != 0) | |
484 | + tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 64 - ((lit & 7) * 8)); | |
485 | + else | |
486 | + tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
487 | + } else { | |
489 | 488 | TCGv tmp1, tmp2; |
490 | 489 | tmp1 = tcg_temp_new(TCG_TYPE_I64); |
491 | 490 | tcg_gen_andi_i64(tmp1, cpu_ir[rb], 7); |
... | ... | @@ -493,14 +492,11 @@ static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1), |
493 | 492 | tmp2 = tcg_const_i64(64); |
494 | 493 | tcg_gen_sub_i64(tmp1, tmp2, tmp1); |
495 | 494 | tcg_temp_free(tmp2); |
496 | - if (tcg_gen_ext_i64) { | |
497 | - tcg_gen_shl_i64(tmp1, cpu_ir[ra], tmp1); | |
498 | - tcg_gen_ext_i64(cpu_ir[rc], tmp1); | |
499 | - } else | |
500 | - tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], tmp1); | |
495 | + tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], tmp1); | |
501 | 496 | tcg_temp_free(tmp1); |
502 | - } else | |
503 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
497 | + } | |
498 | + if (tcg_gen_ext_i64) | |
499 | + tcg_gen_ext_i64(cpu_ir[rc], cpu_ir[rc]); | |
504 | 500 | } else |
505 | 501 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
506 | 502 | } |
... | ... | @@ -514,20 +510,17 @@ static always_inline void gen_ext_l(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1), |
514 | 510 | return; |
515 | 511 | |
516 | 512 | if (ra != 31) { |
517 | - if (islit) | |
518 | - tcg_gen_shri_i64(cpu_ir[rc], cpu_ir[ra], (lit & 7) * 8); | |
519 | - else if (rb != 31) { | |
513 | + if (islit) { | |
514 | + tcg_gen_shri_i64(cpu_ir[rc], cpu_ir[ra], (lit & 7) * 8); | |
515 | + } else { | |
520 | 516 | TCGv tmp = tcg_temp_new(TCG_TYPE_I64); |
521 | 517 | tcg_gen_andi_i64(tmp, cpu_ir[rb], 7); |
522 | 518 | tcg_gen_shli_i64(tmp, tmp, 3); |
523 | - if (tcg_gen_ext_i64) { | |
524 | - tcg_gen_shr_i64(tmp, cpu_ir[ra], tmp); | |
525 | - tcg_gen_ext_i64(cpu_ir[rc], tmp); | |
526 | - } else | |
527 | - tcg_gen_shr_i64(cpu_ir[rc], cpu_ir[ra], tmp); | |
519 | + tcg_gen_shr_i64(cpu_ir[rc], cpu_ir[ra], tmp); | |
528 | 520 | tcg_temp_free(tmp); |
529 | - } else | |
530 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
521 | + } | |
522 | + if (tcg_gen_ext_i64) | |
523 | + tcg_gen_ext_i64(cpu_ir[rc], cpu_ir[rc]); | |
531 | 524 | } else |
532 | 525 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
533 | 526 | } |
... | ... | @@ -547,12 +540,8 @@ static always_inline void gen_byte_manipulation(void *helper, |
547 | 540 | return; |
548 | 541 | |
549 | 542 | if (ra != 31) { |
550 | - if (islit || rb == 31) { | |
551 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
552 | - if (islit) | |
553 | - tcg_gen_movi_i64(tmp, lit); | |
554 | - else | |
555 | - tcg_gen_movi_i64(tmp, 0); | |
543 | + if (islit) { | |
544 | + TCGv tmp = tcg_const_i64(lit); | |
556 | 545 | tcg_gen_helper_1_2(helper, cpu_ir[rc], cpu_ir[ra], tmp); |
557 | 546 | tcg_temp_free(tmp); |
558 | 547 | } else |
... | ... | @@ -581,10 +570,8 @@ static always_inline void gen_cmp(TCGCond cond, |
581 | 570 | tmp = tcg_const_i64(0); |
582 | 571 | if (islit) |
583 | 572 | tcg_gen_brcondi_i64(cond, tmp, lit, l1); |
584 | - else if (rb != 31) | |
585 | - tcg_gen_brcond_i64(cond, tmp, cpu_ir[rb], l1); | |
586 | 573 | else |
587 | - tcg_gen_brcondi_i64(cond, tmp, 0, l1); | |
574 | + tcg_gen_brcond_i64(cond, tmp, cpu_ir[rb], l1); | |
588 | 575 | |
589 | 576 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
590 | 577 | tcg_gen_br(l2); |
... | ... | @@ -609,7 +596,11 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
609 | 596 | rc = insn & 0x1F; |
610 | 597 | sbz = (insn >> 13) & 0x07; |
611 | 598 | islit = (insn >> 12) & 1; |
612 | - lit = (insn >> 13) & 0xFF; | |
599 | + if (rb == 31 && !islit) { | |
600 | + islit = 1; | |
601 | + lit = 0; | |
602 | + } else | |
603 | + lit = (insn >> 13) & 0xFF; | |
613 | 604 | palcode = insn & 0x03FFFFFF; |
614 | 605 | disp21 = ((int32_t)((insn & 0x001FFFFF) << 11)) >> 11; |
615 | 606 | disp16 = (int16_t)(insn & 0x0000FFFF); |
... | ... | @@ -726,18 +717,15 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
726 | 717 | if (islit) { |
727 | 718 | tcg_gen_addi_i64(cpu_ir[rc], cpu_ir[ra], lit); |
728 | 719 | tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); |
729 | - } else if (rb != 31) { | |
720 | + } else { | |
730 | 721 | tcg_gen_add_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); |
731 | 722 | tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); |
732 | - } else | |
733 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[ra]); | |
723 | + } | |
734 | 724 | } else { |
735 | 725 | if (islit) |
736 | - tcg_gen_movi_i64(cpu_ir[rc], (int32_t)lit); | |
737 | - else if (rb != 31) | |
738 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); | |
726 | + tcg_gen_movi_i64(cpu_ir[rc], lit); | |
739 | 727 | else |
740 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
728 | + tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); | |
741 | 729 | } |
742 | 730 | } |
743 | 731 | break; |
... | ... | @@ -745,26 +733,19 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
745 | 733 | /* S4ADDL */ |
746 | 734 | if (likely(rc != 31)) { |
747 | 735 | if (ra != 31) { |
748 | - if (islit || rb != 31) { | |
749 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
750 | - tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); | |
751 | - if (islit) | |
752 | - tcg_gen_addi_i64(tmp, tmp, lit); | |
753 | - else | |
754 | - tcg_gen_add_i64(tmp, tmp, cpu_ir[rb]); | |
755 | - tcg_gen_ext32s_i64(cpu_ir[rc], tmp); | |
756 | - tcg_temp_free(tmp); | |
757 | - } else { | |
758 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 2); | |
759 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); | |
760 | - } | |
736 | + TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
737 | + tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); | |
738 | + if (islit) | |
739 | + tcg_gen_addi_i64(tmp, tmp, lit); | |
740 | + else | |
741 | + tcg_gen_add_i64(tmp, tmp, cpu_ir[rb]); | |
742 | + tcg_gen_ext32s_i64(cpu_ir[rc], tmp); | |
743 | + tcg_temp_free(tmp); | |
761 | 744 | } else { |
762 | 745 | if (islit) |
763 | 746 | tcg_gen_movi_i64(cpu_ir[rc], lit); |
764 | - else if (rb != 31) | |
765 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); | |
766 | 747 | else |
767 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
748 | + tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); | |
768 | 749 | } |
769 | 750 | } |
770 | 751 | break; |
... | ... | @@ -772,22 +753,17 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
772 | 753 | /* SUBL */ |
773 | 754 | if (likely(rc != 31)) { |
774 | 755 | if (ra != 31) { |
775 | - if (islit) { | |
756 | + if (islit) | |
776 | 757 | tcg_gen_subi_i64(cpu_ir[rc], cpu_ir[ra], lit); |
777 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); | |
778 | - } else if (rb != 31) { | |
758 | + else | |
779 | 759 | tcg_gen_sub_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); |
780 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); | |
781 | - } else | |
782 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[ra]); | |
760 | + tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); | |
783 | 761 | } else { |
784 | 762 | if (islit) |
785 | 763 | tcg_gen_movi_i64(cpu_ir[rc], -lit); |
786 | - else if (rb != 31) { | |
764 | + else { | |
787 | 765 | tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); |
788 | 766 | tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); |
789 | - } else | |
790 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
791 | 767 | } |
792 | 768 | } |
793 | 769 | break; |
... | ... | @@ -795,27 +771,21 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
795 | 771 | /* S4SUBL */ |
796 | 772 | if (likely(rc != 31)) { |
797 | 773 | if (ra != 31) { |
798 | - if (islit || rb != 31) { | |
799 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
800 | - tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); | |
801 | - if (islit) | |
802 | - tcg_gen_subi_i64(tmp, tmp, lit); | |
803 | - else | |
804 | - tcg_gen_sub_i64(tmp, tmp, cpu_ir[rb]); | |
805 | - tcg_gen_ext32s_i64(cpu_ir[rc], tmp); | |
806 | - tcg_temp_free(tmp); | |
807 | - } else { | |
808 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 2); | |
809 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); | |
810 | - } | |
774 | + TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
775 | + tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); | |
776 | + if (islit) | |
777 | + tcg_gen_subi_i64(tmp, tmp, lit); | |
778 | + else | |
779 | + tcg_gen_sub_i64(tmp, tmp, cpu_ir[rb]); | |
780 | + tcg_gen_ext32s_i64(cpu_ir[rc], tmp); | |
781 | + tcg_temp_free(tmp); | |
811 | 782 | } else { |
812 | 783 | if (islit) |
813 | 784 | tcg_gen_movi_i64(cpu_ir[rc], -lit); |
814 | - else if (rb != 31) { | |
785 | + else { | |
815 | 786 | tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); |
816 | 787 | tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); |
817 | - } else | |
818 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
788 | + } | |
819 | 789 | } |
820 | 790 | } |
821 | 791 | break; |
... | ... | @@ -827,26 +797,19 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
827 | 797 | /* S8ADDL */ |
828 | 798 | if (likely(rc != 31)) { |
829 | 799 | if (ra != 31) { |
830 | - if (islit || rb != 31) { | |
831 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
832 | - tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); | |
833 | - if (islit) | |
834 | - tcg_gen_addi_i64(tmp, tmp, lit); | |
835 | - else | |
836 | - tcg_gen_add_i64(tmp, tmp, cpu_ir[rb]); | |
837 | - tcg_gen_ext32s_i64(cpu_ir[rc], tmp); | |
838 | - tcg_temp_free(tmp); | |
839 | - } else { | |
840 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 3); | |
841 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); | |
842 | - } | |
800 | + TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
801 | + tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); | |
802 | + if (islit) | |
803 | + tcg_gen_addi_i64(tmp, tmp, lit); | |
804 | + else | |
805 | + tcg_gen_add_i64(tmp, tmp, cpu_ir[rb]); | |
806 | + tcg_gen_ext32s_i64(cpu_ir[rc], tmp); | |
807 | + tcg_temp_free(tmp); | |
843 | 808 | } else { |
844 | 809 | if (islit) |
845 | 810 | tcg_gen_movi_i64(cpu_ir[rc], lit); |
846 | - else if (rb != 31) | |
847 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); | |
848 | 811 | else |
849 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
812 | + tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); | |
850 | 813 | } |
851 | 814 | } |
852 | 815 | break; |
... | ... | @@ -854,27 +817,21 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
854 | 817 | /* S8SUBL */ |
855 | 818 | if (likely(rc != 31)) { |
856 | 819 | if (ra != 31) { |
857 | - if (islit || rb != 31) { | |
858 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
859 | - tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); | |
860 | - if (islit) | |
861 | - tcg_gen_subi_i64(tmp, tmp, lit); | |
862 | - else | |
863 | - tcg_gen_sub_i64(tmp, tmp, cpu_ir[rb]); | |
864 | - tcg_gen_ext32s_i64(cpu_ir[rc], tmp); | |
865 | - tcg_temp_free(tmp); | |
866 | - } else { | |
867 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 3); | |
868 | - tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); | |
869 | - } | |
820 | + TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
821 | + tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); | |
822 | + if (islit) | |
823 | + tcg_gen_subi_i64(tmp, tmp, lit); | |
824 | + else | |
825 | + tcg_gen_sub_i64(tmp, tmp, cpu_ir[rb]); | |
826 | + tcg_gen_ext32s_i64(cpu_ir[rc], tmp); | |
827 | + tcg_temp_free(tmp); | |
870 | 828 | } else { |
871 | 829 | if (islit) |
872 | 830 | tcg_gen_movi_i64(cpu_ir[rc], -lit); |
873 | - else if (rb != 31) { | |
831 | + else | |
874 | 832 | tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); |
875 | 833 | tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); |
876 | - } else | |
877 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
834 | + } | |
878 | 835 | } |
879 | 836 | } |
880 | 837 | break; |
... | ... | @@ -888,17 +845,13 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
888 | 845 | if (ra != 31) { |
889 | 846 | if (islit) |
890 | 847 | tcg_gen_addi_i64(cpu_ir[rc], cpu_ir[ra], lit); |
891 | - else if (rb != 31) | |
892 | - tcg_gen_add_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | |
893 | 848 | else |
894 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
849 | + tcg_gen_add_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | |
895 | 850 | } else { |
896 | 851 | if (islit) |
897 | 852 | tcg_gen_movi_i64(cpu_ir[rc], lit); |
898 | - else if (rb != 31) | |
899 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
900 | 853 | else |
901 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
854 | + tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
902 | 855 | } |
903 | 856 | } |
904 | 857 | break; |
... | ... | @@ -906,23 +859,18 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
906 | 859 | /* S4ADDQ */ |
907 | 860 | if (likely(rc != 31)) { |
908 | 861 | if (ra != 31) { |
909 | - if (islit || rb != 31) { | |
910 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
911 | - tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); | |
912 | - if (islit) | |
913 | - tcg_gen_addi_i64(cpu_ir[rc], tmp, lit); | |
914 | - else | |
915 | - tcg_gen_add_i64(cpu_ir[rc], tmp, cpu_ir[rb]); | |
916 | - tcg_temp_free(tmp); | |
917 | - } else | |
918 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 2); | |
862 | + TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
863 | + tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); | |
864 | + if (islit) | |
865 | + tcg_gen_addi_i64(cpu_ir[rc], tmp, lit); | |
866 | + else | |
867 | + tcg_gen_add_i64(cpu_ir[rc], tmp, cpu_ir[rb]); | |
868 | + tcg_temp_free(tmp); | |
919 | 869 | } else { |
920 | 870 | if (islit) |
921 | 871 | tcg_gen_movi_i64(cpu_ir[rc], lit); |
922 | - else if (rb != 31) | |
923 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
924 | 872 | else |
925 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
873 | + tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
926 | 874 | } |
927 | 875 | } |
928 | 876 | break; |
... | ... | @@ -932,17 +880,13 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
932 | 880 | if (ra != 31) { |
933 | 881 | if (islit) |
934 | 882 | tcg_gen_subi_i64(cpu_ir[rc], cpu_ir[ra], lit); |
935 | - else if (rb != 31) | |
936 | - tcg_gen_sub_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | |
937 | 883 | else |
938 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
884 | + tcg_gen_sub_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | |
939 | 885 | } else { |
940 | 886 | if (islit) |
941 | 887 | tcg_gen_movi_i64(cpu_ir[rc], -lit); |
942 | - else if (rb != 31) | |
943 | - tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); | |
944 | 888 | else |
945 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
889 | + tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); | |
946 | 890 | } |
947 | 891 | } |
948 | 892 | break; |
... | ... | @@ -950,23 +894,18 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
950 | 894 | /* S4SUBQ */ |
951 | 895 | if (likely(rc != 31)) { |
952 | 896 | if (ra != 31) { |
953 | - if (islit || rb != 31) { | |
954 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
955 | - tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); | |
956 | - if (islit) | |
957 | - tcg_gen_subi_i64(cpu_ir[rc], tmp, lit); | |
958 | - else | |
959 | - tcg_gen_sub_i64(cpu_ir[rc], tmp, cpu_ir[rb]); | |
960 | - tcg_temp_free(tmp); | |
961 | - } else | |
962 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 2); | |
897 | + TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
898 | + tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); | |
899 | + if (islit) | |
900 | + tcg_gen_subi_i64(cpu_ir[rc], tmp, lit); | |
901 | + else | |
902 | + tcg_gen_sub_i64(cpu_ir[rc], tmp, cpu_ir[rb]); | |
903 | + tcg_temp_free(tmp); | |
963 | 904 | } else { |
964 | 905 | if (islit) |
965 | 906 | tcg_gen_movi_i64(cpu_ir[rc], -lit); |
966 | - else if (rb != 31) | |
967 | - tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); | |
968 | 907 | else |
969 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
908 | + tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); | |
970 | 909 | } |
971 | 910 | } |
972 | 911 | break; |
... | ... | @@ -978,23 +917,18 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
978 | 917 | /* S8ADDQ */ |
979 | 918 | if (likely(rc != 31)) { |
980 | 919 | if (ra != 31) { |
981 | - if (islit || rb != 31) { | |
982 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
983 | - tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); | |
984 | - if (islit) | |
985 | - tcg_gen_addi_i64(cpu_ir[rc], tmp, lit); | |
986 | - else | |
987 | - tcg_gen_add_i64(cpu_ir[rc], tmp, cpu_ir[rb]); | |
988 | - tcg_temp_free(tmp); | |
989 | - } else | |
990 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 3); | |
920 | + TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
921 | + tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); | |
922 | + if (islit) | |
923 | + tcg_gen_addi_i64(cpu_ir[rc], tmp, lit); | |
924 | + else | |
925 | + tcg_gen_add_i64(cpu_ir[rc], tmp, cpu_ir[rb]); | |
926 | + tcg_temp_free(tmp); | |
991 | 927 | } else { |
992 | 928 | if (islit) |
993 | 929 | tcg_gen_movi_i64(cpu_ir[rc], lit); |
994 | - else if (rb != 31) | |
995 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
996 | 930 | else |
997 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
931 | + tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
998 | 932 | } |
999 | 933 | } |
1000 | 934 | break; |
... | ... | @@ -1002,23 +936,18 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1002 | 936 | /* S8SUBQ */ |
1003 | 937 | if (likely(rc != 31)) { |
1004 | 938 | if (ra != 31) { |
1005 | - if (islit || rb != 31) { | |
1006 | - TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
1007 | - tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); | |
1008 | - if (islit) | |
1009 | - tcg_gen_subi_i64(cpu_ir[rc], tmp, lit); | |
1010 | - else | |
1011 | - tcg_gen_sub_i64(cpu_ir[rc], tmp, cpu_ir[rb]); | |
1012 | - tcg_temp_free(tmp); | |
1013 | - } else | |
1014 | - tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 3); | |
939 | + TCGv tmp = tcg_temp_new(TCG_TYPE_I64); | |
940 | + tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); | |
941 | + if (islit) | |
942 | + tcg_gen_subi_i64(cpu_ir[rc], tmp, lit); | |
943 | + else | |
944 | + tcg_gen_sub_i64(cpu_ir[rc], tmp, cpu_ir[rb]); | |
945 | + tcg_temp_free(tmp); | |
1015 | 946 | } else { |
1016 | 947 | if (islit) |
1017 | 948 | tcg_gen_movi_i64(cpu_ir[rc], -lit); |
1018 | - else if (rb != 31) | |
1019 | - tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); | |
1020 | 949 | else |
1021 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
950 | + tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); | |
1022 | 951 | } |
1023 | 952 | } |
1024 | 953 | break; |
... | ... | @@ -1059,7 +988,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1059 | 988 | case 0x00: |
1060 | 989 | /* AND */ |
1061 | 990 | if (likely(rc != 31)) { |
1062 | - if (ra == 31 || (rb == 31 && !islit)) | |
991 | + if (ra == 31) | |
1063 | 992 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
1064 | 993 | else if (islit) |
1065 | 994 | tcg_gen_andi_i64(cpu_ir[rc], cpu_ir[ra], lit); |
... | ... | @@ -1073,13 +1002,12 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1073 | 1002 | if (ra != 31) { |
1074 | 1003 | if (islit) |
1075 | 1004 | tcg_gen_andi_i64(cpu_ir[rc], cpu_ir[ra], ~lit); |
1076 | - else if (rb != 31) { | |
1005 | + else { | |
1077 | 1006 | TCGv tmp = tcg_temp_new(TCG_TYPE_I64); |
1078 | 1007 | tcg_gen_not_i64(tmp, cpu_ir[rb]); |
1079 | 1008 | tcg_gen_and_i64(cpu_ir[rc], cpu_ir[ra], tmp); |
1080 | 1009 | tcg_temp_free(tmp); |
1081 | - } else | |
1082 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
1010 | + } | |
1083 | 1011 | } else |
1084 | 1012 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
1085 | 1013 | } |
... | ... | @@ -1098,17 +1026,13 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1098 | 1026 | if (ra != 31) { |
1099 | 1027 | if (islit) |
1100 | 1028 | tcg_gen_ori_i64(cpu_ir[rc], cpu_ir[ra], lit); |
1101 | - else if (rb != 31) | |
1029 | + else | |
1102 | 1030 | tcg_gen_or_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); |
1103 | - else | |
1104 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
1105 | 1031 | } else { |
1106 | 1032 | if (islit) |
1107 | 1033 | tcg_gen_movi_i64(cpu_ir[rc], lit); |
1108 | - else if (rb != 31) | |
1109 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
1110 | 1034 | else |
1111 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
1035 | + tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
1112 | 1036 | } |
1113 | 1037 | } |
1114 | 1038 | break; |
... | ... | @@ -1123,9 +1047,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1123 | 1047 | case 0x28: |
1124 | 1048 | /* ORNOT */ |
1125 | 1049 | if (likely(rc != 31)) { |
1126 | - if (rb == 31 && !islit) | |
1127 | - tcg_gen_movi_i64(cpu_ir[rc], ~0); | |
1128 | - else if (ra != 31) { | |
1050 | + if (ra != 31) { | |
1129 | 1051 | if (islit) |
1130 | 1052 | tcg_gen_ori_i64(cpu_ir[rc], cpu_ir[ra], ~lit); |
1131 | 1053 | else { |
... | ... | @@ -1148,17 +1070,13 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1148 | 1070 | if (ra != 31) { |
1149 | 1071 | if (islit) |
1150 | 1072 | tcg_gen_xori_i64(cpu_ir[rc], cpu_ir[ra], lit); |
1151 | - else if (rb != 31) | |
1152 | - tcg_gen_xor_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | |
1153 | 1073 | else |
1154 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
1074 | + tcg_gen_xor_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); | |
1155 | 1075 | } else { |
1156 | 1076 | if (islit) |
1157 | 1077 | tcg_gen_movi_i64(cpu_ir[rc], lit); |
1158 | - else if (rb != 31) | |
1159 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
1160 | 1078 | else |
1161 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
1079 | + tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); | |
1162 | 1080 | } |
1163 | 1081 | } |
1164 | 1082 | break; |
... | ... | @@ -1176,20 +1094,17 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1176 | 1094 | if (ra != 31) { |
1177 | 1095 | if (islit) |
1178 | 1096 | tcg_gen_xori_i64(cpu_ir[rc], cpu_ir[ra], ~lit); |
1179 | - else if (rb != 31) { | |
1097 | + else { | |
1180 | 1098 | TCGv tmp = tcg_temp_new(TCG_TYPE_I64); |
1181 | 1099 | tcg_gen_not_i64(tmp, cpu_ir[rb]); |
1182 | 1100 | tcg_gen_xor_i64(cpu_ir[rc], cpu_ir[ra], tmp); |
1183 | 1101 | tcg_temp_free(tmp); |
1184 | - } else | |
1185 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
1102 | + } | |
1186 | 1103 | } else { |
1187 | 1104 | if (islit) |
1188 | 1105 | tcg_gen_movi_i64(cpu_ir[rc], ~lit); |
1189 | - else if (rb != 31) | |
1190 | - tcg_gen_not_i64(cpu_ir[rc], cpu_ir[rb]); | |
1191 | 1106 | else |
1192 | - tcg_gen_movi_i64(cpu_ir[rc], ~0); | |
1107 | + tcg_gen_not_i64(cpu_ir[rc], cpu_ir[rb]); | |
1193 | 1108 | } |
1194 | 1109 | } |
1195 | 1110 | break; |
... | ... | @@ -1198,10 +1113,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1198 | 1113 | if (likely(rc != 31)) { |
1199 | 1114 | if (islit) |
1200 | 1115 | tcg_gen_movi_i64(cpu_ir[rc], helper_amask(lit)); |
1201 | - else if (rb != 31) | |
1202 | - tcg_gen_helper_1_1(helper_amask, cpu_ir[rc], cpu_ir[rb]); | |
1203 | 1116 | else |
1204 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
1117 | + tcg_gen_helper_1_1(helper_amask, cpu_ir[rc], cpu_ir[rb]); | |
1205 | 1118 | } |
1206 | 1119 | break; |
1207 | 1120 | case 0x64: |
... | ... | @@ -1277,13 +1190,12 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1277 | 1190 | if (ra != 31) { |
1278 | 1191 | if (islit) |
1279 | 1192 | tcg_gen_shri_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f); |
1280 | - else if (rb != 31) { | |
1193 | + else { | |
1281 | 1194 | TCGv shift = tcg_temp_new(TCG_TYPE_I64); |
1282 | 1195 | tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f); |
1283 | 1196 | tcg_gen_shr_i64(cpu_ir[rc], cpu_ir[ra], shift); |
1284 | 1197 | tcg_temp_free(shift); |
1285 | - } else | |
1286 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
1198 | + } | |
1287 | 1199 | } else |
1288 | 1200 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
1289 | 1201 | } |
... | ... | @@ -1298,13 +1210,12 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1298 | 1210 | if (ra != 31) { |
1299 | 1211 | if (islit) |
1300 | 1212 | tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f); |
1301 | - else if (rb != 31) { | |
1213 | + else { | |
1302 | 1214 | TCGv shift = tcg_temp_new(TCG_TYPE_I64); |
1303 | 1215 | tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f); |
1304 | 1216 | tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], shift); |
1305 | 1217 | tcg_temp_free(shift); |
1306 | - } else | |
1307 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
1218 | + } | |
1308 | 1219 | } else |
1309 | 1220 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
1310 | 1221 | } |
... | ... | @@ -1319,13 +1230,12 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1319 | 1230 | if (ra != 31) { |
1320 | 1231 | if (islit) |
1321 | 1232 | tcg_gen_sari_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f); |
1322 | - else if (rb != 31) { | |
1233 | + else { | |
1323 | 1234 | TCGv shift = tcg_temp_new(TCG_TYPE_I64); |
1324 | 1235 | tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f); |
1325 | 1236 | tcg_gen_sar_i64(cpu_ir[rc], cpu_ir[ra], shift); |
1326 | 1237 | tcg_temp_free(shift); |
1327 | - } else | |
1328 | - tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); | |
1238 | + } | |
1329 | 1239 | } else |
1330 | 1240 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
1331 | 1241 | } |
... | ... | @@ -1375,7 +1285,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1375 | 1285 | case 0x00: |
1376 | 1286 | /* MULL */ |
1377 | 1287 | if (likely(rc != 31)) { |
1378 | - if (ra == 31 || (rb == 31 && !islit)) | |
1288 | + if (ra == 31) | |
1379 | 1289 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
1380 | 1290 | else { |
1381 | 1291 | if (islit) |
... | ... | @@ -1389,7 +1299,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1389 | 1299 | case 0x20: |
1390 | 1300 | /* MULQ */ |
1391 | 1301 | if (likely(rc != 31)) { |
1392 | - if (ra == 31 || (rb == 31 && !islit)) | |
1302 | + if (ra == 31) | |
1393 | 1303 | tcg_gen_movi_i64(cpu_ir[rc], 0); |
1394 | 1304 | else if (islit) |
1395 | 1305 | tcg_gen_muli_i64(cpu_ir[rc], cpu_ir[ra], lit); |
... | ... | @@ -1908,10 +1818,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1908 | 1818 | if (likely(rc != 31)) { |
1909 | 1819 | if (islit) |
1910 | 1820 | tcg_gen_movi_i64(cpu_ir[rc], (int64_t)((int8_t)lit)); |
1911 | - else if (rb != 31) | |
1912 | - tcg_gen_ext8s_i64(cpu_ir[rc], cpu_ir[rb]); | |
1913 | 1821 | else |
1914 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
1822 | + tcg_gen_ext8s_i64(cpu_ir[rc], cpu_ir[rb]); | |
1915 | 1823 | } |
1916 | 1824 | break; |
1917 | 1825 | case 0x01: |
... | ... | @@ -1921,10 +1829,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1921 | 1829 | if (likely(rc != 31)) { |
1922 | 1830 | if (islit) |
1923 | 1831 | tcg_gen_movi_i64(cpu_ir[rc], (int64_t)((int16_t)lit)); |
1924 | - else if (rb != 31) | |
1925 | - tcg_gen_ext16s_i64(cpu_ir[rc], cpu_ir[rb]); | |
1926 | 1832 | else |
1927 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
1833 | + tcg_gen_ext16s_i64(cpu_ir[rc], cpu_ir[rb]); | |
1928 | 1834 | } |
1929 | 1835 | break; |
1930 | 1836 | case 0x30: |
... | ... | @@ -1934,10 +1840,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1934 | 1840 | if (likely(rc != 31)) { |
1935 | 1841 | if (islit) |
1936 | 1842 | tcg_gen_movi_i64(cpu_ir[rc], ctpop64(lit)); |
1937 | - else if (rb != 31) | |
1938 | - tcg_gen_helper_1_1(helper_ctpop, cpu_ir[rc], cpu_ir[rb]); | |
1939 | 1843 | else |
1940 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
1844 | + tcg_gen_helper_1_1(helper_ctpop, cpu_ir[rc], cpu_ir[rb]); | |
1941 | 1845 | } |
1942 | 1846 | break; |
1943 | 1847 | case 0x31: |
... | ... | @@ -1954,10 +1858,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1954 | 1858 | if (likely(rc != 31)) { |
1955 | 1859 | if (islit) |
1956 | 1860 | tcg_gen_movi_i64(cpu_ir[rc], clz64(lit)); |
1957 | - else if (rb != 31) | |
1958 | - tcg_gen_helper_1_1(helper_ctlz, cpu_ir[rc], cpu_ir[rb]); | |
1959 | 1861 | else |
1960 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
1862 | + tcg_gen_helper_1_1(helper_ctlz, cpu_ir[rc], cpu_ir[rb]); | |
1961 | 1863 | } |
1962 | 1864 | break; |
1963 | 1865 | case 0x33: |
... | ... | @@ -1967,10 +1869,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) |
1967 | 1869 | if (likely(rc != 31)) { |
1968 | 1870 | if (islit) |
1969 | 1871 | tcg_gen_movi_i64(cpu_ir[rc], ctz64(lit)); |
1970 | - else if (rb != 31) | |
1971 | - tcg_gen_helper_1_1(helper_cttz, cpu_ir[rc], cpu_ir[rb]); | |
1972 | 1872 | else |
1973 | - tcg_gen_movi_i64(cpu_ir[rc], 0); | |
1873 | + tcg_gen_helper_1_1(helper_cttz, cpu_ir[rc], cpu_ir[rb]); | |
1974 | 1874 | } |
1975 | 1875 | break; |
1976 | 1876 | case 0x34: | ... | ... |