gwj / at91sam9263 · Commits

Commit df9247b2647f5bdc255bb4002d9577cade7d93ac

Authored by aurel32
1 parent c6945b15

tcg_temp_local_new should take no parameter 

This patch removes useless type information in some calls to
tcg_temp_local_new.  It also removes the parameter from the
macro declaration;  if a target has to use a specific non-default
size then it should use tcg_temp_local_new_{i32,i64}.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6146 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 9 additions and 9 deletions
target-ppc/translate.c
  View file @df9247b
@@ -6350,7 +6350,7 @@ static always_inline void gen_##name (DisasContext *ctx) \ @@ -6350,7 +6350,7 @@ static always_inline void gen_##name (DisasContext *ctx) \
6350 TCGv_i32 t0 = tcg_temp_local_new_i32(); \ 6350 TCGv_i32 t0 = tcg_temp_local_new_i32(); \
6351 TCGv_i32 t1 = tcg_temp_local_new_i32(); \ 6351 TCGv_i32 t1 = tcg_temp_local_new_i32(); \
6352 TCGv_i32 t2 = tcg_temp_local_new_i32(); \ 6352 TCGv_i32 t2 = tcg_temp_local_new_i32(); \
6353 - TCGv_i64 t3 = tcg_temp_local_new(TCG_TYPE_I64); \ 6353 + TCGv_i64 t3 = tcg_temp_local_new(); \
6354 tcg_gen_trunc_i64_i32(t0, cpu_gpr[rA(ctx->opcode)]); \ 6354 tcg_gen_trunc_i64_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
6355 tcg_gen_trunc_i64_i32(t2, cpu_gpr[rB(ctx->opcode)]); \ 6355 tcg_gen_trunc_i64_i32(t2, cpu_gpr[rB(ctx->opcode)]); \
6356 tcg_op(t0, t0, t2); \ 6356 tcg_op(t0, t0, t2); \
target-sh4/translate.c
  View file @df9247b
@@ -785,8 +785,8 @@ static void _decode_opc(DisasContext * ctx) @@ -785,8 +785,8 @@ static void _decode_opc(DisasContext * ctx)
785 { 785 {
786 int label1 = gen_new_label(); 786 int label1 = gen_new_label();
787 int label2 = gen_new_label(); 787 int label2 = gen_new_label();
788 - TCGv cmp1 = tcg_temp_local_new(TCG_TYPE_I32);  
789 - TCGv cmp2 = tcg_temp_local_new(TCG_TYPE_I32); 788 + TCGv cmp1 = tcg_temp_local_new();
  789 + TCGv cmp2 = tcg_temp_local_new();
790 tcg_gen_xor_i32(cmp1, REG(B7_4), REG(B11_8)); 790 tcg_gen_xor_i32(cmp1, REG(B7_4), REG(B11_8));
791 tcg_gen_andi_i32(cmp2, cmp1, 0xff000000); 791 tcg_gen_andi_i32(cmp2, cmp1, 0xff000000);
792 tcg_gen_brcondi_i32(TCG_COND_EQ, cmp2, 0, label1); 792 tcg_gen_brcondi_i32(TCG_COND_EQ, cmp2, 0, label1);
@@ -935,7 +935,7 @@ static void _decode_opc(DisasContext * ctx) @@ -935,7 +935,7 @@ static void _decode_opc(DisasContext * ctx)
935 int label2 = gen_new_label(); 935 int label2 = gen_new_label();
936 int label3 = gen_new_label(); 936 int label3 = gen_new_label();
937 int label4 = gen_new_label(); 937 int label4 = gen_new_label();
938 - TCGv shift = tcg_temp_local_new(TCG_TYPE_I32); 938 + TCGv shift = tcg_temp_local_new();
939 tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1); 939 tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1);
940 /* Rm positive, shift to the left */ 940 /* Rm positive, shift to the left */
941 tcg_gen_andi_i32(shift, REG(B7_4), 0x1f); 941 tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);
@@ -966,7 +966,7 @@ static void _decode_opc(DisasContext * ctx) @@ -966,7 +966,7 @@ static void _decode_opc(DisasContext * ctx)
966 int label1 = gen_new_label(); 966 int label1 = gen_new_label();
967 int label2 = gen_new_label(); 967 int label2 = gen_new_label();
968 int label3 = gen_new_label(); 968 int label3 = gen_new_label();
969 - TCGv shift = tcg_temp_local_new(TCG_TYPE_I32); 969 + TCGv shift = tcg_temp_local_new();
970 tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1); 970 tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1);
971 /* Rm positive, shift to the left */ 971 /* Rm positive, shift to the left */
972 tcg_gen_andi_i32(shift, REG(B7_4), 0x1f); 972 tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);
@@ -1645,9 +1645,9 @@ static void _decode_opc(DisasContext * ctx) @@ -1645,9 +1645,9 @@ static void _decode_opc(DisasContext * ctx)
1645 case 0x401b: /* tas.b @Rn */ 1645 case 0x401b: /* tas.b @Rn */
1646 { 1646 {
1647 TCGv addr, val; 1647 TCGv addr, val;
1648 - addr = tcg_temp_local_new(TCG_TYPE_I32); 1648 + addr = tcg_temp_local_new();
1649 tcg_gen_mov_i32(addr, REG(B11_8)); 1649 tcg_gen_mov_i32(addr, REG(B11_8));
1650 - val = tcg_temp_local_new(TCG_TYPE_I32); 1650 + val = tcg_temp_local_new();
1651 tcg_gen_qemu_ld8u(val, addr, ctx->memidx); 1651 tcg_gen_qemu_ld8u(val, addr, ctx->memidx);
1652 gen_cmp_imm(TCG_COND_EQ, val, 0); 1652 gen_cmp_imm(TCG_COND_EQ, val, 0);
1653 tcg_gen_ori_i32(val, val, 0x80); 1653 tcg_gen_ori_i32(val, val, 0x80);
tcg/tcg-op.h
  View file @df9247b
@@ -1693,7 +1693,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -1693,7 +1693,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1693 #define tcg_temp_new() tcg_temp_new_i32() 1693 #define tcg_temp_new() tcg_temp_new_i32()
1694 #define tcg_global_reg_new tcg_global_reg_new_i32 1694 #define tcg_global_reg_new tcg_global_reg_new_i32
1695 #define tcg_global_mem_new tcg_global_mem_new_i32 1695 #define tcg_global_mem_new tcg_global_mem_new_i32
1696 -#define tcg_temp_local_new(t) tcg_temp_local_new_i32() 1696 +#define tcg_temp_local_new() tcg_temp_local_new_i32()
1697 #define tcg_temp_free tcg_temp_free_i32 1697 #define tcg_temp_free tcg_temp_free_i32
1698 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32 1698 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
1699 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32 1699 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
@@ -1704,7 +1704,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -1704,7 +1704,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1704 #define tcg_temp_new() tcg_temp_new_i64() 1704 #define tcg_temp_new() tcg_temp_new_i64()
1705 #define tcg_global_reg_new tcg_global_reg_new_i64 1705 #define tcg_global_reg_new tcg_global_reg_new_i64
1706 #define tcg_global_mem_new tcg_global_mem_new_i64 1706 #define tcg_global_mem_new tcg_global_mem_new_i64
1707 -#define tcg_temp_local_new(t) tcg_temp_local_new_i64() 1707 +#define tcg_temp_local_new() tcg_temp_local_new_i64()
1708 #define tcg_temp_free tcg_temp_free_i64 1708 #define tcg_temp_free tcg_temp_free_i64
1709 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64 1709 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
1710 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64 1710 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64