Commit dd37a5e4d7ebc4e698f4c69ad2a5ee922824703f
1 parent
d0dfae6e
PREP and heathrow machines only support PowerPC CPU with a 6xx bus.
Mac99 machine may also support PowerPC 970 CPU. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2681 c046a42c-6fe2-441c-8c8c-71466251a162
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44 additions
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12 deletions
hw/ppc_chrp.c
| @@ -409,14 +409,18 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, | @@ -409,14 +409,18 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, | ||
| 409 | 409 | ||
| 410 | if (is_heathrow) { | 410 | if (is_heathrow) { |
| 411 | isa_mem_base = 0x80000000; | 411 | isa_mem_base = 0x80000000; |
| 412 | - | 412 | + |
| 413 | /* Register 2 MB of ISA IO space */ | 413 | /* Register 2 MB of ISA IO space */ |
| 414 | isa_mmio_init(0xfe000000, 0x00200000); | 414 | isa_mmio_init(0xfe000000, 0x00200000); |
| 415 | 415 | ||
| 416 | /* init basic PC hardware */ | 416 | /* init basic PC hardware */ |
| 417 | + if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { | ||
| 418 | + cpu_abort(env, "Only 6xx bus is supported on heathrow machine\n"); | ||
| 419 | + exit(1); | ||
| 420 | + } | ||
| 417 | pic = heathrow_pic_init(&heathrow_pic_mem_index); | 421 | pic = heathrow_pic_init(&heathrow_pic_mem_index); |
| 418 | pci_bus = pci_grackle_init(0xfec00000, pic); | 422 | pci_bus = pci_grackle_init(0xfec00000, pic); |
| 419 | - pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, | 423 | + pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, |
| 420 | ram_size, vga_ram_size, | 424 | ram_size, vga_ram_size, |
| 421 | vga_bios_offset, vga_bios_size); | 425 | vga_bios_offset, vga_bios_size); |
| 422 | 426 | ||
| @@ -468,16 +472,40 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, | @@ -468,16 +472,40 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, | ||
| 468 | /* Mac99 IRQ connection between OpenPIC outputs pins | 472 | /* Mac99 IRQ connection between OpenPIC outputs pins |
| 469 | * and PowerPC input pins | 473 | * and PowerPC input pins |
| 470 | */ | 474 | */ |
| 471 | - openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | ||
| 472 | - openpic_irqs[i][OPENPIC_OUTPUT_INT] = | ||
| 473 | - ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | ||
| 474 | - openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | ||
| 475 | - ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | ||
| 476 | - openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | ||
| 477 | - ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; | ||
| 478 | - openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; /* Not connected ? */ | ||
| 479 | - openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | ||
| 480 | - ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; /* Check this */ | 475 | + switch (PPC_INPUT(env)) { |
| 476 | + case PPC_FLAGS_INPUT_6xx: | ||
| 477 | + openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | ||
| 478 | + openpic_irqs[i][OPENPIC_OUTPUT_INT] = | ||
| 479 | + ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | ||
| 480 | + openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | ||
| 481 | + ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | ||
| 482 | + openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | ||
| 483 | + ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; | ||
| 484 | + /* Not connected ? */ | ||
| 485 | + openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | ||
| 486 | + /* Check this */ | ||
| 487 | + openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | ||
| 488 | + ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; | ||
| 489 | + break; | ||
| 490 | + case PPC_FLAGS_INPUT_970: | ||
| 491 | + openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | ||
| 492 | + openpic_irqs[i][OPENPIC_OUTPUT_INT] = | ||
| 493 | + ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | ||
| 494 | + openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | ||
| 495 | + ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | ||
| 496 | + openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | ||
| 497 | + ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; | ||
| 498 | + /* Not connected ? */ | ||
| 499 | + openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | ||
| 500 | + /* Check this */ | ||
| 501 | + openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | ||
| 502 | + ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; | ||
| 503 | + break; | ||
| 504 | + default: | ||
| 505 | + cpu_abort(env, | ||
| 506 | + "Only bus model not supported on mac99 machine\n"); | ||
| 507 | + exit(1); | ||
| 508 | + } | ||
| 481 | } | 509 | } |
| 482 | pic = openpic_init(NULL, &openpic_mem_index, smp_cpus, | 510 | pic = openpic_init(NULL, &openpic_mem_index, smp_cpus, |
| 483 | openpic_irqs, NULL); | 511 | openpic_irqs, NULL); |
hw/ppc_prep.c
| @@ -598,6 +598,10 @@ static void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device, | @@ -598,6 +598,10 @@ static void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device, | ||
| 598 | } | 598 | } |
| 599 | 599 | ||
| 600 | isa_mem_base = 0xc0000000; | 600 | isa_mem_base = 0xc0000000; |
| 601 | + if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { | ||
| 602 | + cpu_abort(env, "Only 6xx bus is supported on PREP machine\n"); | ||
| 603 | + exit(1); | ||
| 604 | + } | ||
| 601 | i8259 = i8259_init(first_cpu->irq_inputs[PPC6xx_INPUT_INT]); | 605 | i8259 = i8259_init(first_cpu->irq_inputs[PPC6xx_INPUT_INT]); |
| 602 | pci_bus = pci_prep_init(i8259); | 606 | pci_bus = pci_prep_init(i8259); |
| 603 | // pci_bus = i440fx_init(); | 607 | // pci_bus = i440fx_init(); |