Commit d27b2e5044b143f9e522d6c3e80f498eb083a618
1 parent
d077b6f7
Avoid refering to CRIS specific cpu-state to be able to use these blocks with other cores.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4806 c046a42c-6fe2-441c-8c8c-71466251a162
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4 changed files
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26 additions
and
32 deletions
hw/etraxfs_dma.c
| @@ -353,8 +353,8 @@ static void channel_stream_cmd(struct fs_dma_ctrl *ctrl, int c, uint32_t v) | @@ -353,8 +353,8 @@ static void channel_stream_cmd(struct fs_dma_ctrl *ctrl, int c, uint32_t v) | ||
| 353 | { | 353 | { |
| 354 | unsigned int cmd = v & ((1 << 10) - 1); | 354 | unsigned int cmd = v & ((1 << 10) - 1); |
| 355 | 355 | ||
| 356 | - D(printf("%s ch=%d cmd=%x pc=%x\n", | ||
| 357 | - __func__, c, cmd, ctrl->env->pc)); | 356 | + D(printf("%s ch=%d cmd=%x\n", |
| 357 | + __func__, c, cmd)); | ||
| 358 | if (cmd & regk_dma_load_d) { | 358 | if (cmd & regk_dma_load_d) { |
| 359 | channel_load_d(ctrl, c); | 359 | channel_load_d(ctrl, c); |
| 360 | if (cmd & regk_dma_burst) | 360 | if (cmd & regk_dma_burst) |
| @@ -541,8 +541,8 @@ static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr) | @@ -541,8 +541,8 @@ static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr) | ||
| 541 | { | 541 | { |
| 542 | struct fs_dma_ctrl *ctrl = opaque; | 542 | struct fs_dma_ctrl *ctrl = opaque; |
| 543 | CPUState *env = ctrl->env; | 543 | CPUState *env = ctrl->env; |
| 544 | - cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx | ||
| 545 | - " pc=%x.\n", addr, env->pc); | 544 | + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n", |
| 545 | + addr); | ||
| 546 | return 0; | 546 | return 0; |
| 547 | } | 547 | } |
| 548 | 548 | ||
| @@ -566,8 +566,8 @@ dma_readl (void *opaque, target_phys_addr_t addr) | @@ -566,8 +566,8 @@ dma_readl (void *opaque, target_phys_addr_t addr) | ||
| 566 | 566 | ||
| 567 | default: | 567 | default: |
| 568 | r = ctrl->channels[c].regs[addr]; | 568 | r = ctrl->channels[c].regs[addr]; |
| 569 | - D(printf ("%s c=%d addr=%x pc=%x\n", | ||
| 570 | - __func__, c, addr, ctrl->env->pc)); | 569 | + D(printf ("%s c=%d addr=%x\n", |
| 570 | + __func__, c, addr)); | ||
| 571 | break; | 571 | break; |
| 572 | } | 572 | } |
| 573 | return r; | 573 | return r; |
| @@ -578,8 +578,8 @@ dma_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value) | @@ -578,8 +578,8 @@ dma_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value) | ||
| 578 | { | 578 | { |
| 579 | struct fs_dma_ctrl *ctrl = opaque; | 579 | struct fs_dma_ctrl *ctrl = opaque; |
| 580 | CPUState *env = ctrl->env; | 580 | CPUState *env = ctrl->env; |
| 581 | - cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx | ||
| 582 | - " pc=%x.\n", addr, env->pc); | 581 | + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n", |
| 582 | + addr); | ||
| 583 | } | 583 | } |
| 584 | 584 | ||
| 585 | static void | 585 | static void |
| @@ -623,14 +623,12 @@ dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | @@ -623,14 +623,12 @@ dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | ||
| 623 | 623 | ||
| 624 | case RW_STREAM_CMD: | 624 | case RW_STREAM_CMD: |
| 625 | ctrl->channels[c].regs[addr] = value; | 625 | ctrl->channels[c].regs[addr] = value; |
| 626 | - D(printf("stream_cmd ch=%d pc=%x\n", | ||
| 627 | - c, ctrl->env->pc)); | 626 | + D(printf("stream_cmd ch=%d\n", c)); |
| 628 | channel_stream_cmd(ctrl, c, value); | 627 | channel_stream_cmd(ctrl, c, value); |
| 629 | break; | 628 | break; |
| 630 | 629 | ||
| 631 | default: | 630 | default: |
| 632 | - D(printf ("%s c=%d %x %x pc=%x\n", | ||
| 633 | - __func__, c, addr, value, ctrl->env->pc)); | 631 | + D(printf ("%s c=%d %x %x\n", __func__, c, addr)); |
| 634 | break; | 632 | break; |
| 635 | } | 633 | } |
| 636 | } | 634 | } |
hw/etraxfs_eth.c
| @@ -330,15 +330,14 @@ static uint32_t eth_rinvalid (void *opaque, target_phys_addr_t addr) | @@ -330,15 +330,14 @@ static uint32_t eth_rinvalid (void *opaque, target_phys_addr_t addr) | ||
| 330 | { | 330 | { |
| 331 | struct fs_eth *eth = opaque; | 331 | struct fs_eth *eth = opaque; |
| 332 | CPUState *env = eth->env; | 332 | CPUState *env = eth->env; |
| 333 | - cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx | ||
| 334 | - " pc=%x.\n", addr, env->pc); | 333 | + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n", |
| 334 | + addr); | ||
| 335 | return 0; | 335 | return 0; |
| 336 | } | 336 | } |
| 337 | 337 | ||
| 338 | static uint32_t eth_readl (void *opaque, target_phys_addr_t addr) | 338 | static uint32_t eth_readl (void *opaque, target_phys_addr_t addr) |
| 339 | { | 339 | { |
| 340 | struct fs_eth *eth = opaque; | 340 | struct fs_eth *eth = opaque; |
| 341 | - D(CPUState *env = eth->env); | ||
| 342 | uint32_t r = 0; | 341 | uint32_t r = 0; |
| 343 | 342 | ||
| 344 | /* Make addr relative to this instances base. */ | 343 | /* Make addr relative to this instances base. */ |
| @@ -350,7 +349,7 @@ static uint32_t eth_readl (void *opaque, target_phys_addr_t addr) | @@ -350,7 +349,7 @@ static uint32_t eth_readl (void *opaque, target_phys_addr_t addr) | ||
| 350 | break; | 349 | break; |
| 351 | default: | 350 | default: |
| 352 | r = eth->regs[addr]; | 351 | r = eth->regs[addr]; |
| 353 | - D(printf ("%s %x p=%x\n", __func__, addr, env->pc)); | 352 | + D(printf ("%s %x\n", __func__, addr)); |
| 354 | break; | 353 | break; |
| 355 | } | 354 | } |
| 356 | return r; | 355 | return r; |
| @@ -361,8 +360,8 @@ eth_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value) | @@ -361,8 +360,8 @@ eth_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value) | ||
| 361 | { | 360 | { |
| 362 | struct fs_eth *eth = opaque; | 361 | struct fs_eth *eth = opaque; |
| 363 | CPUState *env = eth->env; | 362 | CPUState *env = eth->env; |
| 364 | - cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx | ||
| 365 | - " pc=%x.\n", addr, env->pc); | 363 | + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n", |
| 364 | + addr); | ||
| 366 | } | 365 | } |
| 367 | 366 | ||
| 368 | static void eth_update_ma(struct fs_eth *eth, int ma) | 367 | static void eth_update_ma(struct fs_eth *eth, int ma) |
hw/etraxfs_ser.c
| @@ -89,7 +89,7 @@ static void ser_update_irq(struct etrax_serial_t *s) | @@ -89,7 +89,7 @@ static void ser_update_irq(struct etrax_serial_t *s) | ||
| 89 | static uint32_t ser_readb (void *opaque, target_phys_addr_t addr) | 89 | static uint32_t ser_readb (void *opaque, target_phys_addr_t addr) |
| 90 | { | 90 | { |
| 91 | D(CPUState *env = opaque); | 91 | D(CPUState *env = opaque); |
| 92 | - D(printf ("%s %x pc=%x\n", __func__, addr, env->pc)); | 92 | + D(printf ("%s %x\n", __func__, addr)); |
| 93 | return 0; | 93 | return 0; |
| 94 | } | 94 | } |
| 95 | 95 | ||
| @@ -132,7 +132,7 @@ static uint32_t ser_readl (void *opaque, target_phys_addr_t addr) | @@ -132,7 +132,7 @@ static uint32_t ser_readl (void *opaque, target_phys_addr_t addr) | ||
| 132 | break; | 132 | break; |
| 133 | 133 | ||
| 134 | default: | 134 | default: |
| 135 | - D(printf ("%s %x p=%x\n", __func__, addr, env->pc)); | 135 | + D(printf ("%s %x\n", __func__, addr)); |
| 136 | break; | 136 | break; |
| 137 | } | 137 | } |
| 138 | return r; | 138 | return r; |
| @@ -143,7 +143,7 @@ ser_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) | @@ -143,7 +143,7 @@ ser_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) | ||
| 143 | { | 143 | { |
| 144 | D(struct etrax_serial_t *s = opaque); | 144 | D(struct etrax_serial_t *s = opaque); |
| 145 | D(CPUState *env = s->env); | 145 | D(CPUState *env = s->env); |
| 146 | - D(printf ("%s %x %x pc=%x\n", __func__, addr, value, env->pc)); | 146 | + D(printf ("%s %x %x\n", __func__, addr, value)); |
| 147 | } | 147 | } |
| 148 | static void | 148 | static void |
| 149 | ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | 149 | ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value) |
| @@ -181,8 +181,7 @@ ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | @@ -181,8 +181,7 @@ ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | ||
| 181 | s->rw_intr_mask = value; | 181 | s->rw_intr_mask = value; |
| 182 | break; | 182 | break; |
| 183 | default: | 183 | default: |
| 184 | - D(printf ("%s %x %x pc=%x\n", | ||
| 185 | - __func__, addr, value, env->pc)); | 184 | + D(printf ("%s %x %x\n", __func__, addr, value)); |
| 186 | break; | 185 | break; |
| 187 | } | 186 | } |
| 188 | ser_update_irq(s); | 187 | ser_update_irq(s); |
hw/etraxfs_timer.c
| @@ -80,15 +80,14 @@ static uint32_t timer_rinvalid (void *opaque, target_phys_addr_t addr) | @@ -80,15 +80,14 @@ static uint32_t timer_rinvalid (void *opaque, target_phys_addr_t addr) | ||
| 80 | { | 80 | { |
| 81 | struct fs_timer_t *t = opaque; | 81 | struct fs_timer_t *t = opaque; |
| 82 | CPUState *env = t->env; | 82 | CPUState *env = t->env; |
| 83 | - cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx | ||
| 84 | - " pc=%x.\n", addr, env->pc); | 83 | + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n", |
| 84 | + addr); | ||
| 85 | return 0; | 85 | return 0; |
| 86 | } | 86 | } |
| 87 | 87 | ||
| 88 | static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) | 88 | static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) |
| 89 | { | 89 | { |
| 90 | struct fs_timer_t *t = opaque; | 90 | struct fs_timer_t *t = opaque; |
| 91 | - D(CPUState *env = t->env); | ||
| 92 | uint32_t r = 0; | 91 | uint32_t r = 0; |
| 93 | 92 | ||
| 94 | /* Make addr relative to this instances base. */ | 93 | /* Make addr relative to this instances base. */ |
| @@ -109,7 +108,7 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) | @@ -109,7 +108,7 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) | ||
| 109 | r = t->r_intr & t->rw_intr_mask; | 108 | r = t->r_intr & t->rw_intr_mask; |
| 110 | break; | 109 | break; |
| 111 | default: | 110 | default: |
| 112 | - D(printf ("%s %x p=%x\n", __func__, addr, env->pc)); | 111 | + D(printf ("%s %x\n", __func__, addr)); |
| 113 | break; | 112 | break; |
| 114 | } | 113 | } |
| 115 | return r; | 114 | return r; |
| @@ -120,8 +119,8 @@ timer_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value) | @@ -120,8 +119,8 @@ timer_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value) | ||
| 120 | { | 119 | { |
| 121 | struct fs_timer_t *t = opaque; | 120 | struct fs_timer_t *t = opaque; |
| 122 | CPUState *env = t->env; | 121 | CPUState *env = t->env; |
| 123 | - cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx | ||
| 124 | - " pc=%x.\n", addr, env->pc); | 122 | + cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n", |
| 123 | + addr); | ||
| 125 | } | 124 | } |
| 126 | 125 | ||
| 127 | #define TIMER_SLOWDOWN 1 | 126 | #define TIMER_SLOWDOWN 1 |
| @@ -273,7 +272,6 @@ static void | @@ -273,7 +272,6 @@ static void | ||
| 273 | timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | 272 | timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value) |
| 274 | { | 273 | { |
| 275 | struct fs_timer_t *t = opaque; | 274 | struct fs_timer_t *t = opaque; |
| 276 | - CPUState *env = t->env; | ||
| 277 | 275 | ||
| 278 | /* Make addr relative to this instances base. */ | 276 | /* Make addr relative to this instances base. */ |
| 279 | addr -= t->base; | 277 | addr -= t->base; |
| @@ -309,8 +307,8 @@ timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | @@ -309,8 +307,8 @@ timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | ||
| 309 | t->rw_ack_intr = 0; | 307 | t->rw_ack_intr = 0; |
| 310 | break; | 308 | break; |
| 311 | default: | 309 | default: |
| 312 | - printf ("%s " TARGET_FMT_plx " %x pc=%x\n", | ||
| 313 | - __func__, addr, value, env->pc); | 310 | + printf ("%s " TARGET_FMT_plx " %x\n", |
| 311 | + __func__, addr, value); | ||
| 314 | break; | 312 | break; |
| 315 | } | 313 | } |
| 316 | } | 314 | } |