gwj / at91sam9263 · Commits

Commit c904ef0e7ca708462d2b0b10127dae5eb4a555f5

Authored by ths
1 parent 0eaef5aa

Use plain standard inline. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4929 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 11 additions and 11 deletions
target-mips/exec.h
  View file @c904ef0
... ... @@ -47,15 +47,15 @@ void cpu_mips_update_irq (CPUState *env);
47 47 void cpu_mips_clock_init (CPUState *env);
48 48 void cpu_mips_tlb_flush (CPUState *env, int flush_global);
49 49  
50   -static always_inline void env_to_regs(void)
  50 +static inline void env_to_regs(void)
51 51 {
52 52 }
53 53  
54   -static always_inline void regs_to_env(void)
  54 +static inline void regs_to_env(void)
55 55 {
56 56 }
57 57  
58   -static always_inline int cpu_halted(CPUState *env)
  58 +static inline int cpu_halted(CPUState *env)
59 59 {
60 60 if (!env->halted)
61 61 return 0;
... ... @@ -67,7 +67,7 @@ static always_inline int cpu_halted(CPUState *env)
67 67 return EXCP_HALTED;
68 68 }
69 69  
70   -static always_inline void compute_hflags(CPUState *env)
  70 +static inline void compute_hflags(CPUState *env)
71 71 {
72 72 env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
73 73 MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU);
... ...
target-mips/op_helper.c
  View file @c904ef0
... ... @@ -87,24 +87,24 @@ target_ulong do_dclz (target_ulong t0)
87 87 #endif /* TARGET_MIPS64 */
88 88  
89 89 /* 64 bits arithmetic for 32 bits hosts */
90   -static always_inline uint64_t get_HILO (void)
  90 +static inline uint64_t get_HILO (void)
91 91 {
92 92 return ((uint64_t)(env->active_tc.HI[0]) << 32) | (uint32_t)env->active_tc.LO[0];
93 93 }
94 94  
95   -static always_inline void set_HILO (uint64_t HILO)
  95 +static inline void set_HILO (uint64_t HILO)
96 96 {
97 97 env->active_tc.LO[0] = (int32_t)HILO;
98 98 env->active_tc.HI[0] = (int32_t)(HILO >> 32);
99 99 }
100 100  
101   -static always_inline void set_HIT0_LO (target_ulong t0, uint64_t HILO)
  101 +static inline void set_HIT0_LO (target_ulong t0, uint64_t HILO)
102 102 {
103 103 env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
104 104 t0 = env->active_tc.HI[0] = (int32_t)(HILO >> 32);
105 105 }
106 106  
107   -static always_inline void set_HI_LOT0 (target_ulong t0, uint64_t HILO)
  107 +static inline void set_HI_LOT0 (target_ulong t0, uint64_t HILO)
108 108 {
109 109 t0 = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
110 110 env->active_tc.HI[0] = (int32_t)(HILO >> 32);
... ... @@ -1996,7 +1996,7 @@ void do_ctc1 (target_ulong t0, uint32_t reg)
1996 1996 do_raise_exception(EXCP_FPE);
1997 1997 }
1998 1998  
1999   -static always_inline char ieee_ex_to_mips(char xcpt)
  1999 +static inline char ieee_ex_to_mips(char xcpt)
2000 2000 {
2001 2001 return (xcpt & float_flag_inexact) >> 5 |
2002 2002 (xcpt & float_flag_underflow) >> 3 |
... ... @@ -2005,7 +2005,7 @@ static always_inline char ieee_ex_to_mips(char xcpt)
2005 2005 (xcpt & float_flag_invalid) << 4;
2006 2006 }
2007 2007  
2008   -static always_inline char mips_ex_to_ieee(char xcpt)
  2008 +static inline char mips_ex_to_ieee(char xcpt)
2009 2009 {
2010 2010 return (xcpt & FP_INEXACT) << 5 |
2011 2011 (xcpt & FP_UNDERFLOW) << 3 |
... ... @@ -2014,7 +2014,7 @@ static always_inline char mips_ex_to_ieee(char xcpt)
2014 2014 (xcpt & FP_INVALID) >> 4;
2015 2015 }
2016 2016  
2017   -static always_inline void update_fcr31(void)
  2017 +static inline void update_fcr31(void)
2018 2018 {
2019 2019 int tmp = ieee_ex_to_mips(get_float_exception_flags(&env->fpu->fp_status));
2020 2020  
... ...