added push buttons

dmakow
1 parent 3c6f9b87
Showing 9 changed files with 472 additions and 179 deletions
monitor.c
qemu-monitor.hx
virtual_lab/Makefile
virtual_lab/compileme.sh
virtual_lab/cstartup_pre.S
virtual_lab/led_blink2.elf
virtual_lab/lowlevel.c
virtual_lab/main.c
virtual_lab/main.elf
@@ -92,6 +92,9 @@ struct Monitor {
     LIST_ENTRY(Monitor) entry;
 };
+static QEMUTimer *button_timer1;
+static QEMUTimer *button_timer2;
+
 static LIST_HEAD(mon_list, Monitor) mon_list;
 static const mon_cmd_t mon_cmds[];
@@ -543,11 +546,45 @@ static void do_set_gpio(Monitor* mon, const char* port, const char* value)
    printf("Invalid channel\n");
 }
+
+static void button_handler1(void *mon)
+{
+    qemu_del_timer(button_timer1);
+    do_set_gpio((Monitor*)mon, "C5", "1");
+}
+
+static void button_handler2(void *mon)
+{
+    qemu_del_timer(button_timer2);
+    do_set_gpio((Monitor*)mon, "C4", "1");
+}
+
+
+static void do_b1(Monitor* mon)
+{
+    do_set_gpio(mon, "C5", "0");
+    qemu_mod_timer(button_timer1, qemu_get_clock(vm_clock) +
+                    muldiv64(ticks_per_sec, 100, 1000));
+}
+
+static void do_b2(Monitor* mon)
+{
+    do_set_gpio(mon, "C4", "0");
+    qemu_mod_timer(button_timer2, qemu_get_clock(vm_clock) +
+                    muldiv64(ticks_per_sec, 100, 1000));
+}
+
+
+
+
+
 static void do_p1(Monitor* mon)
 {
  do_set_gpio(mon, "C5", "0");
 }
+
+
 static void do_p2(Monitor* mon)
 {
  do_set_gpio(mon, "C4", "0");
@@ -3240,13 +3277,15 @@ void monitor_init(CharDriverState *chr, int flags)
     static int is_first_init = 1;
     Monitor *mon;
+    mon = qemu_mallocz(sizeof(*mon));
+
     if (is_first_init) {
         key_timer = qemu_new_timer(vm_clock, release_keys, NULL);
+        button_timer1 = qemu_new_timer(vm_clock, button_handler1, mon);
+        button_timer2 = qemu_new_timer(vm_clock, button_handler2, mon);
         is_first_init = 0;
     }
-    mon = qemu_mallocz(sizeof(*mon));
-
     mon->chr = chr;
     mon->flags = flags;
     if (mon->chr->focus != 0)
@@ -683,6 +683,21 @@ STEXI
 Release button 2
 ETEXI
+    { "b2", "", do_b2, "",
+      "button 2" },
+STEXI
+@item b2
+Button 2
+ETEXI
+
+    { "b1", "", do_b1, "",
+      "button 1" },
+STEXI
+@item b1
+Button 1
+ETEXI
+
+
 STEXI
 @end table
+# SW VirtualLab DMCS@2020
+
+CCFLAGS=-g -mcpu=arm9 -Os -Wall
+CC=arm-none-eabi-gcc
+#LDFLAGS+=-nostartfiles -Wl,--cref -lc -lgcc -T /opt/arm_user/elf32-littlearm.lds -g -Ttext 0x20000000 -Tdata 0x300000 -n
+LDFLAGS+=-nostartfiles -W -lc -lgcc -T script.lds -g -Ttext 0x20000000 -Tdata 0x300000 -n
+OBJS=cstartup.o lowlevel.o
+#koniec, dalej mozna dowolnie zmieniac
+
+PROGRAM_NAME=led_blink2.elf
+
+all: $(PROGRAM_NAME)
+
+rebuild: clean $(PROGRAM_NAME)
+
+$(PROGRAM_NAME): main.o
+	$(CC) $(LDFLAGS) $(OBJS) $< -o $@
+
+main.o: main.c 
+	$(CC) -c $(CCFLAGS) $< -o $@
+
+clean:
+	rm -f *.o *.elf 
 arm-none-eabi-gcc -E -I include -D__ASSEMBLY__ cstartup.S > cstartup_pre.S
 arm-none-eabi-gcc -g -mcpu=arm926ej-s -c cstartup_pre.S -o cstartup.o
+arm-none-eabi-gcc -g -mcpu=arm926ej-s -I include -c lowlevel.c -o lowlevel.o
 arm-none-eabi-gcc -g -mcpu=arm926ej-s -I include lowlevel.c main.c cstartup.o -o main.elf -Ttext 0x20000000 -Tdata 0x300000 -T script.lds 
 # -Wl,--verbose 
+# 1 "cstartup.S"
+# 1 "<built-in>"
+# 1 "<command-line>"
+# 1 "cstartup.S"
+# 39 "cstartup.S"
+# 1 "project.h" 1
+# 44 "project.h"
+# 1 "include/AT91SAM9263-EK.h" 1
+# 45 "project.h" 2
+# 1 "include/AT91SAM9263.h" 1
+# 46 "project.h" 2
+# 40 "cstartup.S" 2
+# 55 "cstartup.S"
+        .globl reset_handler
+        .align 4
+
+.section .vectors
+.arm
+
+
+
+_exception_vectors:
+reset_vector:
+        ldr pc, =reset_handler
+undef_vector:
+        b undef_vector
+swi_vector:
+        b swi_vector
+pabt_vector:
+        ldr pc, =pabt_handler
+dabt_vector:
+        ldr pc, =dabt_handler
+rsvd_vector:
+        b rsvd_vector
+irq_vector:
+        b irq_handler
+fiq_vector:
+
+
+
+
+
+fiq_handler:
+ b fiq_handler
+
+
+
+
+
+
+irq_handler:
+
+
+        sub lr, lr, #4
+        stmfd sp!, {lr}
+
+        mrs r14, SPSR
+        stmfd sp!, {r0,r14}
+
+
+
+
+        ldr r14, =( 0xFFFFF000)
+        ldr r0 , [r14, #( 0x00000100)]
+        str r14, [r14, #( 0x00000100)]
+
+
+        msr CPSR_c, #0x13
+
+
+        stmfd sp!, {r1-r3, r12, r14}
+
+
+        mov r14, pc
+        bx r0
+
+
+        ldmia sp!, {r1-r3, r12, r14}
+
+
+        msr CPSR_c, #0x12 | 0x80
+
+
+        ldr r14, =( 0xFFFFF000)
+        str r14, [r14, #( 0x00000130)]
+
+
+        ldmia sp!, {r0,r14}
+        msr SPSR_cxsf, r14
+
+
+        ldmia sp!, {pc}^
+
+
+
+
+
+
+
+.section .text
+reset_handler:
+ ldr pc, =_low_level_init
+
+
+
+
+
+
+_low_level_init:
+ ldr r2, =_lp_ll_init
+        ldmia r2, {r0, r1}
+        mov sp, r1
+        mov lr, pc
+        bx r0
+
+
+
+
+_stack_init:
+ ldr r2, =_lp_stack_init
+        ldmia r2, {r0, r1, r2}
+
+
+        msr CPSR_c, #0x17 | 0x80 | 0x40
+        mov sp, r0
+        sub r0, r0, r1
+
+
+        msr CPSR_c, #0x12 | 0x80 | 0x40
+        mov sp, r0
+        sub r0, r0, r2
+
+
+        msr CPSR_c, #0x13 | 0x40
+        mov sp, r0
+
+
+
+
+
+_init_data:
+ ldr r2, =_lp_data
+        ldmia r2, {r1, r3, r4}
+1:
+        cmp r3, r4
+        ldrcc r2, [r1], #4
+        strcc r2, [r3], #4
+        bcc 1b
+
+
+_init_bss:
+ ldr r2, =_lp_bss
+        ldmia r2, {r3, r4}
+        mov r2, #0
+1:
+        cmp r3, r4
+        strcc r2, [r3], #4
+        bcc 1b
+
+
+
+
+_branch_main:
+        ldr r0, =main
+        mov lr, pc
+        bx r0
+
+
+
+
+_lp_ll_init:
+        .word lowlevel_init
+        .word ((0x00300000) + (0x00014000))
+
+_lp_stack_init:
+        .word ((0x00300000) + (0x00014000))
+        .word 8*3*4
+        .word 8*3*4
+
+_lp_bss:
+        .word _sbss
+        .word _ebss
+
+_lp_data:
+        .word _etext
+        .word _sdata
+        .word _edata
-/* ----------------------------------------------------------------------------
- *         ATMEL Microcontroller Software Support  -  ROUSSET  -
- * ----------------------------------------------------------------------------
- * Copyright (c) 2006, Atmel Corporation
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaiimer below.
- *
- * - Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the disclaimer below in the documentation and/or
- * other materials provided with the distribution.
- *
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
- */
-/*-----------------------------------------------------------------------------
- *  File Name           : lowlevel.c
- *  Object              : low level initialization file
- *  Creation            : FDy   20-Nov-2006
- *-----------------------------------------------------------------------------
- */
-
-/* Include Standard files */
-#include "project.h"
-
-
-/*-----------------------------------------------------------------------------
- * Function Name       : default_spurious_handler
- * Object              : default handler for spurious interrupt
- *-----------------------------------------------------------------------------*/
-void default_spurious_handler(void)
-{
-    dbgu_print_ascii("-F- Spurious Interrupt\n\r ");
-    while (1);
-}
-
-/*-----------------------------------------------------------------------------
- * Function Name       : default_fiq_handler
- * Object              : default handler for fast interrupt
- *-----------------------------------------------------------------------------*/
-void default_fiq_handler(void)
-{
-    dbgu_print_ascii("-F- Unexpected FIQ Interrupt\n\r ");
-    while (1);
-}
-
-/*-----------------------------------------------------------------------------
- * Function Name       : default_irq_handler
- * Object              : default handler for irq
- *-----------------------------------------------------------------------------*/
-void default_irq_handler(void)
-{
-    dbgu_print_ascii("-F- Unexpected IRQ Interrupt\n\r ");
-    while (1);
-}
-
-/*-----------------------------------------------------------------------------
- * Function Name       : lowlevel_init
- * Object              : This function performs very low level HW initialization
- *                       this function can use a Stack, depending the compilation
- *                       optimization mode
- *-----------------------------------------------------------------------------*/
-void lowlevel_init(void)
-{
-    unsigned char i = 0;
-
-    ///////////////////////////////////////////////////////////////////////////
-    // Init PMC Step 1. Enable Main Oscillator
-    // Main Oscillator startup time is board specific:
-    // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms
-    // (0x40 for AT91C_CKGR_OSCOUNT field)
-    ///////////////////////////////////////////////////////////////////////////
-    AT91C_BASE_PMC->PMC_MOR = (((AT91C_CKGR_OSCOUNT & (0x40 << 8)) | AT91C_CKGR_MOSCEN));
-    // Wait Main Oscillator stabilization
-    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
-
-    ///////////////////////////////////////////////////////////////////////////
-    // Init PMC Step 2.
-    // Set PLLA to 200MHz (198,656MHz)
-    // PLL Startup time depends on PLL RC filter: worst case is choosen
-    ///////////////////////////////////////////////////////////////////////////
-    AT91C_BASE_PMC->PMC_PLLAR = AT91C_CKGR_SRCA                  |
-                                AT91C_CKGR_OUTA_2                |
-                                (0x3F << 8)                      |
-                                (AT91C_CKGR_MULA & (0x6D << 16)) |
-                                (AT91C_CKGR_DIVA & 9);
-    // Wait for PLLA stabilization
-    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA));
-    // Wait until the master clock is established for the case we already
-    // turn on the PLLA
-    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
-
-    ///////////////////////////////////////////////////////////////////////////
-    // Init PMC Step 3.
-    // Selection of Master Clock MCK equal to (Processor Clock PCK) PLLA/2=100MHz
-    // The PMC_MCKR register must not be programmed in a single write operation
-    // (see. Product Errata Sheet)
-    ///////////////////////////////////////////////////////////////////////////
-    AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2;
-    // Wait until the master clock is established
-    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
-
-    AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLLA_CLK;
-    // Wait until the master clock is established
-    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
-
-    ///////////////////////////////////////////////////////////////////////////
-    // Reset AIC: assign default handler for each interrupt source
-    ///////////////////////////////////////////////////////////////////////////
-    AT91C_BASE_AIC->AIC_SVR[0] = (int) default_fiq_handler ;
-    for (i = 1; i < 31; i++) {
-        AT91C_BASE_AIC->AIC_SVR[i] = (int) default_irq_handler ;
-    }
-    AT91C_BASE_AIC->AIC_SPU = (unsigned int) default_spurious_handler;
-
-    // Perform 8 IT acknoledge (write any value in EOICR)
-    for (i = 0; i < 8 ; i++) {
-        AT91C_BASE_AIC->AIC_EOICR = 0;
-    }
-
-    ///////////////////////////////////////////////////////////////////////////
-    // Disable Watchdog
-    ///////////////////////////////////////////////////////////////////////////
-    AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
-
-    ///////////////////////////////////////////////////////////////////////////
-    // Remap
-    ///////////////////////////////////////////////////////////////////////////
-    AT91C_BASE_MATRIX->MATRIX_MRCR = AT91C_MATRIX_RCA926I | AT91C_MATRIX_RCA926D;
-}
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support  -  ROUSSET  -
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2006, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the disclaiimer below.
+ *
+ * - Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the disclaimer below in the documentation and/or
+ * other materials provided with the distribution.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+/*-----------------------------------------------------------------------------
+ *  File Name           : lowlevel.c
+ *  Object              : low level initialization file
+ *  Creation            : FDy   20-Nov-2006
+ *-----------------------------------------------------------------------------
+ */
-void _exit(int c){while(1);};
+/* Include Standard files */
+#include "project.h"
-void dabt_handler(){};
-void pabt_handler(){};
-void dbgu_print_ascii(const char* p){};
 \ No newline at end of file
+void dbgu_print_ascii (const char * buffer) {};
+void dabt_handler (void) {};
+void pabt_handler (void) {};
+void _exit (int c) {while(1);};
+
+/*-----------------------------------------------------------------------------
+ * Function Name       : default_spurious_handler
+ * Object              : default handler for spurious interrupt
+ *-----------------------------------------------------------------------------*/
+void default_spurious_handler(void)
+{
+    dbgu_print_ascii("-F- Spurious Interrupt\n\r ");
+    while (1);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function Name       : default_fiq_handler
+ * Object              : default handler for fast interrupt
+ *-----------------------------------------------------------------------------*/
+void default_fiq_handler(void)
+{
+    dbgu_print_ascii("-F- Unexpected FIQ Interrupt\n\r ");
+    while (1);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function Name       : default_irq_handler
+ * Object              : default handler for irq
+ *-----------------------------------------------------------------------------*/
+void default_irq_handler(void)
+{
+    dbgu_print_ascii("-F- Unexpected IRQ Interrupt\n\r ");
+    while (1);
+}
+
+/*-----------------------------------------------------------------------------
+ * Function Name       : lowlevel_init
+ * Object              : This function performs very low level HW initialization
+ *                       this function can use a Stack, depending the compilation
+ *                       optimization mode
+ *-----------------------------------------------------------------------------*/
+void lowlevel_init(void)
+{
+    unsigned char i = 0;
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 1. Enable Main Oscillator
+    // Main Oscillator startup time is board specific:
+    // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms
+    // (0x40 for AT91C_CKGR_OSCOUNT field)
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_MOR = (((AT91C_CKGR_OSCOUNT & (0x40 << 8)) | AT91C_CKGR_MOSCEN));
+    // Wait Main Oscillator stabilization
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 2.
+    // Set PLLA to 200MHz (198,656MHz)
+    // PLL Startup time depends on PLL RC filter: worst case is choosen
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_PLLAR = AT91C_CKGR_SRCA                  |
+                                AT91C_CKGR_OUTA_2                |
+                                (0x3F << 8)                      |
+                                (AT91C_CKGR_MULA & (0x6D << 16)) |
+                                (AT91C_CKGR_DIVA & 9);
+    // Wait for PLLA stabilization
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA));
+    // Wait until the master clock is established for the case we already
+    // turn on the PLLA
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 3.
+    // Selection of Master Clock MCK equal to (Processor Clock PCK) PLLA/2=100MHz
+    // The PMC_MCKR register must not be programmed in a single write operation
+    // (see. Product Errata Sheet)
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK | AT91C_PMC_MDIV_2;
+    // Wait until the master clock is established
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
+
+    AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLLA_CLK;
+    // Wait until the master clock is established
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Reset AIC: assign default handler for each interrupt source
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_AIC->AIC_SVR[0] = (int) default_fiq_handler ;
+    for (i = 1; i < 31; i++) {
+        AT91C_BASE_AIC->AIC_SVR[i] = (int) default_irq_handler ;
+    }
+    AT91C_BASE_AIC->AIC_SPU = (unsigned int) default_spurious_handler;
+
+    // Perform 8 IT acknoledge (write any value in EOICR)
+    for (i = 0; i < 8 ; i++) {
+        AT91C_BASE_AIC->AIC_EOICR = 0;
+    }
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Disable Watchdog
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Remap
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_MATRIX->MATRIX_MRCR = AT91C_MATRIX_RCA926I | AT91C_MATRIX_RCA926D;
+}
 #include <stdint.h>
 #include <stdbool.h>
-#define PA_PER		(*((volatile uint32_t*)0xFFFFF200))
-#define PA_PDR		(*((volatile uint32_t*)0xFFFFF204))
-#define PA_OER		(*((volatile uint32_t*)0xFFFFF210))
-#define PA_SODR		(*((volatile uint32_t*)0xFFFFF230))
-#define PA_CODR		(*((volatile uint32_t*)0xFFFFF234))
-#define PA_PDSR		(*((volatile uint32_t*)0xFFFFF23C))
-
-
 #define PB_PER		(*((volatile uint32_t*)0xFFFFF400))
-#define PB_PDR		(*((volatile uint32_t*)0xFFFFF404))
 #define PB_OER		(*((volatile uint32_t*)0xFFFFF410))
 #define PB_SODR		(*((volatile uint32_t*)0xFFFFF430))
 #define PB_CODR		(*((volatile uint32_t*)0xFFFFF434))
@@ -26,7 +17,7 @@
 #define PMC_PCER	(*((volatile uint32_t*)0xFFFFFC10))
-#define PER_ID_PBIOC_TO_PIOE	4
+#define CLK_PIO_CDE	4
 #define	DS1	(1 << 8)	//PB8
 #define	DS2	(1 << 29)	//PC29
@@ -34,15 +25,38 @@
 #define BT2	(1 << 4)	//PC4
 #define BT1	(1 << 5)	//PC5
-void delay(void)
+void delay_ms (int delay)
+{
+    volatile uint64_t DelayStep;
+    for(DelayStep = 0; DelayStep < 100000*delay; DelayStep++);
+}
+
+void ConfigureLEDs (void)
+{
+	PB_PER = DS1;
+	PC_PER = DS2;
+	PB_OER = DS1;
+	PC_OER = DS2;
+	PB_SODR = DS1;
+	PC_SODR = DS2;
+}
+
+
+void ConfigureButtons (void)
 {
-    volatile uint64_t i;
-    for(i = 0; i < 100000000; i++);
+	PMC_PCER = 1 << CLK_PIO_CDE;    
+	PC_PER = BT1 | BT2;
+	PC_ODR = BT1 | BT2;
+	PC_PUER = BT1 | BT2;
 }
 int main(void)
 {
-    PMC_PCER = 1 << PER_ID_PBIOC_TO_PIOE;    
+	int Decimator=0;
+	ConfigureLEDs();
+	ConfigureButtons();
+#if 0    
+	PMC_PCER = 1 << PER_ID_PBIOC_TO_PIOE;    
     PB_PER = DS1; //PIO enable register
 //    PB_PDR = 0xffffffff; //PIO disable register
@@ -51,16 +65,32 @@ int main(void)
     PC_OER = DS2; //PIO controller output enable register
     PC_ODR = BT1 | BT2;
     PC_PUER = BT1 | BT2;
-    while(true)
-    {
-//    delay();
-    if(PC_PDSR & BT1)
-        PB_SODR = DS1;
-    else
-        PB_CODR = DS1;
-    if(PC_PDSR & BT2)
-        PC_SODR = DS2;
-    else
-        PC_CODR = DS2;
-    }
+#endif
+
+  while(true)
+  {
+	for (Decimator=0; Decimator<100; Decimator++)
+	{
+		if((PC_PDSR & BT1) == 0)
+        		PB_SODR = DS1;
+
+    		if((PC_PDSR & BT2) == 0)
+        		PB_CODR = DS1;
+		delay_ms(10);
+	}
+    	
+	PC_CODR = DS2;
+
+	for (Decimator=0; Decimator<100; Decimator++)
+	{
+		if((PC_PDSR & BT1) == 0)
+        		PB_SODR = DS1;
+
+    		if((PC_PDSR & BT2) == 0)
+        		PB_CODR = DS1;
+		delay_ms(10);
+	}
+
+	PC_SODR = DS2;
+  }
 }