gwj / at91sam9263 · Commits

Commit c026766b15a9324baeb2068e3b07658aae0b177b

Authored by aurel32
1 parent d9430add

Add vspltis{b,h,w} instructions 

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6238 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 3 changed files with 37 additions and 0 deletions
target-ppc/helper.h
  View file @c026766
... ... @@ -176,6 +176,9 @@ DEF_HELPER_3(vrlw, void, avr, avr, avr)
176 176 DEF_HELPER_3(vsl, void, avr, avr, avr)
177 177 DEF_HELPER_3(vsr, void, avr, avr, avr)
178 178 DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32)
  179 +DEF_HELPER_2(vspltisb, void, avr, i32)
  180 +DEF_HELPER_2(vspltish, void, avr, i32)
  181 +DEF_HELPER_2(vspltisw, void, avr, i32)
179 182 DEF_HELPER_3(vspltb, void, avr, avr, i32)
180 183 DEF_HELPER_3(vsplth, void, avr, avr, i32)
181 184 DEF_HELPER_3(vspltw, void, avr, avr, i32)
... ...
target-ppc/op_helper.c
  View file @c026766
... ... @@ -2570,6 +2570,20 @@ VSPLT(w, u32)
2570 2570 #undef SPLAT_ELEMENT
2571 2571 #undef _SPLAT_MASKED
2572 2572  
  2573 +#define VSPLTI(suffix, element, splat_type) \
  2574 + void helper_vspltis##suffix (ppc_avr_t *r, uint32_t splat) \
  2575 + { \
  2576 + splat_type x = (int8_t)(splat << 3) >> 3; \
  2577 + int i; \
  2578 + for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
  2579 + r->element[i] = x; \
  2580 + } \
  2581 + }
  2582 +VSPLTI(b, s8, int8_t)
  2583 +VSPLTI(h, s16, int16_t)
  2584 +VSPLTI(w, s32, int32_t)
  2585 +#undef VSPLTI
  2586 +
2573 2587 #define VSR(suffix, element) \
2574 2588 void helper_vsr##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
2575 2589 { \
... ...
target-ppc/translate.c
  View file @c026766
... ... @@ -6392,6 +6392,26 @@ GEN_VXRFORM(vcmpgtub, 3, 8)
6392 6392 GEN_VXRFORM(vcmpgtuh, 3, 9)
6393 6393 GEN_VXRFORM(vcmpgtuw, 3, 10)
6394 6394  
  6395 +#define GEN_VXFORM_SIMM(name, opc2, opc3) \
  6396 + GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \
  6397 + { \
  6398 + TCGv_ptr rd; \
  6399 + TCGv_i32 simm; \
  6400 + if (unlikely(!ctx->altivec_enabled)) { \
  6401 + gen_exception(ctx, POWERPC_EXCP_VPU); \
  6402 + return; \
  6403 + } \
  6404 + simm = tcg_const_i32(SIMM5(ctx->opcode)); \
  6405 + rd = gen_avr_ptr(rD(ctx->opcode)); \
  6406 + gen_helper_##name (rd, simm); \
  6407 + tcg_temp_free_i32(simm); \
  6408 + tcg_temp_free_ptr(rd); \
  6409 + }
  6410 +
  6411 +GEN_VXFORM_SIMM(vspltisb, 6, 12);
  6412 +GEN_VXFORM_SIMM(vspltish, 6, 13);
  6413 +GEN_VXFORM_SIMM(vspltisw, 6, 14);
  6414 +
6395 6415 #define GEN_VXFORM_NOA(name, opc2, opc3) \
6396 6416 GEN_HANDLER(name, 0x04, opc2, opc3, 0x001f0000, PPC_ALTIVEC) \
6397 6417 { \
... ...