Commit d9430add633c0d43ecc5532520ca04c6e11b7a4e

Authored by aurel32
1 parent 1add6e23

Add vs{l,r} instructions

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6237 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/helper.h
... ... @@ -173,6 +173,8 @@ DEF_HELPER_2(lvsr, void, avr, tl);
173 173 DEF_HELPER_3(vrlb, void, avr, avr, avr)
174 174 DEF_HELPER_3(vrlh, void, avr, avr, avr)
175 175 DEF_HELPER_3(vrlw, void, avr, avr, avr)
  176 +DEF_HELPER_3(vsl, void, avr, avr, avr)
  177 +DEF_HELPER_3(vsr, void, avr, avr, avr)
176 178 DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32)
177 179 DEF_HELPER_3(vspltb, void, avr, avr, i32)
178 180 DEF_HELPER_3(vsplth, void, avr, avr, i32)
... ...
target-ppc/op_helper.c
... ... @@ -2452,6 +2452,45 @@ void helper_vsel (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
2452 2452 r->u64[1] = (a->u64[1] & ~c->u64[1]) | (b->u64[1] & c->u64[1]);
2453 2453 }
2454 2454  
  2455 +#if defined(WORDS_BIGENDIAN)
  2456 +#define LEFT 0
  2457 +#define RIGHT 1
  2458 +#else
  2459 +#define LEFT 1
  2460 +#define RIGHT 0
  2461 +#endif
  2462 +/* The specification says that the results are undefined if all of the
  2463 + * shift counts are not identical. We check to make sure that they are
  2464 + * to conform to what real hardware appears to do. */
  2465 +#define VSHIFT(suffix, leftp) \
  2466 + void helper_vs##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
  2467 + { \
  2468 + int shift = b->u8[LO_IDX*0x15] & 0x7; \
  2469 + int doit = 1; \
  2470 + int i; \
  2471 + for (i = 0; i < ARRAY_SIZE(r->u8); i++) { \
  2472 + doit = doit && ((b->u8[i] & 0x7) == shift); \
  2473 + } \
  2474 + if (doit) { \
  2475 + if (shift == 0) { \
  2476 + *r = *a; \
  2477 + } else if (leftp) { \
  2478 + uint64_t carry = a->u64[LO_IDX] >> (64 - shift); \
  2479 + r->u64[HI_IDX] = (a->u64[HI_IDX] << shift) | carry; \
  2480 + r->u64[LO_IDX] = a->u64[LO_IDX] << shift; \
  2481 + } else { \
  2482 + uint64_t carry = a->u64[HI_IDX] << (64 - shift); \
  2483 + r->u64[LO_IDX] = (a->u64[LO_IDX] >> shift) | carry; \
  2484 + r->u64[HI_IDX] = a->u64[HI_IDX] >> shift; \
  2485 + } \
  2486 + } \
  2487 + }
  2488 +VSHIFT(l, LEFT)
  2489 +VSHIFT(r, RIGHT)
  2490 +#undef VSHIFT
  2491 +#undef LEFT
  2492 +#undef RIGHT
  2493 +
2455 2494 #define VSL(suffix, element) \
2456 2495 void helper_vsl##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
2457 2496 { \
... ...
target-ppc/translate.c
... ... @@ -6344,6 +6344,8 @@ GEN_VXFORM(vsubcuw, 0, 22);
6344 6344 GEN_VXFORM(vrlb, 2, 0);
6345 6345 GEN_VXFORM(vrlh, 2, 1);
6346 6346 GEN_VXFORM(vrlw, 2, 2);
  6347 +GEN_VXFORM(vsl, 2, 7);
  6348 +GEN_VXFORM(vsr, 2, 11);
6347 6349 GEN_VXFORM(vpkuhum, 7, 0);
6348 6350 GEN_VXFORM(vpkuwum, 7, 1);
6349 6351 GEN_VXFORM(vpkuhus, 7, 2);
... ...