gwj / at91sam9263 · Commits

Commit ba9a74dae0bb696ceab1ee2291cee43ef241a639

Authored by bellard
1 parent 3d9fb9fe

fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1937 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 3 additions and 3 deletions
target-mips/helper.c
  View file @ba9a74d
... ... @@ -231,7 +231,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
231 231 env->CP0_Context = (env->CP0_Context & 0xff800000) |
232 232 ((address >> 9) & 0x007ffff0);
233 233 env->CP0_EntryHi =
234   - (env->CP0_EntryHi & 0xFF) | (address & 0xFFFFF000);
  234 + (env->CP0_EntryHi & 0xFF) | (address & 0xFFFFE000);
235 235 env->exception_index = exception;
236 236 env->error_code = error_code;
237 237 ret = 1;
... ...
target-mips/op_helper.c
  View file @ba9a74d
... ... @@ -342,7 +342,7 @@ void do_mtc0 (int reg, int sel)
342 342 rn = "EntryLo1";
343 343 break;
344 344 case 4:
345   - val = (env->CP0_Context & 0xFF000000) | (T0 & 0x00FFFFF0);
  345 + val = (env->CP0_Context & 0xFF800000) | (T0 & 0x007FFFF0);
346 346 old = env->CP0_Context;
347 347 env->CP0_Context = val;
348 348 rn = "Context";
... ... @@ -366,7 +366,7 @@ void do_mtc0 (int reg, int sel)
366 366 rn = "Count";
367 367 break;
368 368 case 10:
369   - val = T0 & 0xFFFFF0FF;
  369 + val = T0 & 0xFFFFE0FF;
370 370 old = env->CP0_EntryHi;
371 371 env->CP0_EntryHi = val;
372 372 /* If the ASID changes, flush qemu's TLB. */
... ...