gwj / at91sam9263 · Commits

Commit 3d9fb9fefe3f4e209b57443bed18691a2c6f3e7a

Authored by bellard
1 parent 42fe4044

cosmetics (Thiemo Seufer) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1936 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 12 additions and 15 deletions
target-mips/helper.c
  View file @3d9fb9f
... ... @@ -40,8 +40,8 @@ static int map_address (CPUState *env, target_ulong *physical, int *prot,
40 40 int ret;
41 41  
42 42 ret = -2;
43   - tag = (address & 0xFFFFE000);
44   - ASID = env->CP0_EntryHi & 0x000000FF;
  43 + tag = address & 0xFFFFE000;
  44 + ASID = env->CP0_EntryHi & 0xFF;
45 45 for (i = 0; i < MIPS_TLB_NB; i++) {
46 46 tlb = &env->tlb[i];
47 47 /* Check ASID, virtual page number & size */
... ... @@ -74,7 +74,7 @@ int get_physical_address (CPUState *env, target_ulong *physical, int *prot,
74 74 int ret;
75 75  
76 76 /* User mode can only access useg */
77   - user_mode = ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM) ? 1 : 0;
  77 + user_mode = (env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM;
78 78 #if 0
79 79 if (logfile) {
80 80 fprintf(logfile, "user mode %d h %08x\n",
... ... @@ -231,7 +231,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
231 231 env->CP0_Context = (env->CP0_Context & 0xff800000) |
232 232 ((address >> 9) & 0x007ffff0);
233 233 env->CP0_EntryHi =
234   - (env->CP0_EntryHi & 0x000000FF) | (address & 0xFFFFF000);
  234 + (env->CP0_EntryHi & 0xFF) | (address & 0xFFFFF000);
235 235 env->exception_index = exception;
236 236 env->error_code = error_code;
237 237 ret = 1;
... ...
target-mips/op_helper.c
  View file @3d9fb9f
... ... @@ -330,13 +330,13 @@ void do_mtc0 (int reg, int sel)
330 330 rn = "Index";
331 331 break;
332 332 case 2:
333   - val = T0 & 0x03FFFFFFF;
  333 + val = T0 & 0x3FFFFFFF;
334 334 old = env->CP0_EntryLo0;
335 335 env->CP0_EntryLo0 = val;
336 336 rn = "EntryLo0";
337 337 break;
338 338 case 3:
339   - val = T0 & 0x03FFFFFFF;
  339 + val = T0 & 0x3FFFFFFF;
340 340 old = env->CP0_EntryLo1;
341 341 env->CP0_EntryLo1 = val;
342 342 rn = "EntryLo1";
... ... @@ -403,20 +403,17 @@ void do_mtc0 (int reg, int sel)
403 403 old, val, env->CP0_Cause, old & mask, val & mask,
404 404 env->CP0_Cause & mask);
405 405 }
406   -#if 1
407 406 if ((val & (1 << CP0St_IE)) && !(old & (1 << CP0St_IE)) &&
408 407 !(env->hflags & MIPS_HFLAG_EXL) &&
409 408 !(env->hflags & MIPS_HFLAG_ERL) &&
410   - !(env->hflags & MIPS_HFLAG_DM) &&
  409 + !(env->hflags & MIPS_HFLAG_DM) &&
411 410 (env->CP0_Status & env->CP0_Cause & mask)) {
412 411 if (logfile)
413 412 fprintf(logfile, "Raise pending IRQs\n");
414 413 env->interrupt_request |= CPU_INTERRUPT_HARD;
415   - do_raise_exception(EXCP_EXT_INTERRUPT);
416   - } else if (!(val & 0x00000001) && (old & 0x00000001)) {
  414 + } else if (!(val & (1 << CP0St_IE)) && (old & (1 << CP0St_IE))) {
417 415 env->interrupt_request &= ~CPU_INTERRUPT_HARD;
418 416 }
419   -#endif
420 417 rn = "Status";
421 418 break;
422 419 case 13:
... ... @@ -605,9 +602,9 @@ void do_tlbp (void)
605 602 uint8_t ASID;
606 603 int i;
607 604  
608   - tag = (env->CP0_EntryHi & 0xFFFFE000);
609   - ASID = env->CP0_EntryHi & 0x000000FF;
610   - for (i = 0; i < MIPS_TLB_NB; i++) {
  605 + tag = env->CP0_EntryHi & 0xFFFFE000;
  606 + ASID = env->CP0_EntryHi & 0xFF;
  607 + for (i = 0; i < MIPS_TLB_NB; i++) {
611 608 tlb = &env->tlb[i];
612 609 /* Check ASID, virtual page number & size */
613 610 if ((tlb->G == 1 || tlb->ASID == ASID) && tlb->VPN == tag) {
... ...
target-mips/translate.c
  View file @3d9fb9f
... ... @@ -1614,7 +1614,7 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
1614 1614 #if defined(CONFIG_USER_ONLY)
1615 1615 ctx.mem_idx = 0;
1616 1616 #else
1617   - ctx.mem_idx = (ctx.hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM ? 0 : 1;
  1617 + ctx.mem_idx = !((ctx.hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM);
1618 1618 #endif
1619 1619 ctx.CP0_Status = env->CP0_Status;
1620 1620 #ifdef DEBUG_DISAS
... ...