gwj / at91sam9263 · Commits

Commit a973001797221b0fd7be55cb6513c72a01f4b639

Authored by aurel32
1 parent ec6469a3

target-ppc: Remove a few TCG temp variable leaks 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5660 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 19 additions and 9 deletions
target-ppc/translate.c
  View file @a973001
... ... @@ -858,6 +858,7 @@ GEN_HANDLER(isel, 0x1F, 0x0F, 0xFF, 0x00000001, PPC_ISEL)
858 858 gen_set_label(l1);
859 859 tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
860 860 gen_set_label(l2);
  861 + tcg_temp_free(t0);
861 862 }
862 863  
863 864 /*** Integer arithmetic ***/
... ... @@ -911,15 +912,21 @@ static always_inline void gen_op_arith_compute_ca(DisasContext *ctx, TCGv arg1,
911 912 } else {
912 913 tcg_gen_brcond_tl(TCG_COND_GEU, t0, t1, l1);
913 914 }
  915 + tcg_gen_ori_tl(cpu_xer, cpu_xer, 1 << XER_CA);
  916 + gen_set_label(l1);
  917 + tcg_temp_free(t0);
  918 + tcg_temp_free(t1);
914 919 } else
915 920 #endif
916   - if (sub) {
917   - tcg_gen_brcond_tl(TCG_COND_GTU, arg1, arg2, l1);
918   - } else {
919   - tcg_gen_brcond_tl(TCG_COND_GEU, arg1, arg2, l1);
  921 + {
  922 + if (sub) {
  923 + tcg_gen_brcond_tl(TCG_COND_GTU, arg1, arg2, l1);
  924 + } else {
  925 + tcg_gen_brcond_tl(TCG_COND_GEU, arg1, arg2, l1);
  926 + }
  927 + tcg_gen_ori_tl(cpu_xer, cpu_xer, 1 << XER_CA);
  928 + gen_set_label(l1);
920 929 }
921   - tcg_gen_ori_tl(cpu_xer, cpu_xer, 1 << XER_CA);
922   - gen_set_label(l1);
923 930 }
924 931  
925 932 /* Common add function */
... ... @@ -1230,8 +1237,8 @@ GEN_HANDLER(mullwo, 0x1F, 0x0B, 0x17, 0x00000000, PPC_INTEGER)
1230 1237 int l1;
1231 1238 TCGv t0, t1;
1232 1239  
1233   - t0 = tcg_temp_local_new(TCG_TYPE_I64);
1234   - t1 = tcg_temp_local_new(TCG_TYPE_I64);
  1240 + t0 = tcg_temp_new(TCG_TYPE_I64);
  1241 + t1 = tcg_temp_new(TCG_TYPE_I64);
1235 1242 l1 = gen_new_label();
1236 1243 /* Start with XER OV disabled, the most likely case */
1237 1244 tcg_gen_andi_tl(cpu_xer, cpu_xer, ~(1 << XER_OV));
... ... @@ -1253,6 +1260,8 @@ GEN_HANDLER(mullwo, 0x1F, 0x0B, 0x17, 0x00000000, PPC_INTEGER)
1253 1260 #endif
1254 1261 tcg_gen_ori_tl(cpu_xer, cpu_xer, (1 << XER_OV) | (1 << XER_SO));
1255 1262 gen_set_label(l1);
  1263 + tcg_temp_free(t0);
  1264 + tcg_temp_free(t1);
1256 1265 if (unlikely(Rc(ctx->opcode) != 0))
1257 1266 gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
1258 1267 }
... ... @@ -2034,8 +2043,8 @@ static always_inline void gen_sradi (DisasContext *ctx, int n)
2034 2043 TCGv t0;
2035 2044 l1 = gen_new_label();
2036 2045 l2 = gen_new_label();
  2046 + t0 = tcg_temp_local_new(TCG_TYPE_TL);
2037 2047 tcg_gen_brcondi_tl(TCG_COND_GE, cpu_gpr[rS(ctx->opcode)], 0, l1);
2038   - t0 = tcg_temp_new(TCG_TYPE_TL);
2039 2048 tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], (1ULL << sh) - 1);
2040 2049 tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1);
2041 2050 tcg_gen_ori_tl(cpu_xer, cpu_xer, 1 << XER_CA);
... ... @@ -2043,6 +2052,7 @@ static always_inline void gen_sradi (DisasContext *ctx, int n)
2043 2052 gen_set_label(l1);
2044 2053 tcg_gen_andi_tl(cpu_xer, cpu_xer, ~(1 << XER_CA));
2045 2054 gen_set_label(l2);
  2055 + tcg_temp_free(t0);
2046 2056 tcg_gen_sari_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], sh);
2047 2057 } else {
2048 2058 tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
... ...