Commit a496775f87da7f2c445b146e0b31d3895d4af1e0
1 parent
9898128f
Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdout
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2677 c046a42c-6fe2-441c-8c8c-71466251a162
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7 changed files
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216 additions
and
49 deletions
hw/ppc.c
@@ -40,8 +40,11 @@ void ppc_set_irq (CPUState *env, int n_IRQ, int level) | @@ -40,8 +40,11 @@ void ppc_set_irq (CPUState *env, int n_IRQ, int level) | ||
40 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); | 40 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
41 | } | 41 | } |
42 | #if defined(PPC_DEBUG_IRQ) | 42 | #if defined(PPC_DEBUG_IRQ) |
43 | - printf("%s: %p n_IRQ %d level %d => pending %08x req %08x\n", __func__, | ||
44 | - env, n_IRQ, level, env->pending_interrupts, env->interrupt_request); | 43 | + if (loglevel & CPU_LOG_INT) { |
44 | + fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08x req %08x\n", | ||
45 | + __func__, env, n_IRQ, level, | ||
46 | + env->pending_interrupts, env->interrupt_request); | ||
47 | + } | ||
45 | #endif | 48 | #endif |
46 | } | 49 | } |
47 | 50 | ||
@@ -52,7 +55,10 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | @@ -52,7 +55,10 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | ||
52 | int cur_level; | 55 | int cur_level; |
53 | 56 | ||
54 | #if defined(PPC_DEBUG_IRQ) | 57 | #if defined(PPC_DEBUG_IRQ) |
55 | - printf("%s: env %p pin %d level %d\n", __func__, env, pin, level); | 58 | + if (loglevel & CPU_LOG_INT) { |
59 | + fprintf(logfile, "%s: env %p pin %d level %d\n", __func__, | ||
60 | + env, pin, level); | ||
61 | + } | ||
56 | #endif | 62 | #endif |
57 | cur_level = (env->irq_input_state >> pin) & 1; | 63 | cur_level = (env->irq_input_state >> pin) & 1; |
58 | /* Don't generate spurious events */ | 64 | /* Don't generate spurious events */ |
@@ -61,14 +67,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | @@ -61,14 +67,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | ||
61 | case PPC6xx_INPUT_INT: | 67 | case PPC6xx_INPUT_INT: |
62 | /* Level sensitive - active high */ | 68 | /* Level sensitive - active high */ |
63 | #if defined(PPC_DEBUG_IRQ) | 69 | #if defined(PPC_DEBUG_IRQ) |
64 | - printf("%s: set the external IRQ state to %d\n", __func__, level); | 70 | + if (loglevel & CPU_LOG_INT) { |
71 | + fprintf(logfile, "%s: set the external IRQ state to %d\n", | ||
72 | + __func__, level); | ||
73 | + } | ||
65 | #endif | 74 | #endif |
66 | ppc_set_irq(env, PPC_INTERRUPT_EXT, level); | 75 | ppc_set_irq(env, PPC_INTERRUPT_EXT, level); |
67 | break; | 76 | break; |
68 | case PPC6xx_INPUT_SMI: | 77 | case PPC6xx_INPUT_SMI: |
69 | /* Level sensitive - active high */ | 78 | /* Level sensitive - active high */ |
70 | #if defined(PPC_DEBUG_IRQ) | 79 | #if defined(PPC_DEBUG_IRQ) |
71 | - printf("%s: set the SMI IRQ state to %d\n", __func__, level); | 80 | + if (loglevel & CPU_LOG_INT) { |
81 | + fprintf(logfile, "%s: set the SMI IRQ state to %d\n", | ||
82 | + __func__, level); | ||
83 | + } | ||
72 | #endif | 84 | #endif |
73 | ppc_set_irq(env, PPC_INTERRUPT_SMI, level); | 85 | ppc_set_irq(env, PPC_INTERRUPT_SMI, level); |
74 | break; | 86 | break; |
@@ -79,7 +91,10 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | @@ -79,7 +91,10 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | ||
79 | */ | 91 | */ |
80 | if (cur_level == 1 && level == 0) { | 92 | if (cur_level == 1 && level == 0) { |
81 | #if defined(PPC_DEBUG_IRQ) | 93 | #if defined(PPC_DEBUG_IRQ) |
82 | - printf("%s: raise machine check state\n", __func__); | 94 | + if (loglevel & CPU_LOG_INT) { |
95 | + fprintf(logfile, "%s: raise machine check state\n", | ||
96 | + __func__); | ||
97 | + } | ||
83 | #endif | 98 | #endif |
84 | ppc_set_irq(env, PPC_INTERRUPT_MCK, 1); | 99 | ppc_set_irq(env, PPC_INTERRUPT_MCK, 1); |
85 | } | 100 | } |
@@ -89,12 +104,16 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | @@ -89,12 +104,16 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | ||
89 | /* XXX: TODO: relay the signal to CKSTP_OUT pin */ | 104 | /* XXX: TODO: relay the signal to CKSTP_OUT pin */ |
90 | if (level) { | 105 | if (level) { |
91 | #if defined(PPC_DEBUG_IRQ) | 106 | #if defined(PPC_DEBUG_IRQ) |
92 | - printf("%s: stop the CPU\n", __func__); | 107 | + if (loglevel & CPU_LOG_INT) { |
108 | + fprintf(logfile, "%s: stop the CPU\n", __func__); | ||
109 | + } | ||
93 | #endif | 110 | #endif |
94 | env->halted = 1; | 111 | env->halted = 1; |
95 | } else { | 112 | } else { |
96 | #if defined(PPC_DEBUG_IRQ) | 113 | #if defined(PPC_DEBUG_IRQ) |
97 | - printf("%s: restart the CPU\n", __func__); | 114 | + if (loglevel & CPU_LOG_INT) { |
115 | + fprintf(logfile, "%s: restart the CPU\n", __func__); | ||
116 | + } | ||
98 | #endif | 117 | #endif |
99 | env->halted = 0; | 118 | env->halted = 0; |
100 | } | 119 | } |
@@ -104,7 +123,9 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | @@ -104,7 +123,9 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | ||
104 | if (level) { | 123 | if (level) { |
105 | #if 0 // XXX: TOFIX | 124 | #if 0 // XXX: TOFIX |
106 | #if defined(PPC_DEBUG_IRQ) | 125 | #if defined(PPC_DEBUG_IRQ) |
107 | - printf("%s: reset the CPU\n", __func__); | 126 | + if (loglevel & CPU_LOG_INT) { |
127 | + fprintf(logfile, "%s: reset the CPU\n", __func__); | ||
128 | + } | ||
108 | #endif | 129 | #endif |
109 | cpu_reset(env); | 130 | cpu_reset(env); |
110 | #endif | 131 | #endif |
@@ -112,14 +133,19 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | @@ -112,14 +133,19 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) | ||
112 | break; | 133 | break; |
113 | case PPC6xx_INPUT_SRESET: | 134 | case PPC6xx_INPUT_SRESET: |
114 | #if defined(PPC_DEBUG_IRQ) | 135 | #if defined(PPC_DEBUG_IRQ) |
115 | - printf("%s: set the RESET IRQ state to %d\n", __func__, level); | 136 | + if (loglevel & CPU_LOG_INT) { |
137 | + fprintf(logfile, "%s: set the RESET IRQ state to %d\n", | ||
138 | + __func__, level); | ||
139 | + } | ||
116 | #endif | 140 | #endif |
117 | ppc_set_irq(env, PPC_INTERRUPT_RESET, level); | 141 | ppc_set_irq(env, PPC_INTERRUPT_RESET, level); |
118 | break; | 142 | break; |
119 | default: | 143 | default: |
120 | /* Unknown pin - do nothing */ | 144 | /* Unknown pin - do nothing */ |
121 | #if defined(PPC_DEBUG_IRQ) | 145 | #if defined(PPC_DEBUG_IRQ) |
122 | - printf("%s: unknown IRQ pin %d\n", __func__, pin); | 146 | + if (loglevel & CPU_LOG_INT) { |
147 | + fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin); | ||
148 | + } | ||
123 | #endif | 149 | #endif |
124 | return; | 150 | return; |
125 | } | 151 | } |
@@ -176,7 +202,10 @@ static void ppc405_set_irq (void *opaque, int pin, int level) | @@ -176,7 +202,10 @@ static void ppc405_set_irq (void *opaque, int pin, int level) | ||
176 | case PPC405_INPUT_INT: | 202 | case PPC405_INPUT_INT: |
177 | /* Level sensitive - active high */ | 203 | /* Level sensitive - active high */ |
178 | #if defined(PPC_DEBUG_IRQ) | 204 | #if defined(PPC_DEBUG_IRQ) |
179 | - printf("%s: set the external IRQ state to %d\n", __func__, level); | 205 | + if (loglevel & CPU_LOG_INT) { |
206 | + fprintf(logfile, "%s: set the external IRQ state to %d\n", | ||
207 | + __func__, level); | ||
208 | + } | ||
180 | #endif | 209 | #endif |
181 | ppc_set_irq(env, PPC_INTERRUPT_EXT, level); | 210 | ppc_set_irq(env, PPC_INTERRUPT_EXT, level); |
182 | break; | 211 | break; |
@@ -184,12 +213,16 @@ static void ppc405_set_irq (void *opaque, int pin, int level) | @@ -184,12 +213,16 @@ static void ppc405_set_irq (void *opaque, int pin, int level) | ||
184 | /* Level sensitive - active low */ | 213 | /* Level sensitive - active low */ |
185 | if (level) { | 214 | if (level) { |
186 | #if defined(PPC_DEBUG_IRQ) | 215 | #if defined(PPC_DEBUG_IRQ) |
187 | - printf("%s: stop the CPU\n", __func__); | 216 | + if (loglevel & CPU_LOG_INT) { |
217 | + fprintf(logfile, "%s: stop the CPU\n", __func__); | ||
218 | + } | ||
188 | #endif | 219 | #endif |
189 | env->halted = 1; | 220 | env->halted = 1; |
190 | } else { | 221 | } else { |
191 | #if defined(PPC_DEBUG_IRQ) | 222 | #if defined(PPC_DEBUG_IRQ) |
192 | - printf("%s: restart the CPU\n", __func__); | 223 | + if (loglevel & CPU_LOG_INT) { |
224 | + fprintf(logfile, "%s: restart the CPU\n", __func__); | ||
225 | + } | ||
193 | #endif | 226 | #endif |
194 | env->halted = 0; | 227 | env->halted = 0; |
195 | } | 228 | } |
@@ -197,14 +230,19 @@ static void ppc405_set_irq (void *opaque, int pin, int level) | @@ -197,14 +230,19 @@ static void ppc405_set_irq (void *opaque, int pin, int level) | ||
197 | case PPC405_INPUT_DEBUG: | 230 | case PPC405_INPUT_DEBUG: |
198 | /* Level sensitive - active high */ | 231 | /* Level sensitive - active high */ |
199 | #if defined(PPC_DEBUG_IRQ) | 232 | #if defined(PPC_DEBUG_IRQ) |
200 | - printf("%s: set the external IRQ state to %d\n", __func__, level); | 233 | + if (loglevel & CPU_LOG_INT) { |
234 | + fprintf(logfile, "%s: set the external IRQ state to %d\n", | ||
235 | + __func__, level); | ||
236 | + } | ||
201 | #endif | 237 | #endif |
202 | ppc_set_irq(env, EXCP_40x_DEBUG, level); | 238 | ppc_set_irq(env, EXCP_40x_DEBUG, level); |
203 | break; | 239 | break; |
204 | default: | 240 | default: |
205 | /* Unknown pin - do nothing */ | 241 | /* Unknown pin - do nothing */ |
206 | #if defined(PPC_DEBUG_IRQ) | 242 | #if defined(PPC_DEBUG_IRQ) |
207 | - printf("%s: unknown IRQ pin %d\n", __func__, pin); | 243 | + if (loglevel & CPU_LOG_INT) { |
244 | + fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin); | ||
245 | + } | ||
208 | #endif | 246 | #endif |
209 | return; | 247 | return; |
210 | } | 248 | } |
@@ -217,7 +255,6 @@ static void ppc405_set_irq (void *opaque, int pin, int level) | @@ -217,7 +255,6 @@ static void ppc405_set_irq (void *opaque, int pin, int level) | ||
217 | 255 | ||
218 | void ppc405_irq_init (CPUState *env) | 256 | void ppc405_irq_init (CPUState *env) |
219 | { | 257 | { |
220 | - printf("%s\n", __func__); | ||
221 | env->irq_inputs = (void **)qemu_allocate_irqs(&ppc405_set_irq, env, 7); | 258 | env->irq_inputs = (void **)qemu_allocate_irqs(&ppc405_set_irq, env, 7); |
222 | } | 259 | } |
223 | 260 | ||
@@ -255,8 +292,10 @@ uint32_t cpu_ppc_load_tbl (CPUState *env) | @@ -255,8 +292,10 @@ uint32_t cpu_ppc_load_tbl (CPUState *env) | ||
255 | now = time(NULL); | 292 | now = time(NULL); |
256 | if (last_time != now) { | 293 | if (last_time != now) { |
257 | last_time = now; | 294 | last_time = now; |
258 | - printf("%s: tb=0x%016lx %d %08lx\n", | ||
259 | - __func__, tb, now, tb_env->tb_offset); | 295 | + if (loglevel) { |
296 | + fprintf(logfile, "%s: tb=0x%016lx %d %08lx\n", | ||
297 | + __func__, tb, now, tb_env->tb_offset); | ||
298 | + } | ||
260 | } | 299 | } |
261 | } | 300 | } |
262 | #endif | 301 | #endif |
@@ -271,7 +310,9 @@ uint32_t cpu_ppc_load_tbu (CPUState *env) | @@ -271,7 +310,9 @@ uint32_t cpu_ppc_load_tbu (CPUState *env) | ||
271 | 310 | ||
272 | tb = cpu_ppc_get_tb(tb_env); | 311 | tb = cpu_ppc_get_tb(tb_env); |
273 | #ifdef DEBUG_TB | 312 | #ifdef DEBUG_TB |
274 | - printf("%s: tb=0x%016lx\n", __func__, tb); | 313 | + if (loglevel) { |
314 | + fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb); | ||
315 | + } | ||
275 | #endif | 316 | #endif |
276 | 317 | ||
277 | return tb >> 32; | 318 | return tb >> 32; |
@@ -282,7 +323,9 @@ static void cpu_ppc_store_tb (ppc_tb_t *tb_env, uint64_t value) | @@ -282,7 +323,9 @@ static void cpu_ppc_store_tb (ppc_tb_t *tb_env, uint64_t value) | ||
282 | tb_env->tb_offset = muldiv64(value, ticks_per_sec, tb_env->tb_freq) | 323 | tb_env->tb_offset = muldiv64(value, ticks_per_sec, tb_env->tb_freq) |
283 | - qemu_get_clock(vm_clock); | 324 | - qemu_get_clock(vm_clock); |
284 | #ifdef DEBUG_TB | 325 | #ifdef DEBUG_TB |
285 | - printf("%s: tb=0x%016lx offset=%08x\n", __func__, value); | 326 | + if (loglevel) { |
327 | + fprintf(logfile, "%s: tb=0x%016lx offset=%08x\n", __func__, value); | ||
328 | + } | ||
286 | #endif | 329 | #endif |
287 | } | 330 | } |
288 | 331 | ||
@@ -314,7 +357,9 @@ uint32_t cpu_ppc_load_decr (CPUState *env) | @@ -314,7 +357,9 @@ uint32_t cpu_ppc_load_decr (CPUState *env) | ||
314 | else | 357 | else |
315 | decr = -muldiv64(-diff, tb_env->tb_freq, ticks_per_sec); | 358 | decr = -muldiv64(-diff, tb_env->tb_freq, ticks_per_sec); |
316 | #if defined(DEBUG_TB) | 359 | #if defined(DEBUG_TB) |
317 | - printf("%s: 0x%08x\n", __func__, decr); | 360 | + if (loglevel) { |
361 | + fprintf(logfile, "%s: 0x%08x\n", __func__, decr); | ||
362 | + } | ||
318 | #endif | 363 | #endif |
319 | 364 | ||
320 | return decr; | 365 | return decr; |
@@ -327,7 +372,9 @@ static inline void cpu_ppc_decr_excp (CPUState *env) | @@ -327,7 +372,9 @@ static inline void cpu_ppc_decr_excp (CPUState *env) | ||
327 | { | 372 | { |
328 | /* Raise it */ | 373 | /* Raise it */ |
329 | #ifdef DEBUG_TB | 374 | #ifdef DEBUG_TB |
330 | - printf("raise decrementer exception\n"); | 375 | + if (loglevel) { |
376 | + fprintf(logfile, "raise decrementer exception\n"); | ||
377 | + } | ||
331 | #endif | 378 | #endif |
332 | ppc_set_irq(env, PPC_INTERRUPT_DECR, 1); | 379 | ppc_set_irq(env, PPC_INTERRUPT_DECR, 1); |
333 | } | 380 | } |
@@ -339,7 +386,9 @@ static void _cpu_ppc_store_decr (CPUState *env, uint32_t decr, | @@ -339,7 +386,9 @@ static void _cpu_ppc_store_decr (CPUState *env, uint32_t decr, | ||
339 | uint64_t now, next; | 386 | uint64_t now, next; |
340 | 387 | ||
341 | #ifdef DEBUG_TB | 388 | #ifdef DEBUG_TB |
342 | - printf("%s: 0x%08x => 0x%08x\n", __func__, decr, value); | 389 | + if (loglevel) { |
390 | + fprintf(logfile, "%s: 0x%08x => 0x%08x\n", __func__, decr, value); | ||
391 | + } | ||
343 | #endif | 392 | #endif |
344 | now = qemu_get_clock(vm_clock); | 393 | now = qemu_get_clock(vm_clock); |
345 | next = now + muldiv64(value, ticks_per_sec, tb_env->tb_freq); | 394 | next = now + muldiv64(value, ticks_per_sec, tb_env->tb_freq); |
@@ -578,17 +627,20 @@ void store_40x_pit (CPUState *env, target_ulong val) | @@ -578,17 +627,20 @@ void store_40x_pit (CPUState *env, target_ulong val) | ||
578 | 627 | ||
579 | tb_env = env->tb_env; | 628 | tb_env = env->tb_env; |
580 | ppcemb_timer = tb_env->opaque; | 629 | ppcemb_timer = tb_env->opaque; |
581 | - if (loglevel) | 630 | + if (loglevel) { |
582 | fprintf(logfile, "%s %p %p\n", __func__, tb_env, ppcemb_timer); | 631 | fprintf(logfile, "%s %p %p\n", __func__, tb_env, ppcemb_timer); |
632 | + } | ||
583 | ppcemb_timer->pit_reload = val; | 633 | ppcemb_timer->pit_reload = val; |
584 | if (val == 0) { | 634 | if (val == 0) { |
585 | /* Stop PIT */ | 635 | /* Stop PIT */ |
586 | - if (loglevel) | 636 | + if (loglevel) { |
587 | fprintf(logfile, "%s: stop PIT\n", __func__); | 637 | fprintf(logfile, "%s: stop PIT\n", __func__); |
638 | + } | ||
588 | qemu_del_timer(tb_env->decr_timer); | 639 | qemu_del_timer(tb_env->decr_timer); |
589 | } else { | 640 | } else { |
590 | - if (loglevel) | 641 | + if (loglevel) { |
591 | fprintf(logfile, "%s: start PIT 0x" ADDRX "\n", __func__, val); | 642 | fprintf(logfile, "%s: start PIT 0x" ADDRX "\n", __func__, val); |
643 | + } | ||
592 | now = qemu_get_clock(vm_clock); | 644 | now = qemu_get_clock(vm_clock); |
593 | next = now + muldiv64(val, ticks_per_sec, tb_env->tb_freq); | 645 | next = now + muldiv64(val, ticks_per_sec, tb_env->tb_freq); |
594 | if (next == now) | 646 | if (next == now) |
target-ppc/helper.c
@@ -649,10 +649,10 @@ int mmu4xx_get_physical_address (CPUState *env, mmu_ctx_t *ctx, | @@ -649,10 +649,10 @@ int mmu4xx_get_physical_address (CPUState *env, mmu_ctx_t *ctx, | ||
649 | } | 649 | } |
650 | mask = ~(tlb->size - 1); | 650 | mask = ~(tlb->size - 1); |
651 | if (loglevel) { | 651 | if (loglevel) { |
652 | - fprintf(logfile, "%s: TLB %d address " ADDRX " PID " ADDRX " <=> " | ||
653 | - ADDRX " " ADDRX " " ADDRX "\n", | ||
654 | - __func__, i, address, env->spr[SPR_40x_PID], | ||
655 | - tlb->EPN, mask, tlb->PID); | 652 | + fprintf(logfile, "%s: TLB %d address " ADDRX " PID %d <=> " |
653 | + ADDRX " " ADDRX " %d\n", | ||
654 | + __func__, i, address, (int)env->spr[SPR_40x_PID], | ||
655 | + tlb->EPN, mask, (int)tlb->PID); | ||
656 | } | 656 | } |
657 | /* Check PID */ | 657 | /* Check PID */ |
658 | if (tlb->PID != 0 && tlb->PID != env->spr[SPR_40x_PID]) | 658 | if (tlb->PID != 0 && tlb->PID != env->spr[SPR_40x_PID]) |
@@ -1450,9 +1450,6 @@ void do_interrupt (CPUState *env) | @@ -1450,9 +1450,6 @@ void do_interrupt (CPUState *env) | ||
1450 | if (loglevel) { | 1450 | if (loglevel) { |
1451 | fprintf(logfile, "DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX | 1451 | fprintf(logfile, "DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX |
1452 | "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]); | 1452 | "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]); |
1453 | - } else { | ||
1454 | - printf("DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX "\n", | ||
1455 | - env->spr[SPR_DSISR], env->spr[SPR_DAR]); | ||
1456 | } | 1453 | } |
1457 | #endif | 1454 | #endif |
1458 | goto store_next; | 1455 | goto store_next; |
@@ -1495,7 +1492,9 @@ void do_interrupt (CPUState *env) | @@ -1495,7 +1492,9 @@ void do_interrupt (CPUState *env) | ||
1495 | case EXCP_FP: | 1492 | case EXCP_FP: |
1496 | if (msr_fe0 == 0 && msr_fe1 == 0) { | 1493 | if (msr_fe0 == 0 && msr_fe1 == 0) { |
1497 | #if defined (DEBUG_EXCEPTIONS) | 1494 | #if defined (DEBUG_EXCEPTIONS) |
1498 | - printf("Ignore floating point exception\n"); | 1495 | + if (loglevel) { |
1496 | + fprintf(logfile, "Ignore floating point exception\n"); | ||
1497 | + } | ||
1499 | #endif | 1498 | #endif |
1500 | return; | 1499 | return; |
1501 | } | 1500 | } |
@@ -1508,7 +1507,12 @@ void do_interrupt (CPUState *env) | @@ -1508,7 +1507,12 @@ void do_interrupt (CPUState *env) | ||
1508 | env->fpscr[7] |= 0x4; | 1507 | env->fpscr[7] |= 0x4; |
1509 | break; | 1508 | break; |
1510 | case EXCP_INVAL: | 1509 | case EXCP_INVAL: |
1511 | - // printf("Invalid instruction at 0x" ADDRX "\n", env->nip); | 1510 | +#if defined (DEBUG_EXCEPTIONS) |
1511 | + if (loglevel) { | ||
1512 | + fprintf(logfile, "Invalid instruction at 0x" ADDRX "\n", | ||
1513 | + env->nip); | ||
1514 | + } | ||
1515 | +#endif | ||
1512 | msr |= 0x00080000; | 1516 | msr |= 0x00080000; |
1513 | break; | 1517 | break; |
1514 | case EXCP_PRIV: | 1518 | case EXCP_PRIV: |
@@ -1609,8 +1613,10 @@ void do_interrupt (CPUState *env) | @@ -1609,8 +1613,10 @@ void do_interrupt (CPUState *env) | ||
1609 | case PPC_FLAGS_EXCP_40x: | 1613 | case PPC_FLAGS_EXCP_40x: |
1610 | /* PIT on 4xx */ | 1614 | /* PIT on 4xx */ |
1611 | msr &= ~0xFFFF0000; | 1615 | msr &= ~0xFFFF0000; |
1616 | +#if defined (DEBUG_EXCEPTIONS) | ||
1612 | if (loglevel != 0) | 1617 | if (loglevel != 0) |
1613 | fprintf(logfile, "PIT exception\n"); | 1618 | fprintf(logfile, "PIT exception\n"); |
1619 | +#endif | ||
1614 | goto store_next; | 1620 | goto store_next; |
1615 | case PPC_FLAGS_EXCP_602: | 1621 | case PPC_FLAGS_EXCP_602: |
1616 | case PPC_FLAGS_EXCP_603: | 1622 | case PPC_FLAGS_EXCP_603: |
@@ -1630,8 +1636,10 @@ void do_interrupt (CPUState *env) | @@ -1630,8 +1636,10 @@ void do_interrupt (CPUState *env) | ||
1630 | case PPC_FLAGS_EXCP_40x: | 1636 | case PPC_FLAGS_EXCP_40x: |
1631 | /* FIT on 4xx */ | 1637 | /* FIT on 4xx */ |
1632 | msr &= ~0xFFFF0000; | 1638 | msr &= ~0xFFFF0000; |
1639 | +#if defined (DEBUG_EXCEPTIONS) | ||
1633 | if (loglevel != 0) | 1640 | if (loglevel != 0) |
1634 | fprintf(logfile, "FIT exception\n"); | 1641 | fprintf(logfile, "FIT exception\n"); |
1642 | +#endif | ||
1635 | goto store_next; | 1643 | goto store_next; |
1636 | default: | 1644 | default: |
1637 | cpu_abort(env, "Invalid exception 0x1010 !\n"); | 1645 | cpu_abort(env, "Invalid exception 0x1010 !\n"); |
@@ -1644,8 +1652,10 @@ void do_interrupt (CPUState *env) | @@ -1644,8 +1652,10 @@ void do_interrupt (CPUState *env) | ||
1644 | case PPC_FLAGS_EXCP_40x: | 1652 | case PPC_FLAGS_EXCP_40x: |
1645 | /* Watchdog on 4xx */ | 1653 | /* Watchdog on 4xx */ |
1646 | msr &= ~0xFFFF0000; | 1654 | msr &= ~0xFFFF0000; |
1655 | +#if defined (DEBUG_EXCEPTIONS) | ||
1647 | if (loglevel != 0) | 1656 | if (loglevel != 0) |
1648 | fprintf(logfile, "WDT exception\n"); | 1657 | fprintf(logfile, "WDT exception\n"); |
1658 | +#endif | ||
1649 | goto store_next; | 1659 | goto store_next; |
1650 | case PPC_FLAGS_EXCP_BOOKE: | 1660 | case PPC_FLAGS_EXCP_BOOKE: |
1651 | srr_0 = &env->spr[SPR_BOOKE_CSRR0]; | 1661 | srr_0 = &env->spr[SPR_BOOKE_CSRR0]; |
@@ -1929,11 +1939,12 @@ void ppc_hw_interrupt (CPUPPCState *env) | @@ -1929,11 +1939,12 @@ void ppc_hw_interrupt (CPUPPCState *env) | ||
1929 | { | 1939 | { |
1930 | int raised = 0; | 1940 | int raised = 0; |
1931 | 1941 | ||
1932 | -#if 0 | ||
1933 | - printf("%s: %p pending %08x req %08x %08x me %d ee %d\n", | ||
1934 | - __func__, env, env->pending_interrupts, | ||
1935 | - env->interrupt_request, interrupt_request, | ||
1936 | - msr_me, msr_ee); | 1942 | +#if 1 |
1943 | + if (loglevel & CPU_LOG_INT) { | ||
1944 | + fprintf(logfile, "%s: %p pending %08x req %08x me %d ee %d\n", | ||
1945 | + __func__, env, env->pending_interrupts, | ||
1946 | + env->interrupt_request, msr_me, msr_ee); | ||
1947 | + } | ||
1937 | #endif | 1948 | #endif |
1938 | /* Raise it */ | 1949 | /* Raise it */ |
1939 | if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) { | 1950 | if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) { |
@@ -2007,3 +2018,17 @@ void ppc_hw_interrupt (CPUPPCState *env) | @@ -2007,3 +2018,17 @@ void ppc_hw_interrupt (CPUPPCState *env) | ||
2007 | } | 2018 | } |
2008 | } | 2019 | } |
2009 | #endif /* !CONFIG_USER_ONLY */ | 2020 | #endif /* !CONFIG_USER_ONLY */ |
2021 | + | ||
2022 | +void cpu_dump_EA (target_ulong EA) | ||
2023 | +{ | ||
2024 | + FILE *f; | ||
2025 | + | ||
2026 | + if (logfile) { | ||
2027 | + f = logfile; | ||
2028 | + } else { | ||
2029 | + f = stdout; | ||
2030 | + return; | ||
2031 | + } | ||
2032 | + fprintf(f, "Memory access at address " TARGET_FMT_lx "\n", EA); | ||
2033 | +} | ||
2034 | + |
target-ppc/op.c
@@ -130,6 +130,13 @@ | @@ -130,6 +130,13 @@ | ||
130 | #define REG 31 | 130 | #define REG 31 |
131 | #include "op_template.h" | 131 | #include "op_template.h" |
132 | 132 | ||
133 | + | ||
134 | +void OPPROTO op_print_mem_EA (void) | ||
135 | +{ | ||
136 | + do_print_mem_EA(T0); | ||
137 | + RETURN(); | ||
138 | +} | ||
139 | + | ||
133 | /* PowerPC state maintenance operations */ | 140 | /* PowerPC state maintenance operations */ |
134 | /* set_Rc0 */ | 141 | /* set_Rc0 */ |
135 | PPC_OP(set_Rc0) | 142 | PPC_OP(set_Rc0) |
@@ -360,15 +367,33 @@ void OPPROTO op_store_msr_32 (void) | @@ -360,15 +367,33 @@ void OPPROTO op_store_msr_32 (void) | ||
360 | #endif | 367 | #endif |
361 | 368 | ||
362 | /* SPR */ | 369 | /* SPR */ |
363 | -PPC_OP(load_spr) | 370 | +void OPPROTO op_load_spr (void) |
371 | +{ | ||
372 | + T0 = env->spr[PARAM1]; | ||
373 | + RETURN(); | ||
374 | +} | ||
375 | + | ||
376 | +void OPPROTO op_store_spr (void) | ||
377 | +{ | ||
378 | + env->spr[PARAM1] = T0; | ||
379 | + RETURN(); | ||
380 | +} | ||
381 | + | ||
382 | +void OPPROTO op_load_dump_spr (void) | ||
383 | +{ | ||
384 | + T0 = ppc_load_dump_spr(PARAM1); | ||
385 | + RETURN(); | ||
386 | +} | ||
387 | + | ||
388 | +void OPPROTO op_store_dump_spr (void) | ||
364 | { | 389 | { |
365 | - T0 = regs->spr[PARAM(1)]; | 390 | + ppc_store_dump_spr(PARAM1, T0); |
366 | RETURN(); | 391 | RETURN(); |
367 | } | 392 | } |
368 | 393 | ||
369 | -PPC_OP(store_spr) | 394 | +void OPPROTO op_mask_spr (void) |
370 | { | 395 | { |
371 | - regs->spr[PARAM(1)] = T0; | 396 | + env->spr[PARAM1] &= ~T0; |
372 | RETURN(); | 397 | RETURN(); |
373 | } | 398 | } |
374 | 399 |
target-ppc/op_helper.c
@@ -68,6 +68,12 @@ void do_raise_exception (uint32_t exception) | @@ -68,6 +68,12 @@ void do_raise_exception (uint32_t exception) | ||
68 | do_raise_exception_err(exception, 0); | 68 | do_raise_exception_err(exception, 0); |
69 | } | 69 | } |
70 | 70 | ||
71 | +void cpu_dump_EA (target_ulong EA); | ||
72 | +void do_print_mem_EA (target_ulong EA) | ||
73 | +{ | ||
74 | + cpu_dump_EA(EA); | ||
75 | +} | ||
76 | + | ||
71 | /*****************************************************************************/ | 77 | /*****************************************************************************/ |
72 | /* Registers load and stores */ | 78 | /* Registers load and stores */ |
73 | void do_load_cr (void) | 79 | void do_load_cr (void) |
@@ -181,6 +187,25 @@ void do_store_fpscr (uint32_t mask) | @@ -181,6 +187,25 @@ void do_store_fpscr (uint32_t mask) | ||
181 | set_float_rounding_mode(rnd_type, &env->fp_status); | 187 | set_float_rounding_mode(rnd_type, &env->fp_status); |
182 | } | 188 | } |
183 | 189 | ||
190 | +target_ulong ppc_load_dump_spr (int sprn) | ||
191 | +{ | ||
192 | + if (loglevel) { | ||
193 | + fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", | ||
194 | + sprn, sprn, env->spr[sprn]); | ||
195 | + } | ||
196 | + | ||
197 | + return env->spr[sprn]; | ||
198 | +} | ||
199 | + | ||
200 | +void ppc_store_dump_spr (int sprn, target_ulong val) | ||
201 | +{ | ||
202 | + if (loglevel) { | ||
203 | + fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n", | ||
204 | + sprn, sprn, env->spr[sprn], val); | ||
205 | + } | ||
206 | + env->spr[sprn] = val; | ||
207 | +} | ||
208 | + | ||
184 | /*****************************************************************************/ | 209 | /*****************************************************************************/ |
185 | /* Fixed point operations helpers */ | 210 | /* Fixed point operations helpers */ |
186 | #if defined(TARGET_PPC64) | 211 | #if defined(TARGET_PPC64) |
@@ -1250,10 +1275,14 @@ void do_load_dcr (void) | @@ -1250,10 +1275,14 @@ void do_load_dcr (void) | ||
1250 | target_ulong val; | 1275 | target_ulong val; |
1251 | 1276 | ||
1252 | if (unlikely(env->dcr_env == NULL)) { | 1277 | if (unlikely(env->dcr_env == NULL)) { |
1253 | - printf("No DCR environment\n"); | 1278 | + if (loglevel) { |
1279 | + fprintf(logfile, "No DCR environment\n"); | ||
1280 | + } | ||
1254 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); | 1281 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
1255 | } else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) { | 1282 | } else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) { |
1256 | - printf("DCR read error\n"); | 1283 | + if (loglevel) { |
1284 | + fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0); | ||
1285 | + } | ||
1257 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); | 1286 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
1258 | } else { | 1287 | } else { |
1259 | T0 = val; | 1288 | T0 = val; |
@@ -1263,10 +1292,14 @@ void do_load_dcr (void) | @@ -1263,10 +1292,14 @@ void do_load_dcr (void) | ||
1263 | void do_store_dcr (void) | 1292 | void do_store_dcr (void) |
1264 | { | 1293 | { |
1265 | if (unlikely(env->dcr_env == NULL)) { | 1294 | if (unlikely(env->dcr_env == NULL)) { |
1266 | - printf("No DCR environment\n"); | 1295 | + if (loglevel) { |
1296 | + fprintf(logfile, "No DCR environment\n"); | ||
1297 | + } | ||
1267 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); | 1298 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
1268 | } else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) { | 1299 | } else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) { |
1269 | - printf("DCR write error\n"); | 1300 | + if (loglevel) { |
1301 | + fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0); | ||
1302 | + } | ||
1270 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); | 1303 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
1271 | } | 1304 | } |
1272 | } | 1305 | } |
target-ppc/op_helper.h
@@ -50,6 +50,8 @@ void glue(do_icbi_64, MEMSUFFIX) (void); | @@ -50,6 +50,8 @@ void glue(do_icbi_64, MEMSUFFIX) (void); | ||
50 | 50 | ||
51 | #else | 51 | #else |
52 | 52 | ||
53 | +void do_print_mem_EA (target_ulong EA); | ||
54 | + | ||
53 | /* Registers load and stores */ | 55 | /* Registers load and stores */ |
54 | void do_load_cr (void); | 56 | void do_load_cr (void); |
55 | void do_store_cr (uint32_t mask); | 57 | void do_store_cr (uint32_t mask); |
@@ -57,6 +59,8 @@ void do_load_xer (void); | @@ -57,6 +59,8 @@ void do_load_xer (void); | ||
57 | void do_store_xer (void); | 59 | void do_store_xer (void); |
58 | void do_load_fpscr (void); | 60 | void do_load_fpscr (void); |
59 | void do_store_fpscr (uint32_t mask); | 61 | void do_store_fpscr (uint32_t mask); |
62 | +target_ulong ppc_load_dump_spr (int sprn); | ||
63 | +void ppc_store_dump_spr (int sprn, target_ulong val); | ||
60 | 64 | ||
61 | /* Integer arithmetic helpers */ | 65 | /* Integer arithmetic helpers */ |
62 | void do_adde (void); | 66 | void do_adde (void); |
target-ppc/translate.c
@@ -29,6 +29,7 @@ | @@ -29,6 +29,7 @@ | ||
29 | 29 | ||
30 | //#define DO_SINGLE_STEP | 30 | //#define DO_SINGLE_STEP |
31 | //#define PPC_DEBUG_DISAS | 31 | //#define PPC_DEBUG_DISAS |
32 | +//#define DEBUG_MEMORY_ACCESSES | ||
32 | //#define DO_PPC_STATISTICS | 33 | //#define DO_PPC_STATISTICS |
33 | 34 | ||
34 | #if defined(USE_DIRECT_JUMP) | 35 | #if defined(USE_DIRECT_JUMP) |
@@ -1745,6 +1746,9 @@ static inline void gen_addr_imm_index (DisasContext *ctx, int maskl) | @@ -1745,6 +1746,9 @@ static inline void gen_addr_imm_index (DisasContext *ctx, int maskl) | ||
1745 | if (likely(simm != 0)) | 1746 | if (likely(simm != 0)) |
1746 | gen_op_addi(simm); | 1747 | gen_op_addi(simm); |
1747 | } | 1748 | } |
1749 | +#ifdef DEBUG_MEMORY_ACCESSES | ||
1750 | + gen_op_print_mem_EA(); | ||
1751 | +#endif | ||
1748 | } | 1752 | } |
1749 | 1753 | ||
1750 | static inline void gen_addr_reg_index (DisasContext *ctx) | 1754 | static inline void gen_addr_reg_index (DisasContext *ctx) |
@@ -1756,6 +1760,9 @@ static inline void gen_addr_reg_index (DisasContext *ctx) | @@ -1756,6 +1760,9 @@ static inline void gen_addr_reg_index (DisasContext *ctx) | ||
1756 | gen_op_load_gpr_T1(rB(ctx->opcode)); | 1760 | gen_op_load_gpr_T1(rB(ctx->opcode)); |
1757 | gen_op_add(); | 1761 | gen_op_add(); |
1758 | } | 1762 | } |
1763 | +#ifdef DEBUG_MEMORY_ACCESSES | ||
1764 | + gen_op_print_mem_EA(); | ||
1765 | +#endif | ||
1759 | } | 1766 | } |
1760 | 1767 | ||
1761 | static inline void gen_addr_register (DisasContext *ctx) | 1768 | static inline void gen_addr_register (DisasContext *ctx) |
@@ -1765,6 +1772,9 @@ static inline void gen_addr_register (DisasContext *ctx) | @@ -1765,6 +1772,9 @@ static inline void gen_addr_register (DisasContext *ctx) | ||
1765 | } else { | 1772 | } else { |
1766 | gen_op_load_gpr_T0(rA(ctx->opcode)); | 1773 | gen_op_load_gpr_T0(rA(ctx->opcode)); |
1767 | } | 1774 | } |
1775 | +#ifdef DEBUG_MEMORY_ACCESSES | ||
1776 | + gen_op_print_mem_EA(); | ||
1777 | +#endif | ||
1768 | } | 1778 | } |
1769 | 1779 | ||
1770 | /*** Integer load ***/ | 1780 | /*** Integer load ***/ |
target-ppc/translate_init.c
@@ -25,6 +25,7 @@ | @@ -25,6 +25,7 @@ | ||
25 | 25 | ||
26 | //#define PPC_DUMP_CPU | 26 | //#define PPC_DUMP_CPU |
27 | //#define PPC_DEBUG_SPR | 27 | //#define PPC_DEBUG_SPR |
28 | +//#define PPC_DEBUG_IRQ | ||
28 | 29 | ||
29 | struct ppc_def_t { | 30 | struct ppc_def_t { |
30 | const unsigned char *name; | 31 | const unsigned char *name; |
@@ -61,6 +62,23 @@ static void spr_write_generic (void *opaque, int sprn) | @@ -61,6 +62,23 @@ static void spr_write_generic (void *opaque, int sprn) | ||
61 | gen_op_store_spr(sprn); | 62 | gen_op_store_spr(sprn); |
62 | } | 63 | } |
63 | 64 | ||
65 | +static void spr_read_dump (void *opaque, int sprn) | ||
66 | +{ | ||
67 | + gen_op_load_dump_spr(sprn); | ||
68 | +} | ||
69 | + | ||
70 | +static void spr_write_dump (void *opaque, int sprn) | ||
71 | +{ | ||
72 | + gen_op_store_dump_spr(sprn); | ||
73 | +} | ||
74 | + | ||
75 | +#if !defined(CONFIG_USER_ONLY) | ||
76 | +static void spr_write_clear (void *opaque, int sprn) | ||
77 | +{ | ||
78 | + gen_op_mask_spr(sprn); | ||
79 | +} | ||
80 | +#endif | ||
81 | + | ||
64 | /* SPR common to all PowerPC */ | 82 | /* SPR common to all PowerPC */ |
65 | /* XER */ | 83 | /* XER */ |
66 | static void spr_read_xer (void *opaque, int sprn) | 84 | static void spr_read_xer (void *opaque, int sprn) |