Commit a496775f87da7f2c445b146e0b31d3895d4af1e0
1 parent
9898128f
Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdout
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2677 c046a42c-6fe2-441c-8c8c-71466251a162
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7 changed files
with
216 additions
and
49 deletions
hw/ppc.c
| ... | ... | @@ -40,8 +40,11 @@ void ppc_set_irq (CPUState *env, int n_IRQ, int level) |
| 40 | 40 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
| 41 | 41 | } |
| 42 | 42 | #if defined(PPC_DEBUG_IRQ) |
| 43 | - printf("%s: %p n_IRQ %d level %d => pending %08x req %08x\n", __func__, | |
| 44 | - env, n_IRQ, level, env->pending_interrupts, env->interrupt_request); | |
| 43 | + if (loglevel & CPU_LOG_INT) { | |
| 44 | + fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08x req %08x\n", | |
| 45 | + __func__, env, n_IRQ, level, | |
| 46 | + env->pending_interrupts, env->interrupt_request); | |
| 47 | + } | |
| 45 | 48 | #endif |
| 46 | 49 | } |
| 47 | 50 | |
| ... | ... | @@ -52,7 +55,10 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) |
| 52 | 55 | int cur_level; |
| 53 | 56 | |
| 54 | 57 | #if defined(PPC_DEBUG_IRQ) |
| 55 | - printf("%s: env %p pin %d level %d\n", __func__, env, pin, level); | |
| 58 | + if (loglevel & CPU_LOG_INT) { | |
| 59 | + fprintf(logfile, "%s: env %p pin %d level %d\n", __func__, | |
| 60 | + env, pin, level); | |
| 61 | + } | |
| 56 | 62 | #endif |
| 57 | 63 | cur_level = (env->irq_input_state >> pin) & 1; |
| 58 | 64 | /* Don't generate spurious events */ |
| ... | ... | @@ -61,14 +67,20 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) |
| 61 | 67 | case PPC6xx_INPUT_INT: |
| 62 | 68 | /* Level sensitive - active high */ |
| 63 | 69 | #if defined(PPC_DEBUG_IRQ) |
| 64 | - printf("%s: set the external IRQ state to %d\n", __func__, level); | |
| 70 | + if (loglevel & CPU_LOG_INT) { | |
| 71 | + fprintf(logfile, "%s: set the external IRQ state to %d\n", | |
| 72 | + __func__, level); | |
| 73 | + } | |
| 65 | 74 | #endif |
| 66 | 75 | ppc_set_irq(env, PPC_INTERRUPT_EXT, level); |
| 67 | 76 | break; |
| 68 | 77 | case PPC6xx_INPUT_SMI: |
| 69 | 78 | /* Level sensitive - active high */ |
| 70 | 79 | #if defined(PPC_DEBUG_IRQ) |
| 71 | - printf("%s: set the SMI IRQ state to %d\n", __func__, level); | |
| 80 | + if (loglevel & CPU_LOG_INT) { | |
| 81 | + fprintf(logfile, "%s: set the SMI IRQ state to %d\n", | |
| 82 | + __func__, level); | |
| 83 | + } | |
| 72 | 84 | #endif |
| 73 | 85 | ppc_set_irq(env, PPC_INTERRUPT_SMI, level); |
| 74 | 86 | break; |
| ... | ... | @@ -79,7 +91,10 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) |
| 79 | 91 | */ |
| 80 | 92 | if (cur_level == 1 && level == 0) { |
| 81 | 93 | #if defined(PPC_DEBUG_IRQ) |
| 82 | - printf("%s: raise machine check state\n", __func__); | |
| 94 | + if (loglevel & CPU_LOG_INT) { | |
| 95 | + fprintf(logfile, "%s: raise machine check state\n", | |
| 96 | + __func__); | |
| 97 | + } | |
| 83 | 98 | #endif |
| 84 | 99 | ppc_set_irq(env, PPC_INTERRUPT_MCK, 1); |
| 85 | 100 | } |
| ... | ... | @@ -89,12 +104,16 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) |
| 89 | 104 | /* XXX: TODO: relay the signal to CKSTP_OUT pin */ |
| 90 | 105 | if (level) { |
| 91 | 106 | #if defined(PPC_DEBUG_IRQ) |
| 92 | - printf("%s: stop the CPU\n", __func__); | |
| 107 | + if (loglevel & CPU_LOG_INT) { | |
| 108 | + fprintf(logfile, "%s: stop the CPU\n", __func__); | |
| 109 | + } | |
| 93 | 110 | #endif |
| 94 | 111 | env->halted = 1; |
| 95 | 112 | } else { |
| 96 | 113 | #if defined(PPC_DEBUG_IRQ) |
| 97 | - printf("%s: restart the CPU\n", __func__); | |
| 114 | + if (loglevel & CPU_LOG_INT) { | |
| 115 | + fprintf(logfile, "%s: restart the CPU\n", __func__); | |
| 116 | + } | |
| 98 | 117 | #endif |
| 99 | 118 | env->halted = 0; |
| 100 | 119 | } |
| ... | ... | @@ -104,7 +123,9 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) |
| 104 | 123 | if (level) { |
| 105 | 124 | #if 0 // XXX: TOFIX |
| 106 | 125 | #if defined(PPC_DEBUG_IRQ) |
| 107 | - printf("%s: reset the CPU\n", __func__); | |
| 126 | + if (loglevel & CPU_LOG_INT) { | |
| 127 | + fprintf(logfile, "%s: reset the CPU\n", __func__); | |
| 128 | + } | |
| 108 | 129 | #endif |
| 109 | 130 | cpu_reset(env); |
| 110 | 131 | #endif |
| ... | ... | @@ -112,14 +133,19 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level) |
| 112 | 133 | break; |
| 113 | 134 | case PPC6xx_INPUT_SRESET: |
| 114 | 135 | #if defined(PPC_DEBUG_IRQ) |
| 115 | - printf("%s: set the RESET IRQ state to %d\n", __func__, level); | |
| 136 | + if (loglevel & CPU_LOG_INT) { | |
| 137 | + fprintf(logfile, "%s: set the RESET IRQ state to %d\n", | |
| 138 | + __func__, level); | |
| 139 | + } | |
| 116 | 140 | #endif |
| 117 | 141 | ppc_set_irq(env, PPC_INTERRUPT_RESET, level); |
| 118 | 142 | break; |
| 119 | 143 | default: |
| 120 | 144 | /* Unknown pin - do nothing */ |
| 121 | 145 | #if defined(PPC_DEBUG_IRQ) |
| 122 | - printf("%s: unknown IRQ pin %d\n", __func__, pin); | |
| 146 | + if (loglevel & CPU_LOG_INT) { | |
| 147 | + fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin); | |
| 148 | + } | |
| 123 | 149 | #endif |
| 124 | 150 | return; |
| 125 | 151 | } |
| ... | ... | @@ -176,7 +202,10 @@ static void ppc405_set_irq (void *opaque, int pin, int level) |
| 176 | 202 | case PPC405_INPUT_INT: |
| 177 | 203 | /* Level sensitive - active high */ |
| 178 | 204 | #if defined(PPC_DEBUG_IRQ) |
| 179 | - printf("%s: set the external IRQ state to %d\n", __func__, level); | |
| 205 | + if (loglevel & CPU_LOG_INT) { | |
| 206 | + fprintf(logfile, "%s: set the external IRQ state to %d\n", | |
| 207 | + __func__, level); | |
| 208 | + } | |
| 180 | 209 | #endif |
| 181 | 210 | ppc_set_irq(env, PPC_INTERRUPT_EXT, level); |
| 182 | 211 | break; |
| ... | ... | @@ -184,12 +213,16 @@ static void ppc405_set_irq (void *opaque, int pin, int level) |
| 184 | 213 | /* Level sensitive - active low */ |
| 185 | 214 | if (level) { |
| 186 | 215 | #if defined(PPC_DEBUG_IRQ) |
| 187 | - printf("%s: stop the CPU\n", __func__); | |
| 216 | + if (loglevel & CPU_LOG_INT) { | |
| 217 | + fprintf(logfile, "%s: stop the CPU\n", __func__); | |
| 218 | + } | |
| 188 | 219 | #endif |
| 189 | 220 | env->halted = 1; |
| 190 | 221 | } else { |
| 191 | 222 | #if defined(PPC_DEBUG_IRQ) |
| 192 | - printf("%s: restart the CPU\n", __func__); | |
| 223 | + if (loglevel & CPU_LOG_INT) { | |
| 224 | + fprintf(logfile, "%s: restart the CPU\n", __func__); | |
| 225 | + } | |
| 193 | 226 | #endif |
| 194 | 227 | env->halted = 0; |
| 195 | 228 | } |
| ... | ... | @@ -197,14 +230,19 @@ static void ppc405_set_irq (void *opaque, int pin, int level) |
| 197 | 230 | case PPC405_INPUT_DEBUG: |
| 198 | 231 | /* Level sensitive - active high */ |
| 199 | 232 | #if defined(PPC_DEBUG_IRQ) |
| 200 | - printf("%s: set the external IRQ state to %d\n", __func__, level); | |
| 233 | + if (loglevel & CPU_LOG_INT) { | |
| 234 | + fprintf(logfile, "%s: set the external IRQ state to %d\n", | |
| 235 | + __func__, level); | |
| 236 | + } | |
| 201 | 237 | #endif |
| 202 | 238 | ppc_set_irq(env, EXCP_40x_DEBUG, level); |
| 203 | 239 | break; |
| 204 | 240 | default: |
| 205 | 241 | /* Unknown pin - do nothing */ |
| 206 | 242 | #if defined(PPC_DEBUG_IRQ) |
| 207 | - printf("%s: unknown IRQ pin %d\n", __func__, pin); | |
| 243 | + if (loglevel & CPU_LOG_INT) { | |
| 244 | + fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin); | |
| 245 | + } | |
| 208 | 246 | #endif |
| 209 | 247 | return; |
| 210 | 248 | } |
| ... | ... | @@ -217,7 +255,6 @@ static void ppc405_set_irq (void *opaque, int pin, int level) |
| 217 | 255 | |
| 218 | 256 | void ppc405_irq_init (CPUState *env) |
| 219 | 257 | { |
| 220 | - printf("%s\n", __func__); | |
| 221 | 258 | env->irq_inputs = (void **)qemu_allocate_irqs(&ppc405_set_irq, env, 7); |
| 222 | 259 | } |
| 223 | 260 | |
| ... | ... | @@ -255,8 +292,10 @@ uint32_t cpu_ppc_load_tbl (CPUState *env) |
| 255 | 292 | now = time(NULL); |
| 256 | 293 | if (last_time != now) { |
| 257 | 294 | last_time = now; |
| 258 | - printf("%s: tb=0x%016lx %d %08lx\n", | |
| 259 | - __func__, tb, now, tb_env->tb_offset); | |
| 295 | + if (loglevel) { | |
| 296 | + fprintf(logfile, "%s: tb=0x%016lx %d %08lx\n", | |
| 297 | + __func__, tb, now, tb_env->tb_offset); | |
| 298 | + } | |
| 260 | 299 | } |
| 261 | 300 | } |
| 262 | 301 | #endif |
| ... | ... | @@ -271,7 +310,9 @@ uint32_t cpu_ppc_load_tbu (CPUState *env) |
| 271 | 310 | |
| 272 | 311 | tb = cpu_ppc_get_tb(tb_env); |
| 273 | 312 | #ifdef DEBUG_TB |
| 274 | - printf("%s: tb=0x%016lx\n", __func__, tb); | |
| 313 | + if (loglevel) { | |
| 314 | + fprintf(logfile, "%s: tb=0x%016lx\n", __func__, tb); | |
| 315 | + } | |
| 275 | 316 | #endif |
| 276 | 317 | |
| 277 | 318 | return tb >> 32; |
| ... | ... | @@ -282,7 +323,9 @@ static void cpu_ppc_store_tb (ppc_tb_t *tb_env, uint64_t value) |
| 282 | 323 | tb_env->tb_offset = muldiv64(value, ticks_per_sec, tb_env->tb_freq) |
| 283 | 324 | - qemu_get_clock(vm_clock); |
| 284 | 325 | #ifdef DEBUG_TB |
| 285 | - printf("%s: tb=0x%016lx offset=%08x\n", __func__, value); | |
| 326 | + if (loglevel) { | |
| 327 | + fprintf(logfile, "%s: tb=0x%016lx offset=%08x\n", __func__, value); | |
| 328 | + } | |
| 286 | 329 | #endif |
| 287 | 330 | } |
| 288 | 331 | |
| ... | ... | @@ -314,7 +357,9 @@ uint32_t cpu_ppc_load_decr (CPUState *env) |
| 314 | 357 | else |
| 315 | 358 | decr = -muldiv64(-diff, tb_env->tb_freq, ticks_per_sec); |
| 316 | 359 | #if defined(DEBUG_TB) |
| 317 | - printf("%s: 0x%08x\n", __func__, decr); | |
| 360 | + if (loglevel) { | |
| 361 | + fprintf(logfile, "%s: 0x%08x\n", __func__, decr); | |
| 362 | + } | |
| 318 | 363 | #endif |
| 319 | 364 | |
| 320 | 365 | return decr; |
| ... | ... | @@ -327,7 +372,9 @@ static inline void cpu_ppc_decr_excp (CPUState *env) |
| 327 | 372 | { |
| 328 | 373 | /* Raise it */ |
| 329 | 374 | #ifdef DEBUG_TB |
| 330 | - printf("raise decrementer exception\n"); | |
| 375 | + if (loglevel) { | |
| 376 | + fprintf(logfile, "raise decrementer exception\n"); | |
| 377 | + } | |
| 331 | 378 | #endif |
| 332 | 379 | ppc_set_irq(env, PPC_INTERRUPT_DECR, 1); |
| 333 | 380 | } |
| ... | ... | @@ -339,7 +386,9 @@ static void _cpu_ppc_store_decr (CPUState *env, uint32_t decr, |
| 339 | 386 | uint64_t now, next; |
| 340 | 387 | |
| 341 | 388 | #ifdef DEBUG_TB |
| 342 | - printf("%s: 0x%08x => 0x%08x\n", __func__, decr, value); | |
| 389 | + if (loglevel) { | |
| 390 | + fprintf(logfile, "%s: 0x%08x => 0x%08x\n", __func__, decr, value); | |
| 391 | + } | |
| 343 | 392 | #endif |
| 344 | 393 | now = qemu_get_clock(vm_clock); |
| 345 | 394 | next = now + muldiv64(value, ticks_per_sec, tb_env->tb_freq); |
| ... | ... | @@ -578,17 +627,20 @@ void store_40x_pit (CPUState *env, target_ulong val) |
| 578 | 627 | |
| 579 | 628 | tb_env = env->tb_env; |
| 580 | 629 | ppcemb_timer = tb_env->opaque; |
| 581 | - if (loglevel) | |
| 630 | + if (loglevel) { | |
| 582 | 631 | fprintf(logfile, "%s %p %p\n", __func__, tb_env, ppcemb_timer); |
| 632 | + } | |
| 583 | 633 | ppcemb_timer->pit_reload = val; |
| 584 | 634 | if (val == 0) { |
| 585 | 635 | /* Stop PIT */ |
| 586 | - if (loglevel) | |
| 636 | + if (loglevel) { | |
| 587 | 637 | fprintf(logfile, "%s: stop PIT\n", __func__); |
| 638 | + } | |
| 588 | 639 | qemu_del_timer(tb_env->decr_timer); |
| 589 | 640 | } else { |
| 590 | - if (loglevel) | |
| 641 | + if (loglevel) { | |
| 591 | 642 | fprintf(logfile, "%s: start PIT 0x" ADDRX "\n", __func__, val); |
| 643 | + } | |
| 592 | 644 | now = qemu_get_clock(vm_clock); |
| 593 | 645 | next = now + muldiv64(val, ticks_per_sec, tb_env->tb_freq); |
| 594 | 646 | if (next == now) | ... | ... |
target-ppc/helper.c
| ... | ... | @@ -649,10 +649,10 @@ int mmu4xx_get_physical_address (CPUState *env, mmu_ctx_t *ctx, |
| 649 | 649 | } |
| 650 | 650 | mask = ~(tlb->size - 1); |
| 651 | 651 | if (loglevel) { |
| 652 | - fprintf(logfile, "%s: TLB %d address " ADDRX " PID " ADDRX " <=> " | |
| 653 | - ADDRX " " ADDRX " " ADDRX "\n", | |
| 654 | - __func__, i, address, env->spr[SPR_40x_PID], | |
| 655 | - tlb->EPN, mask, tlb->PID); | |
| 652 | + fprintf(logfile, "%s: TLB %d address " ADDRX " PID %d <=> " | |
| 653 | + ADDRX " " ADDRX " %d\n", | |
| 654 | + __func__, i, address, (int)env->spr[SPR_40x_PID], | |
| 655 | + tlb->EPN, mask, (int)tlb->PID); | |
| 656 | 656 | } |
| 657 | 657 | /* Check PID */ |
| 658 | 658 | if (tlb->PID != 0 && tlb->PID != env->spr[SPR_40x_PID]) |
| ... | ... | @@ -1450,9 +1450,6 @@ void do_interrupt (CPUState *env) |
| 1450 | 1450 | if (loglevel) { |
| 1451 | 1451 | fprintf(logfile, "DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX |
| 1452 | 1452 | "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]); |
| 1453 | - } else { | |
| 1454 | - printf("DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX "\n", | |
| 1455 | - env->spr[SPR_DSISR], env->spr[SPR_DAR]); | |
| 1456 | 1453 | } |
| 1457 | 1454 | #endif |
| 1458 | 1455 | goto store_next; |
| ... | ... | @@ -1495,7 +1492,9 @@ void do_interrupt (CPUState *env) |
| 1495 | 1492 | case EXCP_FP: |
| 1496 | 1493 | if (msr_fe0 == 0 && msr_fe1 == 0) { |
| 1497 | 1494 | #if defined (DEBUG_EXCEPTIONS) |
| 1498 | - printf("Ignore floating point exception\n"); | |
| 1495 | + if (loglevel) { | |
| 1496 | + fprintf(logfile, "Ignore floating point exception\n"); | |
| 1497 | + } | |
| 1499 | 1498 | #endif |
| 1500 | 1499 | return; |
| 1501 | 1500 | } |
| ... | ... | @@ -1508,7 +1507,12 @@ void do_interrupt (CPUState *env) |
| 1508 | 1507 | env->fpscr[7] |= 0x4; |
| 1509 | 1508 | break; |
| 1510 | 1509 | case EXCP_INVAL: |
| 1511 | - // printf("Invalid instruction at 0x" ADDRX "\n", env->nip); | |
| 1510 | +#if defined (DEBUG_EXCEPTIONS) | |
| 1511 | + if (loglevel) { | |
| 1512 | + fprintf(logfile, "Invalid instruction at 0x" ADDRX "\n", | |
| 1513 | + env->nip); | |
| 1514 | + } | |
| 1515 | +#endif | |
| 1512 | 1516 | msr |= 0x00080000; |
| 1513 | 1517 | break; |
| 1514 | 1518 | case EXCP_PRIV: |
| ... | ... | @@ -1609,8 +1613,10 @@ void do_interrupt (CPUState *env) |
| 1609 | 1613 | case PPC_FLAGS_EXCP_40x: |
| 1610 | 1614 | /* PIT on 4xx */ |
| 1611 | 1615 | msr &= ~0xFFFF0000; |
| 1616 | +#if defined (DEBUG_EXCEPTIONS) | |
| 1612 | 1617 | if (loglevel != 0) |
| 1613 | 1618 | fprintf(logfile, "PIT exception\n"); |
| 1619 | +#endif | |
| 1614 | 1620 | goto store_next; |
| 1615 | 1621 | case PPC_FLAGS_EXCP_602: |
| 1616 | 1622 | case PPC_FLAGS_EXCP_603: |
| ... | ... | @@ -1630,8 +1636,10 @@ void do_interrupt (CPUState *env) |
| 1630 | 1636 | case PPC_FLAGS_EXCP_40x: |
| 1631 | 1637 | /* FIT on 4xx */ |
| 1632 | 1638 | msr &= ~0xFFFF0000; |
| 1639 | +#if defined (DEBUG_EXCEPTIONS) | |
| 1633 | 1640 | if (loglevel != 0) |
| 1634 | 1641 | fprintf(logfile, "FIT exception\n"); |
| 1642 | +#endif | |
| 1635 | 1643 | goto store_next; |
| 1636 | 1644 | default: |
| 1637 | 1645 | cpu_abort(env, "Invalid exception 0x1010 !\n"); |
| ... | ... | @@ -1644,8 +1652,10 @@ void do_interrupt (CPUState *env) |
| 1644 | 1652 | case PPC_FLAGS_EXCP_40x: |
| 1645 | 1653 | /* Watchdog on 4xx */ |
| 1646 | 1654 | msr &= ~0xFFFF0000; |
| 1655 | +#if defined (DEBUG_EXCEPTIONS) | |
| 1647 | 1656 | if (loglevel != 0) |
| 1648 | 1657 | fprintf(logfile, "WDT exception\n"); |
| 1658 | +#endif | |
| 1649 | 1659 | goto store_next; |
| 1650 | 1660 | case PPC_FLAGS_EXCP_BOOKE: |
| 1651 | 1661 | srr_0 = &env->spr[SPR_BOOKE_CSRR0]; |
| ... | ... | @@ -1929,11 +1939,12 @@ void ppc_hw_interrupt (CPUPPCState *env) |
| 1929 | 1939 | { |
| 1930 | 1940 | int raised = 0; |
| 1931 | 1941 | |
| 1932 | -#if 0 | |
| 1933 | - printf("%s: %p pending %08x req %08x %08x me %d ee %d\n", | |
| 1934 | - __func__, env, env->pending_interrupts, | |
| 1935 | - env->interrupt_request, interrupt_request, | |
| 1936 | - msr_me, msr_ee); | |
| 1942 | +#if 1 | |
| 1943 | + if (loglevel & CPU_LOG_INT) { | |
| 1944 | + fprintf(logfile, "%s: %p pending %08x req %08x me %d ee %d\n", | |
| 1945 | + __func__, env, env->pending_interrupts, | |
| 1946 | + env->interrupt_request, msr_me, msr_ee); | |
| 1947 | + } | |
| 1937 | 1948 | #endif |
| 1938 | 1949 | /* Raise it */ |
| 1939 | 1950 | if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) { |
| ... | ... | @@ -2007,3 +2018,17 @@ void ppc_hw_interrupt (CPUPPCState *env) |
| 2007 | 2018 | } |
| 2008 | 2019 | } |
| 2009 | 2020 | #endif /* !CONFIG_USER_ONLY */ |
| 2021 | + | |
| 2022 | +void cpu_dump_EA (target_ulong EA) | |
| 2023 | +{ | |
| 2024 | + FILE *f; | |
| 2025 | + | |
| 2026 | + if (logfile) { | |
| 2027 | + f = logfile; | |
| 2028 | + } else { | |
| 2029 | + f = stdout; | |
| 2030 | + return; | |
| 2031 | + } | |
| 2032 | + fprintf(f, "Memory access at address " TARGET_FMT_lx "\n", EA); | |
| 2033 | +} | |
| 2034 | + | ... | ... |
target-ppc/op.c
| ... | ... | @@ -130,6 +130,13 @@ |
| 130 | 130 | #define REG 31 |
| 131 | 131 | #include "op_template.h" |
| 132 | 132 | |
| 133 | + | |
| 134 | +void OPPROTO op_print_mem_EA (void) | |
| 135 | +{ | |
| 136 | + do_print_mem_EA(T0); | |
| 137 | + RETURN(); | |
| 138 | +} | |
| 139 | + | |
| 133 | 140 | /* PowerPC state maintenance operations */ |
| 134 | 141 | /* set_Rc0 */ |
| 135 | 142 | PPC_OP(set_Rc0) |
| ... | ... | @@ -360,15 +367,33 @@ void OPPROTO op_store_msr_32 (void) |
| 360 | 367 | #endif |
| 361 | 368 | |
| 362 | 369 | /* SPR */ |
| 363 | -PPC_OP(load_spr) | |
| 370 | +void OPPROTO op_load_spr (void) | |
| 371 | +{ | |
| 372 | + T0 = env->spr[PARAM1]; | |
| 373 | + RETURN(); | |
| 374 | +} | |
| 375 | + | |
| 376 | +void OPPROTO op_store_spr (void) | |
| 377 | +{ | |
| 378 | + env->spr[PARAM1] = T0; | |
| 379 | + RETURN(); | |
| 380 | +} | |
| 381 | + | |
| 382 | +void OPPROTO op_load_dump_spr (void) | |
| 383 | +{ | |
| 384 | + T0 = ppc_load_dump_spr(PARAM1); | |
| 385 | + RETURN(); | |
| 386 | +} | |
| 387 | + | |
| 388 | +void OPPROTO op_store_dump_spr (void) | |
| 364 | 389 | { |
| 365 | - T0 = regs->spr[PARAM(1)]; | |
| 390 | + ppc_store_dump_spr(PARAM1, T0); | |
| 366 | 391 | RETURN(); |
| 367 | 392 | } |
| 368 | 393 | |
| 369 | -PPC_OP(store_spr) | |
| 394 | +void OPPROTO op_mask_spr (void) | |
| 370 | 395 | { |
| 371 | - regs->spr[PARAM(1)] = T0; | |
| 396 | + env->spr[PARAM1] &= ~T0; | |
| 372 | 397 | RETURN(); |
| 373 | 398 | } |
| 374 | 399 | ... | ... |
target-ppc/op_helper.c
| ... | ... | @@ -68,6 +68,12 @@ void do_raise_exception (uint32_t exception) |
| 68 | 68 | do_raise_exception_err(exception, 0); |
| 69 | 69 | } |
| 70 | 70 | |
| 71 | +void cpu_dump_EA (target_ulong EA); | |
| 72 | +void do_print_mem_EA (target_ulong EA) | |
| 73 | +{ | |
| 74 | + cpu_dump_EA(EA); | |
| 75 | +} | |
| 76 | + | |
| 71 | 77 | /*****************************************************************************/ |
| 72 | 78 | /* Registers load and stores */ |
| 73 | 79 | void do_load_cr (void) |
| ... | ... | @@ -181,6 +187,25 @@ void do_store_fpscr (uint32_t mask) |
| 181 | 187 | set_float_rounding_mode(rnd_type, &env->fp_status); |
| 182 | 188 | } |
| 183 | 189 | |
| 190 | +target_ulong ppc_load_dump_spr (int sprn) | |
| 191 | +{ | |
| 192 | + if (loglevel) { | |
| 193 | + fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", | |
| 194 | + sprn, sprn, env->spr[sprn]); | |
| 195 | + } | |
| 196 | + | |
| 197 | + return env->spr[sprn]; | |
| 198 | +} | |
| 199 | + | |
| 200 | +void ppc_store_dump_spr (int sprn, target_ulong val) | |
| 201 | +{ | |
| 202 | + if (loglevel) { | |
| 203 | + fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n", | |
| 204 | + sprn, sprn, env->spr[sprn], val); | |
| 205 | + } | |
| 206 | + env->spr[sprn] = val; | |
| 207 | +} | |
| 208 | + | |
| 184 | 209 | /*****************************************************************************/ |
| 185 | 210 | /* Fixed point operations helpers */ |
| 186 | 211 | #if defined(TARGET_PPC64) |
| ... | ... | @@ -1250,10 +1275,14 @@ void do_load_dcr (void) |
| 1250 | 1275 | target_ulong val; |
| 1251 | 1276 | |
| 1252 | 1277 | if (unlikely(env->dcr_env == NULL)) { |
| 1253 | - printf("No DCR environment\n"); | |
| 1278 | + if (loglevel) { | |
| 1279 | + fprintf(logfile, "No DCR environment\n"); | |
| 1280 | + } | |
| 1254 | 1281 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
| 1255 | 1282 | } else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) { |
| 1256 | - printf("DCR read error\n"); | |
| 1283 | + if (loglevel) { | |
| 1284 | + fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0); | |
| 1285 | + } | |
| 1257 | 1286 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
| 1258 | 1287 | } else { |
| 1259 | 1288 | T0 = val; |
| ... | ... | @@ -1263,10 +1292,14 @@ void do_load_dcr (void) |
| 1263 | 1292 | void do_store_dcr (void) |
| 1264 | 1293 | { |
| 1265 | 1294 | if (unlikely(env->dcr_env == NULL)) { |
| 1266 | - printf("No DCR environment\n"); | |
| 1295 | + if (loglevel) { | |
| 1296 | + fprintf(logfile, "No DCR environment\n"); | |
| 1297 | + } | |
| 1267 | 1298 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
| 1268 | 1299 | } else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) { |
| 1269 | - printf("DCR write error\n"); | |
| 1300 | + if (loglevel) { | |
| 1301 | + fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0); | |
| 1302 | + } | |
| 1270 | 1303 | do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
| 1271 | 1304 | } |
| 1272 | 1305 | } | ... | ... |
target-ppc/op_helper.h
| ... | ... | @@ -50,6 +50,8 @@ void glue(do_icbi_64, MEMSUFFIX) (void); |
| 50 | 50 | |
| 51 | 51 | #else |
| 52 | 52 | |
| 53 | +void do_print_mem_EA (target_ulong EA); | |
| 54 | + | |
| 53 | 55 | /* Registers load and stores */ |
| 54 | 56 | void do_load_cr (void); |
| 55 | 57 | void do_store_cr (uint32_t mask); |
| ... | ... | @@ -57,6 +59,8 @@ void do_load_xer (void); |
| 57 | 59 | void do_store_xer (void); |
| 58 | 60 | void do_load_fpscr (void); |
| 59 | 61 | void do_store_fpscr (uint32_t mask); |
| 62 | +target_ulong ppc_load_dump_spr (int sprn); | |
| 63 | +void ppc_store_dump_spr (int sprn, target_ulong val); | |
| 60 | 64 | |
| 61 | 65 | /* Integer arithmetic helpers */ |
| 62 | 66 | void do_adde (void); | ... | ... |
target-ppc/translate.c
| ... | ... | @@ -29,6 +29,7 @@ |
| 29 | 29 | |
| 30 | 30 | //#define DO_SINGLE_STEP |
| 31 | 31 | //#define PPC_DEBUG_DISAS |
| 32 | +//#define DEBUG_MEMORY_ACCESSES | |
| 32 | 33 | //#define DO_PPC_STATISTICS |
| 33 | 34 | |
| 34 | 35 | #if defined(USE_DIRECT_JUMP) |
| ... | ... | @@ -1745,6 +1746,9 @@ static inline void gen_addr_imm_index (DisasContext *ctx, int maskl) |
| 1745 | 1746 | if (likely(simm != 0)) |
| 1746 | 1747 | gen_op_addi(simm); |
| 1747 | 1748 | } |
| 1749 | +#ifdef DEBUG_MEMORY_ACCESSES | |
| 1750 | + gen_op_print_mem_EA(); | |
| 1751 | +#endif | |
| 1748 | 1752 | } |
| 1749 | 1753 | |
| 1750 | 1754 | static inline void gen_addr_reg_index (DisasContext *ctx) |
| ... | ... | @@ -1756,6 +1760,9 @@ static inline void gen_addr_reg_index (DisasContext *ctx) |
| 1756 | 1760 | gen_op_load_gpr_T1(rB(ctx->opcode)); |
| 1757 | 1761 | gen_op_add(); |
| 1758 | 1762 | } |
| 1763 | +#ifdef DEBUG_MEMORY_ACCESSES | |
| 1764 | + gen_op_print_mem_EA(); | |
| 1765 | +#endif | |
| 1759 | 1766 | } |
| 1760 | 1767 | |
| 1761 | 1768 | static inline void gen_addr_register (DisasContext *ctx) |
| ... | ... | @@ -1765,6 +1772,9 @@ static inline void gen_addr_register (DisasContext *ctx) |
| 1765 | 1772 | } else { |
| 1766 | 1773 | gen_op_load_gpr_T0(rA(ctx->opcode)); |
| 1767 | 1774 | } |
| 1775 | +#ifdef DEBUG_MEMORY_ACCESSES | |
| 1776 | + gen_op_print_mem_EA(); | |
| 1777 | +#endif | |
| 1768 | 1778 | } |
| 1769 | 1779 | |
| 1770 | 1780 | /*** Integer load ***/ | ... | ... |
target-ppc/translate_init.c
| ... | ... | @@ -25,6 +25,7 @@ |
| 25 | 25 | |
| 26 | 26 | //#define PPC_DUMP_CPU |
| 27 | 27 | //#define PPC_DEBUG_SPR |
| 28 | +//#define PPC_DEBUG_IRQ | |
| 28 | 29 | |
| 29 | 30 | struct ppc_def_t { |
| 30 | 31 | const unsigned char *name; |
| ... | ... | @@ -61,6 +62,23 @@ static void spr_write_generic (void *opaque, int sprn) |
| 61 | 62 | gen_op_store_spr(sprn); |
| 62 | 63 | } |
| 63 | 64 | |
| 65 | +static void spr_read_dump (void *opaque, int sprn) | |
| 66 | +{ | |
| 67 | + gen_op_load_dump_spr(sprn); | |
| 68 | +} | |
| 69 | + | |
| 70 | +static void spr_write_dump (void *opaque, int sprn) | |
| 71 | +{ | |
| 72 | + gen_op_store_dump_spr(sprn); | |
| 73 | +} | |
| 74 | + | |
| 75 | +#if !defined(CONFIG_USER_ONLY) | |
| 76 | +static void spr_write_clear (void *opaque, int sprn) | |
| 77 | +{ | |
| 78 | + gen_op_mask_spr(sprn); | |
| 79 | +} | |
| 80 | +#endif | |
| 81 | + | |
| 64 | 82 | /* SPR common to all PowerPC */ |
| 65 | 83 | /* XER */ |
| 66 | 84 | static void spr_read_xer (void *opaque, int sprn) | ... | ... |