gwj / at91sam9263 · Commits

Commit a1f6684d6576df57175c18bfe3fbf23cb61922ab

Authored by aurel32
1 parent 651721b2

target-mips: optimize mflo and mfhi 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6794 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 12 additions and 13 deletions
target-mips/translate.c
  View file @a1f6684
@@ -1772,42 +1772,41 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc, @@ -1772,42 +1772,41 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
1772 static void gen_HILO (DisasContext *ctx, uint32_t opc, int reg) 1772 static void gen_HILO (DisasContext *ctx, uint32_t opc, int reg)
1773 { 1773 {
1774 const char *opn = "hilo"; 1774 const char *opn = "hilo";
1775 - TCGv t0 = tcg_temp_local_new();  
1776 1775
1777 if (reg == 0 && (opc == OPC_MFHI || opc == OPC_MFLO)) { 1776 if (reg == 0 && (opc == OPC_MFHI || opc == OPC_MFLO)) {
1778 /* Treat as NOP. */ 1777 /* Treat as NOP. */
1779 MIPS_DEBUG("NOP"); 1778 MIPS_DEBUG("NOP");
1780 - goto out; 1779 + return;
1781 } 1780 }
1782 switch (opc) { 1781 switch (opc) {
1783 case OPC_MFHI: 1782 case OPC_MFHI:
1784 - tcg_gen_mov_tl(t0, cpu_HI[0]);  
1785 - gen_store_gpr(t0, reg); 1783 + tcg_gen_mov_tl(cpu_gpr[reg], cpu_HI[0]);
1786 opn = "mfhi"; 1784 opn = "mfhi";
1787 break; 1785 break;
1788 case OPC_MFLO: 1786 case OPC_MFLO:
1789 - tcg_gen_mov_tl(t0, cpu_LO[0]);  
1790 - gen_store_gpr(t0, reg); 1787 + tcg_gen_mov_tl(cpu_gpr[reg], cpu_LO[0]);
1791 opn = "mflo"; 1788 opn = "mflo";
1792 break; 1789 break;
1793 case OPC_MTHI: 1790 case OPC_MTHI:
1794 - gen_load_gpr(t0, reg);  
1795 - tcg_gen_mov_tl(cpu_HI[0], t0); 1791 + if (reg != 0)
  1792 + tcg_gen_mov_tl(cpu_HI[0], cpu_gpr[reg]);
  1793 + else
  1794 + tcg_gen_movi_tl(cpu_HI[0], 0);
1796 opn = "mthi"; 1795 opn = "mthi";
1797 break; 1796 break;
1798 case OPC_MTLO: 1797 case OPC_MTLO:
1799 - gen_load_gpr(t0, reg);  
1800 - tcg_gen_mov_tl(cpu_LO[0], t0); 1798 + if (reg != 0)
  1799 + tcg_gen_mov_tl(cpu_LO[0], cpu_gpr[reg]);
  1800 + else
  1801 + tcg_gen_movi_tl(cpu_LO[0], 0);
1801 opn = "mtlo"; 1802 opn = "mtlo";
1802 break; 1803 break;
1803 default: 1804 default:
1804 MIPS_INVAL(opn); 1805 MIPS_INVAL(opn);
1805 generate_exception(ctx, EXCP_RI); 1806 generate_exception(ctx, EXCP_RI);
1806 - goto out; 1807 + return;
1807 } 1808 }
1808 MIPS_DEBUG("%s %s", opn, regnames[reg]); 1809 MIPS_DEBUG("%s %s", opn, regnames[reg]);
1809 - out:  
1810 - tcg_temp_free(t0);  
1811 } 1810 }
1812 1811
1813 static void gen_muldiv (DisasContext *ctx, uint32_t opc, 1812 static void gen_muldiv (DisasContext *ctx, uint32_t opc,