Commit 95d1f3edd5ecebcf8d1b8efe1a0b4533e3629e39
1 parent
a496775f
Parallel flash bugfixes:
- always need to register flash area back to IO_MEM_ROMD at reset time - disabled buffered write as it's not actually supported - don't check flash time at registration time git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2678 c046a42c-6fe2-441c-8c8c-71466251a162
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19 additions
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12 deletions
hw/pflash_cfi02.c
@@ -208,19 +208,23 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, | @@ -208,19 +208,23 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, | ||
208 | 208 | ||
209 | /* WARNING: when the memory area is in ROMD mode, the offset is a | 209 | /* WARNING: when the memory area is in ROMD mode, the offset is a |
210 | ram offset, not a physical address */ | 210 | ram offset, not a physical address */ |
211 | + cmd = value; | ||
212 | + if (pfl->cmd != 0xA0 && cmd == 0xF0) { | ||
213 | +#if 0 | ||
214 | + DPRINTF("%s: flash reset asked (%02x %02x)\n", | ||
215 | + __func__, pfl->cmd, cmd); | ||
216 | +#endif | ||
217 | + goto reset_flash; | ||
218 | + } | ||
219 | + DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d %d\n", __func__, | ||
220 | + offset, value, width, pfl->wcycle); | ||
211 | if (pfl->wcycle == 0) | 221 | if (pfl->wcycle == 0) |
212 | offset -= (target_ulong)(long)pfl->storage; | 222 | offset -= (target_ulong)(long)pfl->storage; |
213 | else | 223 | else |
214 | offset -= pfl->base; | 224 | offset -= pfl->base; |
215 | 225 | ||
216 | - cmd = value; | ||
217 | DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d\n", __func__, | 226 | DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d\n", __func__, |
218 | offset, value, width); | 227 | offset, value, width); |
219 | - if (pfl->cmd != 0xA0 && cmd == 0xF0) { | ||
220 | - DPRINTF("%s: flash reset asked (%02x %02x)\n", | ||
221 | - __func__, pfl->cmd, cmd); | ||
222 | - goto reset_flash; | ||
223 | - } | ||
224 | /* Set the device in I/O access mode */ | 228 | /* Set the device in I/O access mode */ |
225 | cpu_register_physical_memory(pfl->base, pfl->total_len, pfl->fl_mem); | 229 | cpu_register_physical_memory(pfl->base, pfl->total_len, pfl->fl_mem); |
226 | boff = offset & (pfl->sector_len - 1); | 230 | boff = offset & (pfl->sector_len - 1); |
@@ -416,10 +420,8 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, | @@ -416,10 +420,8 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, | ||
416 | 420 | ||
417 | /* Reset flash */ | 421 | /* Reset flash */ |
418 | reset_flash: | 422 | reset_flash: |
419 | - if (pfl->wcycle != 0) { | ||
420 | - cpu_register_physical_memory(pfl->base, pfl->total_len, | ||
421 | - pfl->off | IO_MEM_ROMD | pfl->fl_mem); | ||
422 | - } | 423 | + cpu_register_physical_memory(pfl->base, pfl->total_len, |
424 | + pfl->off | IO_MEM_ROMD | pfl->fl_mem); | ||
423 | pfl->bypass = 0; | 425 | pfl->bypass = 0; |
424 | pfl->wcycle = 0; | 426 | pfl->wcycle = 0; |
425 | pfl->cmd = 0; | 427 | pfl->cmd = 0; |
@@ -530,14 +532,17 @@ pflash_t *pflash_register (target_ulong base, ram_addr_t off, | @@ -530,14 +532,17 @@ pflash_t *pflash_register (target_ulong base, ram_addr_t off, | ||
530 | 532 | ||
531 | total_len = sector_len * nb_blocs; | 533 | total_len = sector_len * nb_blocs; |
532 | /* XXX: to be fixed */ | 534 | /* XXX: to be fixed */ |
535 | +#if 0 | ||
533 | if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) && | 536 | if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) && |
534 | total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024)) | 537 | total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024)) |
535 | return NULL; | 538 | return NULL; |
539 | +#endif | ||
536 | pfl = qemu_mallocz(sizeof(pflash_t)); | 540 | pfl = qemu_mallocz(sizeof(pflash_t)); |
537 | if (pfl == NULL) | 541 | if (pfl == NULL) |
538 | return NULL; | 542 | return NULL; |
539 | pfl->storage = phys_ram_base + off; | 543 | pfl->storage = phys_ram_base + off; |
540 | - pfl->fl_mem = cpu_register_io_memory(0, pflash_read_ops, pflash_write_ops, pfl); | 544 | + pfl->fl_mem = cpu_register_io_memory(0, pflash_read_ops, pflash_write_ops, |
545 | + pfl); | ||
541 | pfl->off = off; | 546 | pfl->off = off; |
542 | cpu_register_physical_memory(base, total_len, | 547 | cpu_register_physical_memory(base, total_len, |
543 | off | pfl->fl_mem | IO_MEM_ROMD); | 548 | off | pfl->fl_mem | IO_MEM_ROMD); |
@@ -613,7 +618,9 @@ pflash_t *pflash_register (target_ulong base, ram_addr_t off, | @@ -613,7 +618,9 @@ pflash_t *pflash_register (target_ulong base, ram_addr_t off, | ||
613 | pfl->cfi_table[0x28] = 0x02; | 618 | pfl->cfi_table[0x28] = 0x02; |
614 | pfl->cfi_table[0x29] = 0x00; | 619 | pfl->cfi_table[0x29] = 0x00; |
615 | /* Max number of bytes in multi-bytes write */ | 620 | /* Max number of bytes in multi-bytes write */ |
616 | - pfl->cfi_table[0x2A] = 0x05; | 621 | + /* XXX: disable buffered write as it's not supported */ |
622 | + // pfl->cfi_table[0x2A] = 0x05; | ||
623 | + pfl->cfi_table[0x2A] = 0x00; | ||
617 | pfl->cfi_table[0x2B] = 0x00; | 624 | pfl->cfi_table[0x2B] = 0x00; |
618 | /* Number of erase block regions (uniform) */ | 625 | /* Number of erase block regions (uniform) */ |
619 | pfl->cfi_table[0x2C] = 0x01; | 626 | pfl->cfi_table[0x2C] = 0x01; |