Commit 92e90443046963309bbe24f306792501f95b938f
1 parent
3a55fa47
target-mips: don't mix result and arguments in gen_op_*
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6935 c046a42c-6fe2-441c-8c8c-71466251a162
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54 additions
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54 deletions
target-mips/translate.c
| @@ -688,18 +688,18 @@ FOP_CONDS(abs, ps, 64) | @@ -688,18 +688,18 @@ FOP_CONDS(abs, ps, 64) | ||
| 688 | #undef FOP_CONDS | 688 | #undef FOP_CONDS |
| 689 | 689 | ||
| 690 | /* Tests */ | 690 | /* Tests */ |
| 691 | -#define OP_COND(name, cond) \ | ||
| 692 | -static inline void glue(gen_op_, name) (TCGv t0, TCGv t1) \ | ||
| 693 | -{ \ | ||
| 694 | - int l1 = gen_new_label(); \ | ||
| 695 | - int l2 = gen_new_label(); \ | ||
| 696 | - \ | ||
| 697 | - tcg_gen_brcond_tl(cond, t0, t1, l1); \ | ||
| 698 | - tcg_gen_movi_tl(t0, 0); \ | ||
| 699 | - tcg_gen_br(l2); \ | ||
| 700 | - gen_set_label(l1); \ | ||
| 701 | - tcg_gen_movi_tl(t0, 1); \ | ||
| 702 | - gen_set_label(l2); \ | 691 | +#define OP_COND(name, cond) \ |
| 692 | +static inline void glue(gen_op_, name) (TCGv ret, TCGv t0, TCGv t1) \ | ||
| 693 | +{ \ | ||
| 694 | + int l1 = gen_new_label(); \ | ||
| 695 | + int l2 = gen_new_label(); \ | ||
| 696 | + \ | ||
| 697 | + tcg_gen_brcond_tl(cond, t0, t1, l1); \ | ||
| 698 | + tcg_gen_movi_tl(ret, 0); \ | ||
| 699 | + tcg_gen_br(l2); \ | ||
| 700 | + gen_set_label(l1); \ | ||
| 701 | + tcg_gen_movi_tl(ret, 1); \ | ||
| 702 | + gen_set_label(l2); \ | ||
| 703 | } | 703 | } |
| 704 | OP_COND(eq, TCG_COND_EQ); | 704 | OP_COND(eq, TCG_COND_EQ); |
| 705 | OP_COND(ne, TCG_COND_NE); | 705 | OP_COND(ne, TCG_COND_NE); |
| @@ -709,34 +709,34 @@ OP_COND(lt, TCG_COND_LT); | @@ -709,34 +709,34 @@ OP_COND(lt, TCG_COND_LT); | ||
| 709 | OP_COND(ltu, TCG_COND_LTU); | 709 | OP_COND(ltu, TCG_COND_LTU); |
| 710 | #undef OP_COND | 710 | #undef OP_COND |
| 711 | 711 | ||
| 712 | -#define OP_CONDI(name, cond) \ | ||
| 713 | -static inline void glue(gen_op_, name) (TCGv t, target_ulong val) \ | ||
| 714 | -{ \ | ||
| 715 | - int l1 = gen_new_label(); \ | ||
| 716 | - int l2 = gen_new_label(); \ | ||
| 717 | - \ | ||
| 718 | - tcg_gen_brcondi_tl(cond, t, val, l1); \ | ||
| 719 | - tcg_gen_movi_tl(t, 0); \ | ||
| 720 | - tcg_gen_br(l2); \ | ||
| 721 | - gen_set_label(l1); \ | ||
| 722 | - tcg_gen_movi_tl(t, 1); \ | ||
| 723 | - gen_set_label(l2); \ | 712 | +#define OP_CONDI(name, cond) \ |
| 713 | +static inline void glue(gen_op_, name) (TCGv ret, TCGv t0, target_ulong val) \ | ||
| 714 | +{ \ | ||
| 715 | + int l1 = gen_new_label(); \ | ||
| 716 | + int l2 = gen_new_label(); \ | ||
| 717 | + \ | ||
| 718 | + tcg_gen_brcondi_tl(cond, t0, val, l1); \ | ||
| 719 | + tcg_gen_movi_tl(ret, 0); \ | ||
| 720 | + tcg_gen_br(l2); \ | ||
| 721 | + gen_set_label(l1); \ | ||
| 722 | + tcg_gen_movi_tl(ret, 1); \ | ||
| 723 | + gen_set_label(l2); \ | ||
| 724 | } | 724 | } |
| 725 | OP_CONDI(lti, TCG_COND_LT); | 725 | OP_CONDI(lti, TCG_COND_LT); |
| 726 | OP_CONDI(ltiu, TCG_COND_LTU); | 726 | OP_CONDI(ltiu, TCG_COND_LTU); |
| 727 | #undef OP_CONDI | 727 | #undef OP_CONDI |
| 728 | 728 | ||
| 729 | #define OP_CONDZ(name, cond) \ | 729 | #define OP_CONDZ(name, cond) \ |
| 730 | -static inline void glue(gen_op_, name) (TCGv t) \ | 730 | +static inline void glue(gen_op_, name) (TCGv ret, TCGv t0) \ |
| 731 | { \ | 731 | { \ |
| 732 | int l1 = gen_new_label(); \ | 732 | int l1 = gen_new_label(); \ |
| 733 | int l2 = gen_new_label(); \ | 733 | int l2 = gen_new_label(); \ |
| 734 | \ | 734 | \ |
| 735 | - tcg_gen_brcondi_tl(cond, t, 0, l1); \ | ||
| 736 | - tcg_gen_movi_tl(t, 0); \ | 735 | + tcg_gen_brcondi_tl(cond, t0, 0, l1); \ |
| 736 | + tcg_gen_movi_tl(ret, 0); \ | ||
| 737 | tcg_gen_br(l2); \ | 737 | tcg_gen_br(l2); \ |
| 738 | gen_set_label(l1); \ | 738 | gen_set_label(l1); \ |
| 739 | - tcg_gen_movi_tl(t, 1); \ | 739 | + tcg_gen_movi_tl(ret, 1); \ |
| 740 | gen_set_label(l2); \ | 740 | gen_set_label(l2); \ |
| 741 | } | 741 | } |
| 742 | OP_CONDZ(gez, TCG_COND_GE); | 742 | OP_CONDZ(gez, TCG_COND_GE); |
| @@ -1309,11 +1309,11 @@ static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc, | @@ -1309,11 +1309,11 @@ static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc, | ||
| 1309 | break; | 1309 | break; |
| 1310 | #endif | 1310 | #endif |
| 1311 | case OPC_SLTI: | 1311 | case OPC_SLTI: |
| 1312 | - gen_op_lti(t0, uimm); | 1312 | + gen_op_lti(t0, t0, uimm); |
| 1313 | opn = "slti"; | 1313 | opn = "slti"; |
| 1314 | break; | 1314 | break; |
| 1315 | case OPC_SLTIU: | 1315 | case OPC_SLTIU: |
| 1316 | - gen_op_ltiu(t0, uimm); | 1316 | + gen_op_ltiu(t0, t0, uimm); |
| 1317 | opn = "sltiu"; | 1317 | opn = "sltiu"; |
| 1318 | break; | 1318 | break; |
| 1319 | case OPC_ANDI: | 1319 | case OPC_ANDI: |
| @@ -1596,11 +1596,11 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc, | @@ -1596,11 +1596,11 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc, | ||
| 1596 | break; | 1596 | break; |
| 1597 | #endif | 1597 | #endif |
| 1598 | case OPC_SLT: | 1598 | case OPC_SLT: |
| 1599 | - gen_op_lt(t0, t1); | 1599 | + gen_op_lt(t0, t0, t1); |
| 1600 | opn = "slt"; | 1600 | opn = "slt"; |
| 1601 | break; | 1601 | break; |
| 1602 | case OPC_SLTU: | 1602 | case OPC_SLTU: |
| 1603 | - gen_op_ltu(t0, t1); | 1603 | + gen_op_ltu(t0, t0, t1); |
| 1604 | opn = "sltu"; | 1604 | opn = "sltu"; |
| 1605 | break; | 1605 | break; |
| 1606 | case OPC_AND: | 1606 | case OPC_AND: |
| @@ -2227,27 +2227,27 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, | @@ -2227,27 +2227,27 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, | ||
| 2227 | switch (opc) { | 2227 | switch (opc) { |
| 2228 | case OPC_TEQ: | 2228 | case OPC_TEQ: |
| 2229 | case OPC_TEQI: | 2229 | case OPC_TEQI: |
| 2230 | - gen_op_eq(t0, t1); | 2230 | + gen_op_eq(t0, t0, t1); |
| 2231 | break; | 2231 | break; |
| 2232 | case OPC_TGE: | 2232 | case OPC_TGE: |
| 2233 | case OPC_TGEI: | 2233 | case OPC_TGEI: |
| 2234 | - gen_op_ge(t0, t1); | 2234 | + gen_op_ge(t0, t0, t1); |
| 2235 | break; | 2235 | break; |
| 2236 | case OPC_TGEU: | 2236 | case OPC_TGEU: |
| 2237 | case OPC_TGEIU: | 2237 | case OPC_TGEIU: |
| 2238 | - gen_op_geu(t0, t1); | 2238 | + gen_op_geu(t0, t0, t1); |
| 2239 | break; | 2239 | break; |
| 2240 | case OPC_TLT: | 2240 | case OPC_TLT: |
| 2241 | case OPC_TLTI: | 2241 | case OPC_TLTI: |
| 2242 | - gen_op_lt(t0, t1); | 2242 | + gen_op_lt(t0, t0, t1); |
| 2243 | break; | 2243 | break; |
| 2244 | case OPC_TLTU: | 2244 | case OPC_TLTU: |
| 2245 | case OPC_TLTIU: | 2245 | case OPC_TLTIU: |
| 2246 | - gen_op_ltu(t0, t1); | 2246 | + gen_op_ltu(t0, t0, t1); |
| 2247 | break; | 2247 | break; |
| 2248 | case OPC_TNE: | 2248 | case OPC_TNE: |
| 2249 | case OPC_TNEI: | 2249 | case OPC_TNEI: |
| 2250 | - gen_op_ne(t0, t1); | 2250 | + gen_op_ne(t0, t0, t1); |
| 2251 | break; | 2251 | break; |
| 2252 | default: | 2252 | default: |
| 2253 | MIPS_INVAL("trap"); | 2253 | MIPS_INVAL("trap"); |
| @@ -2427,69 +2427,69 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc, | @@ -2427,69 +2427,69 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc, | ||
| 2427 | } else { | 2427 | } else { |
| 2428 | switch (opc) { | 2428 | switch (opc) { |
| 2429 | case OPC_BEQ: | 2429 | case OPC_BEQ: |
| 2430 | - gen_op_eq(t0, t1); | 2430 | + gen_op_eq(t0, t0, t1); |
| 2431 | MIPS_DEBUG("beq %s, %s, " TARGET_FMT_lx, | 2431 | MIPS_DEBUG("beq %s, %s, " TARGET_FMT_lx, |
| 2432 | regnames[rs], regnames[rt], btgt); | 2432 | regnames[rs], regnames[rt], btgt); |
| 2433 | goto not_likely; | 2433 | goto not_likely; |
| 2434 | case OPC_BEQL: | 2434 | case OPC_BEQL: |
| 2435 | - gen_op_eq(t0, t1); | 2435 | + gen_op_eq(t0, t0, t1); |
| 2436 | MIPS_DEBUG("beql %s, %s, " TARGET_FMT_lx, | 2436 | MIPS_DEBUG("beql %s, %s, " TARGET_FMT_lx, |
| 2437 | regnames[rs], regnames[rt], btgt); | 2437 | regnames[rs], regnames[rt], btgt); |
| 2438 | goto likely; | 2438 | goto likely; |
| 2439 | case OPC_BNE: | 2439 | case OPC_BNE: |
| 2440 | - gen_op_ne(t0, t1); | 2440 | + gen_op_ne(t0, t0, t1); |
| 2441 | MIPS_DEBUG("bne %s, %s, " TARGET_FMT_lx, | 2441 | MIPS_DEBUG("bne %s, %s, " TARGET_FMT_lx, |
| 2442 | regnames[rs], regnames[rt], btgt); | 2442 | regnames[rs], regnames[rt], btgt); |
| 2443 | goto not_likely; | 2443 | goto not_likely; |
| 2444 | case OPC_BNEL: | 2444 | case OPC_BNEL: |
| 2445 | - gen_op_ne(t0, t1); | 2445 | + gen_op_ne(t0, t0, t1); |
| 2446 | MIPS_DEBUG("bnel %s, %s, " TARGET_FMT_lx, | 2446 | MIPS_DEBUG("bnel %s, %s, " TARGET_FMT_lx, |
| 2447 | regnames[rs], regnames[rt], btgt); | 2447 | regnames[rs], regnames[rt], btgt); |
| 2448 | goto likely; | 2448 | goto likely; |
| 2449 | case OPC_BGEZ: | 2449 | case OPC_BGEZ: |
| 2450 | - gen_op_gez(t0); | 2450 | + gen_op_gez(t0, t0); |
| 2451 | MIPS_DEBUG("bgez %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2451 | MIPS_DEBUG("bgez %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2452 | goto not_likely; | 2452 | goto not_likely; |
| 2453 | case OPC_BGEZL: | 2453 | case OPC_BGEZL: |
| 2454 | - gen_op_gez(t0); | 2454 | + gen_op_gez(t0, t0); |
| 2455 | MIPS_DEBUG("bgezl %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2455 | MIPS_DEBUG("bgezl %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2456 | goto likely; | 2456 | goto likely; |
| 2457 | case OPC_BGEZAL: | 2457 | case OPC_BGEZAL: |
| 2458 | - gen_op_gez(t0); | 2458 | + gen_op_gez(t0, t0); |
| 2459 | MIPS_DEBUG("bgezal %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2459 | MIPS_DEBUG("bgezal %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2460 | blink = 31; | 2460 | blink = 31; |
| 2461 | goto not_likely; | 2461 | goto not_likely; |
| 2462 | case OPC_BGEZALL: | 2462 | case OPC_BGEZALL: |
| 2463 | - gen_op_gez(t0); | 2463 | + gen_op_gez(t0, t0); |
| 2464 | blink = 31; | 2464 | blink = 31; |
| 2465 | MIPS_DEBUG("bgezall %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2465 | MIPS_DEBUG("bgezall %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2466 | goto likely; | 2466 | goto likely; |
| 2467 | case OPC_BGTZ: | 2467 | case OPC_BGTZ: |
| 2468 | - gen_op_gtz(t0); | 2468 | + gen_op_gtz(t0, t0); |
| 2469 | MIPS_DEBUG("bgtz %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2469 | MIPS_DEBUG("bgtz %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2470 | goto not_likely; | 2470 | goto not_likely; |
| 2471 | case OPC_BGTZL: | 2471 | case OPC_BGTZL: |
| 2472 | - gen_op_gtz(t0); | 2472 | + gen_op_gtz(t0, t0); |
| 2473 | MIPS_DEBUG("bgtzl %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2473 | MIPS_DEBUG("bgtzl %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2474 | goto likely; | 2474 | goto likely; |
| 2475 | case OPC_BLEZ: | 2475 | case OPC_BLEZ: |
| 2476 | - gen_op_lez(t0); | 2476 | + gen_op_lez(t0, t0); |
| 2477 | MIPS_DEBUG("blez %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2477 | MIPS_DEBUG("blez %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2478 | goto not_likely; | 2478 | goto not_likely; |
| 2479 | case OPC_BLEZL: | 2479 | case OPC_BLEZL: |
| 2480 | - gen_op_lez(t0); | 2480 | + gen_op_lez(t0, t0); |
| 2481 | MIPS_DEBUG("blezl %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2481 | MIPS_DEBUG("blezl %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2482 | goto likely; | 2482 | goto likely; |
| 2483 | case OPC_BLTZ: | 2483 | case OPC_BLTZ: |
| 2484 | - gen_op_ltz(t0); | 2484 | + gen_op_ltz(t0, t0); |
| 2485 | MIPS_DEBUG("bltz %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2485 | MIPS_DEBUG("bltz %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2486 | goto not_likely; | 2486 | goto not_likely; |
| 2487 | case OPC_BLTZL: | 2487 | case OPC_BLTZL: |
| 2488 | - gen_op_ltz(t0); | 2488 | + gen_op_ltz(t0, t0); |
| 2489 | MIPS_DEBUG("bltzl %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2489 | MIPS_DEBUG("bltzl %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2490 | goto likely; | 2490 | goto likely; |
| 2491 | case OPC_BLTZAL: | 2491 | case OPC_BLTZAL: |
| 2492 | - gen_op_ltz(t0); | 2492 | + gen_op_ltz(t0, t0); |
| 2493 | blink = 31; | 2493 | blink = 31; |
| 2494 | MIPS_DEBUG("bltzal %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2494 | MIPS_DEBUG("bltzal %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2495 | not_likely: | 2495 | not_likely: |
| @@ -2497,7 +2497,7 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc, | @@ -2497,7 +2497,7 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc, | ||
| 2497 | tcg_gen_trunc_tl_i32(bcond, t0); | 2497 | tcg_gen_trunc_tl_i32(bcond, t0); |
| 2498 | break; | 2498 | break; |
| 2499 | case OPC_BLTZALL: | 2499 | case OPC_BLTZALL: |
| 2500 | - gen_op_ltz(t0); | 2500 | + gen_op_ltz(t0, t0); |
| 2501 | blink = 31; | 2501 | blink = 31; |
| 2502 | MIPS_DEBUG("bltzall %s, " TARGET_FMT_lx, regnames[rs], btgt); | 2502 | MIPS_DEBUG("bltzall %s, " TARGET_FMT_lx, regnames[rs], btgt); |
| 2503 | likely: | 2503 | likely: |