Commit 3a55fa4796a09e94e81294eb1920c56b046f4e57

Authored by aurel32
1 parent f157bfe1

target-mips: gen_bshfl()

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6934 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 45 additions and 29 deletions
target-mips/translate.c
... ... @@ -2619,56 +2619,72 @@ fail:
2619 2619  
2620 2620 static void gen_bshfl (DisasContext *ctx, uint32_t op2, int rt, int rd)
2621 2621 {
2622   - TCGv t0 = tcg_temp_new();
2623   - TCGv t1 = tcg_temp_new();
  2622 + TCGv t0;
2624 2623  
2625   - gen_load_gpr(t1, rt);
  2624 + if (rd == 0) {
  2625 + /* If no destination, treat it as a NOP. */
  2626 + MIPS_DEBUG("NOP");
  2627 + return;
  2628 + }
  2629 +
  2630 + t0 = tcg_temp_new();
  2631 + gen_load_gpr(t0, rt);
2626 2632 switch (op2) {
2627 2633 case OPC_WSBH:
2628   - tcg_gen_shri_tl(t0, t1, 8);
2629   - tcg_gen_andi_tl(t0, t0, 0x00FF00FF);
2630   - tcg_gen_shli_tl(t1, t1, 8);
2631   - tcg_gen_andi_tl(t1, t1, ~0x00FF00FF);
2632   - tcg_gen_or_tl(t0, t0, t1);
2633   - tcg_gen_ext32s_tl(t0, t0);
  2634 + {
  2635 + TCGv t1 = tcg_temp_new();
  2636 +
  2637 + tcg_gen_shri_tl(t1, t0, 8);
  2638 + tcg_gen_andi_tl(t1, t1, 0x00FF00FF);
  2639 + tcg_gen_shli_tl(t0, t0, 8);
  2640 + tcg_gen_andi_tl(t0, t0, ~0x00FF00FF);
  2641 + tcg_gen_or_tl(t0, t0, t1);
  2642 + tcg_temp_free(t1);
  2643 + tcg_gen_ext32s_tl(cpu_gpr[rd], t0);
  2644 + }
2634 2645 break;
2635 2646 case OPC_SEB:
2636   - tcg_gen_ext8s_tl(t0, t1);
  2647 + tcg_gen_ext8s_tl(cpu_gpr[rd], t0);
2637 2648 break;
2638 2649 case OPC_SEH:
2639   - tcg_gen_ext16s_tl(t0, t1);
  2650 + tcg_gen_ext16s_tl(cpu_gpr[rd], t0);
2640 2651 break;
2641 2652 #if defined(TARGET_MIPS64)
2642 2653 case OPC_DSBH:
2643   - gen_load_gpr(t1, rt);
2644   - tcg_gen_shri_tl(t0, t1, 8);
2645   - tcg_gen_andi_tl(t0, t0, 0x00FF00FF00FF00FFULL);
2646   - tcg_gen_shli_tl(t1, t1, 8);
2647   - tcg_gen_andi_tl(t1, t1, ~0x00FF00FF00FF00FFULL);
2648   - tcg_gen_or_tl(t0, t0, t1);
  2654 + {
  2655 + TCGv t1 = tcg_temp_new();
  2656 +
  2657 + tcg_gen_shri_tl(t1, t0, 8);
  2658 + tcg_gen_andi_tl(t1, t1, 0x00FF00FF00FF00FFULL);
  2659 + tcg_gen_shli_tl(t0, t0, 8);
  2660 + tcg_gen_andi_tl(t0, t0, ~0x00FF00FF00FF00FFULL);
  2661 + tcg_gen_or_tl(cpu_gpr[rd], t0, t1);
  2662 + tcg_temp_free(t1);
  2663 + }
2649 2664 break;
2650 2665 case OPC_DSHD:
2651   - gen_load_gpr(t1, rt);
2652   - tcg_gen_shri_tl(t0, t1, 16);
2653   - tcg_gen_andi_tl(t0, t0, 0x0000FFFF0000FFFFULL);
2654   - tcg_gen_shli_tl(t1, t1, 16);
2655   - tcg_gen_andi_tl(t1, t1, ~0x0000FFFF0000FFFFULL);
2656   - tcg_gen_or_tl(t1, t0, t1);
2657   - tcg_gen_shri_tl(t0, t1, 32);
2658   - tcg_gen_shli_tl(t1, t1, 32);
2659   - tcg_gen_or_tl(t0, t0, t1);
  2666 + {
  2667 + TCGv t1 = tcg_temp_new();
  2668 +
  2669 + tcg_gen_shri_tl(t1, t0, 16);
  2670 + tcg_gen_andi_tl(t1, t1, 0x0000FFFF0000FFFFULL);
  2671 + tcg_gen_shli_tl(t0, t0, 16);
  2672 + tcg_gen_andi_tl(t0, t0, ~0x0000FFFF0000FFFFULL);
  2673 + tcg_gen_or_tl(t0, t0, t1);
  2674 + tcg_gen_shri_tl(t1, t0, 32);
  2675 + tcg_gen_shli_tl(t0, t0, 32);
  2676 + tcg_gen_or_tl(cpu_gpr[rd], t0, t1);
  2677 + tcg_temp_free(t1);
  2678 + }
2660 2679 break;
2661 2680 #endif
2662 2681 default:
2663 2682 MIPS_INVAL("bsfhl");
2664 2683 generate_exception(ctx, EXCP_RI);
2665 2684 tcg_temp_free(t0);
2666   - tcg_temp_free(t1);
2667 2685 return;
2668 2686 }
2669   - gen_store_gpr(t0, rd);
2670 2687 tcg_temp_free(t0);
2671   - tcg_temp_free(t1);
2672 2688 }
2673 2689  
2674 2690 #ifndef CONFIG_USER_ONLY
... ...