gwj / at91sam9263 · Commits

Commit 8879d139bbe4b8c608108fa04f36776051126dfa

Authored by blueswir1
1 parent 48d5c82b

Convert umul and smul to TCG 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4077 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 48 additions and 24 deletions
target-sparc/op.c
  View file @8879d13
... ... @@ -171,30 +171,6 @@
171 171  
172 172 #define FLAG_SET(x) ((env->psr&x)?1:0)
173 173  
174   -void OPPROTO op_umul_T1_T0(void)
175   -{
176   - uint64_t res;
177   - res = (uint64_t) T0 * (uint64_t) T1;
178   -#ifdef TARGET_SPARC64
179   - T0 = res;
180   -#else
181   - T0 = res & 0xffffffff;
182   -#endif
183   - env->y = res >> 32;
184   -}
185   -
186   -void OPPROTO op_smul_T1_T0(void)
187   -{
188   - uint64_t res;
189   - res = (int64_t) ((int32_t) T0) * (int64_t) ((int32_t) T1);
190   -#ifdef TARGET_SPARC64
191   - T0 = res;
192   -#else
193   - T0 = res & 0xffffffff;
194   -#endif
195   - env->y = res >> 32;
196   -}
197   -
198 174 void OPPROTO op_udiv_T1_T0(void)
199 175 {
200 176 uint64_t x0;
... ...
target-sparc/translate.c
  View file @8879d13
... ... @@ -759,6 +759,54 @@ static inline void gen_op_mulscc_T1_T0(void)
759 759 gen_cc_C_add(cpu_T[0], cpu_cc_src);
760 760 }
761 761  
  762 +static inline void gen_op_umul_T1_T0(void)
  763 +{
  764 + TCGv r_temp, r_temp2;
  765 +
  766 + r_temp = tcg_temp_new(TCG_TYPE_I64);
  767 + r_temp2 = tcg_temp_new(TCG_TYPE_I64);
  768 +
  769 + tcg_gen_extu_i32_i64(r_temp, cpu_T[1]);
  770 + tcg_gen_extu_i32_i64(r_temp2, cpu_T[0]);
  771 + tcg_gen_mul_i64(r_temp2, r_temp, r_temp2);
  772 +
  773 + tcg_gen_shri_i64(r_temp, r_temp2, 32);
  774 + tcg_gen_trunc_i64_i32(r_temp, r_temp);
  775 + tcg_gen_st_i32(r_temp, cpu_env, offsetof(CPUSPARCState, y));
  776 +#ifdef TARGET_SPARC64
  777 + tcg_gen_mov_i64(cpu_T[0], r_temp2);
  778 +#else
  779 + tcg_gen_trunc_i64_i32(cpu_T[0], r_temp2);
  780 +#endif
  781 +
  782 + tcg_gen_discard_i64(r_temp);
  783 + tcg_gen_discard_i64(r_temp2);
  784 +}
  785 +
  786 +static inline void gen_op_smul_T1_T0(void)
  787 +{
  788 + TCGv r_temp, r_temp2;
  789 +
  790 + r_temp = tcg_temp_new(TCG_TYPE_I64);
  791 + r_temp2 = tcg_temp_new(TCG_TYPE_I64);
  792 +
  793 + tcg_gen_ext32s_i64(r_temp, cpu_T[1]);
  794 + tcg_gen_ext32s_i64(r_temp2, cpu_T[0]);
  795 + tcg_gen_mul_i64(r_temp2, r_temp, r_temp2);
  796 +
  797 + tcg_gen_shri_i64(r_temp, r_temp2, 32);
  798 + tcg_gen_trunc_i64_i32(r_temp, r_temp);
  799 + tcg_gen_st_i32(r_temp, cpu_env, offsetof(CPUSPARCState, y));
  800 +#ifdef TARGET_SPARC64
  801 + tcg_gen_mov_i64(cpu_T[0], r_temp2);
  802 +#else
  803 + tcg_gen_trunc_i64_i32(cpu_T[0], r_temp2);
  804 +#endif
  805 +
  806 + tcg_gen_discard_i64(r_temp);
  807 + tcg_gen_discard_i64(r_temp2);
  808 +}
  809 +
762 810 #ifdef TARGET_SPARC64
763 811 static inline void gen_trap_ifdivzero_i64(TCGv divisor)
764 812 {
... ...