Commit 48d5c82bcc3cc1709038867e5ba99b7099155dcd
1 parent
d9bdab86
Use a TCG global for pc and npc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4076 c046a42c-6fe2-441c-8c8c-71466251a162
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17 additions
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18 deletions
target-sparc/translate.c
... | ... | @@ -47,7 +47,7 @@ |
47 | 47 | |
48 | 48 | /* global register indexes */ |
49 | 49 | static TCGv cpu_env, cpu_T[3], cpu_regwptr, cpu_cc_src, cpu_cc_src2, cpu_cc_dst; |
50 | -static TCGv cpu_psr, cpu_fsr, cpu_gregs[8]; | |
50 | +static TCGv cpu_psr, cpu_fsr, cpu_pc, cpu_npc, cpu_gregs[8]; | |
51 | 51 | #ifdef TARGET_SPARC64 |
52 | 52 | static TCGv cpu_xcc; |
53 | 53 | #endif |
... | ... | @@ -304,14 +304,12 @@ static inline void gen_op_xor_T1_T0(void) |
304 | 304 | |
305 | 305 | static inline void gen_jmp_im(target_ulong pc) |
306 | 306 | { |
307 | - tcg_gen_movi_tl(cpu_tmp0, pc); | |
308 | - tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, pc)); | |
307 | + tcg_gen_movi_tl(cpu_pc, pc); | |
309 | 308 | } |
310 | 309 | |
311 | 310 | static inline void gen_movl_npc_im(target_ulong npc) |
312 | 311 | { |
313 | - tcg_gen_movi_tl(cpu_tmp0, npc); | |
314 | - tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, npc)); | |
312 | + tcg_gen_movi_tl(cpu_npc, npc); | |
315 | 313 | } |
316 | 314 | |
317 | 315 | static inline void gen_goto_tb(DisasContext *s, int tb_num, |
... | ... | @@ -1159,12 +1157,10 @@ static inline void gen_mov_pc_npc(DisasContext * dc) |
1159 | 1157 | { |
1160 | 1158 | if (dc->npc == JUMP_PC) { |
1161 | 1159 | gen_generic_branch(dc->jump_pc[0], dc->jump_pc[1], cpu_T[2]); |
1162 | - tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, npc)); | |
1163 | - tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, pc)); | |
1160 | + tcg_gen_mov_tl(cpu_pc, cpu_npc); | |
1164 | 1161 | dc->pc = DYNAMIC_PC; |
1165 | 1162 | } else if (dc->npc == DYNAMIC_PC) { |
1166 | - tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, npc)); | |
1167 | - tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, pc)); | |
1163 | + tcg_gen_mov_tl(cpu_pc, cpu_npc); | |
1168 | 1164 | dc->pc = DYNAMIC_PC; |
1169 | 1165 | } else { |
1170 | 1166 | dc->pc = dc->npc; |
... | ... | @@ -1173,10 +1169,8 @@ static inline void gen_mov_pc_npc(DisasContext * dc) |
1173 | 1169 | |
1174 | 1170 | static inline void gen_op_next_insn(void) |
1175 | 1171 | { |
1176 | - tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, npc)); | |
1177 | - tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, pc)); | |
1178 | - tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, 4); | |
1179 | - tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, npc)); | |
1172 | + tcg_gen_mov_tl(cpu_pc, cpu_npc); | |
1173 | + tcg_gen_addi_tl(cpu_npc, cpu_npc, 4); | |
1180 | 1174 | } |
1181 | 1175 | |
1182 | 1176 | static inline void gen_cond(TCGv r_dst, unsigned int cc, unsigned int cond) |
... | ... | @@ -1906,8 +1900,7 @@ static void disas_sparc_insn(DisasContext * dc) |
1906 | 1900 | /*CALL*/ { |
1907 | 1901 | target_long target = GET_FIELDs(insn, 2, 31) << 2; |
1908 | 1902 | |
1909 | - tcg_gen_movi_tl(cpu_T[0], dc->pc); | |
1910 | - gen_movl_T0_reg(15); | |
1903 | + gen_movl_TN_reg(15, tcg_const_tl(dc->pc)); | |
1911 | 1904 | target += dc->pc; |
1912 | 1905 | gen_mov_pc_npc(dc); |
1913 | 1906 | dc->npc = target; |
... | ... | @@ -3874,7 +3867,7 @@ static void disas_sparc_insn(DisasContext * dc) |
3874 | 3867 | gen_op_restore(); |
3875 | 3868 | gen_mov_pc_npc(dc); |
3876 | 3869 | gen_op_check_align_T0_3(); |
3877 | - tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUSPARCState, npc)); | |
3870 | + tcg_gen_mov_tl(cpu_npc, cpu_T[0]); | |
3878 | 3871 | dc->npc = DYNAMIC_PC; |
3879 | 3872 | goto jmp_insn; |
3880 | 3873 | #endif |
... | ... | @@ -3904,7 +3897,7 @@ static void disas_sparc_insn(DisasContext * dc) |
3904 | 3897 | } |
3905 | 3898 | gen_mov_pc_npc(dc); |
3906 | 3899 | gen_op_check_align_T0_3(); |
3907 | - tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUSPARCState, npc)); | |
3900 | + tcg_gen_mov_tl(cpu_npc, cpu_T[0]); | |
3908 | 3901 | dc->npc = DYNAMIC_PC; |
3909 | 3902 | } |
3910 | 3903 | goto jmp_insn; |
... | ... | @@ -3915,7 +3908,7 @@ static void disas_sparc_insn(DisasContext * dc) |
3915 | 3908 | goto priv_insn; |
3916 | 3909 | gen_mov_pc_npc(dc); |
3917 | 3910 | gen_op_check_align_T0_3(); |
3918 | - tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUSPARCState, npc)); | |
3911 | + tcg_gen_mov_tl(cpu_npc, cpu_T[0]); | |
3919 | 3912 | dc->npc = DYNAMIC_PC; |
3920 | 3913 | tcg_gen_helper_0_0(helper_rett); |
3921 | 3914 | } |
... | ... | @@ -4690,6 +4683,12 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model) |
4690 | 4683 | cpu_fsr = tcg_global_mem_new(TCG_TYPE_TL, |
4691 | 4684 | TCG_AREG0, offsetof(CPUState, fsr), |
4692 | 4685 | "fsr"); |
4686 | + cpu_pc = tcg_global_mem_new(TCG_TYPE_TL, | |
4687 | + TCG_AREG0, offsetof(CPUState, pc), | |
4688 | + "pc"); | |
4689 | + cpu_npc = tcg_global_mem_new(TCG_TYPE_TL, | |
4690 | + TCG_AREG0, offsetof(CPUState, npc), | |
4691 | + "npc"); | |
4693 | 4692 | for (i = 1; i < 8; i++) |
4694 | 4693 | cpu_gregs[i] = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0, |
4695 | 4694 | offsetof(CPUState, gregs[i]), | ... | ... |