gwj / at91sam9263 · Commits

Commit 8026037b4227750d0be4662bc74e909fda7b7849

Authored by blueswir1
1 parent 59d94130

Improve PCI debug support 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6234 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 27 additions and 1 deletions
hw/pci_host.h
  View file @8026037
@@ -25,6 +25,16 @@ @@ -25,6 +25,16 @@
25 /* Worker routines for a PCI host controller that uses an {address,data} 25 /* Worker routines for a PCI host controller that uses an {address,data}
26 register pair to access PCI configuration space. */ 26 register pair to access PCI configuration space. */
27 27
  28 +/* debug PCI */
  29 +//#define DEBUG_PCI
  30 +
  31 +#ifdef DEBUG_PCI
  32 +#define PCI_DPRINTF(fmt, args...) \
  33 +do { printf("pci_host_data: " fmt , ##args); } while (0)
  34 +#else
  35 +#define PCI_DPRINTF(fmt, args...)
  36 +#endif
  37 +
28 typedef struct { 38 typedef struct {
29 uint32_t config_reg; 39 uint32_t config_reg;
30 PCIBus *bus; 40 PCIBus *bus;
@@ -33,6 +43,9 @@ typedef struct { @@ -33,6 +43,9 @@ typedef struct {
33 static void pci_host_data_writeb(void* opaque, pci_addr_t addr, uint32_t val) 43 static void pci_host_data_writeb(void* opaque, pci_addr_t addr, uint32_t val)
34 { 44 {
35 PCIHostState *s = opaque; 45 PCIHostState *s = opaque;
  46 +
  47 + PCI_DPRINTF("writeb addr " TARGET_FMT_plx " val %x\n",
  48 + (target_phys_addr_t)addr, val);
36 if (s->config_reg & (1u << 31)) 49 if (s->config_reg & (1u << 31))
37 pci_data_write(s->bus, s->config_reg | (addr & 3), val, 1); 50 pci_data_write(s->bus, s->config_reg | (addr & 3), val, 1);
38 } 51 }
@@ -43,6 +56,8 @@ static void pci_host_data_writew(void* opaque, pci_addr_t addr, uint32_t val) @@ -43,6 +56,8 @@ static void pci_host_data_writew(void* opaque, pci_addr_t addr, uint32_t val)
43 #ifdef TARGET_WORDS_BIGENDIAN 56 #ifdef TARGET_WORDS_BIGENDIAN
44 val = bswap16(val); 57 val = bswap16(val);
45 #endif 58 #endif
  59 + PCI_DPRINTF("writew addr " TARGET_FMT_plx " val %x\n",
  60 + (target_phys_addr_t)addr, val);
46 if (s->config_reg & (1u << 31)) 61 if (s->config_reg & (1u << 31))
47 pci_data_write(s->bus, s->config_reg | (addr & 3), val, 2); 62 pci_data_write(s->bus, s->config_reg | (addr & 3), val, 2);
48 } 63 }
@@ -53,6 +68,8 @@ static void pci_host_data_writel(void* opaque, pci_addr_t addr, uint32_t val) @@ -53,6 +68,8 @@ static void pci_host_data_writel(void* opaque, pci_addr_t addr, uint32_t val)
53 #ifdef TARGET_WORDS_BIGENDIAN 68 #ifdef TARGET_WORDS_BIGENDIAN
54 val = bswap32(val); 69 val = bswap32(val);
55 #endif 70 #endif
  71 + PCI_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n",
  72 + (target_phys_addr_t)addr, val);
56 if (s->config_reg & (1u << 31)) 73 if (s->config_reg & (1u << 31))
57 pci_data_write(s->bus, s->config_reg, val, 4); 74 pci_data_write(s->bus, s->config_reg, val, 4);
58 } 75 }
@@ -60,9 +77,14 @@ static void pci_host_data_writel(void* opaque, pci_addr_t addr, uint32_t val) @@ -60,9 +77,14 @@ static void pci_host_data_writel(void* opaque, pci_addr_t addr, uint32_t val)
60 static uint32_t pci_host_data_readb(void* opaque, pci_addr_t addr) 77 static uint32_t pci_host_data_readb(void* opaque, pci_addr_t addr)
61 { 78 {
62 PCIHostState *s = opaque; 79 PCIHostState *s = opaque;
  80 + uint32_t val;
  81 +
63 if (!(s->config_reg & (1 << 31))) 82 if (!(s->config_reg & (1 << 31)))
64 return 0xff; 83 return 0xff;
65 - return pci_data_read(s->bus, s->config_reg | (addr & 3), 1); 84 + val = pci_data_read(s->bus, s->config_reg | (addr & 3), 1);
  85 + PCI_DPRINTF("readb addr " TARGET_FMT_plx " val %x\n",
  86 + (target_phys_addr_t)addr, val);
  87 + return val;
66 } 88 }
67 89
68 static uint32_t pci_host_data_readw(void* opaque, pci_addr_t addr) 90 static uint32_t pci_host_data_readw(void* opaque, pci_addr_t addr)
@@ -72,6 +94,8 @@ static uint32_t pci_host_data_readw(void* opaque, pci_addr_t addr) @@ -72,6 +94,8 @@ static uint32_t pci_host_data_readw(void* opaque, pci_addr_t addr)
72 if (!(s->config_reg & (1 << 31))) 94 if (!(s->config_reg & (1 << 31)))
73 return 0xffff; 95 return 0xffff;
74 val = pci_data_read(s->bus, s->config_reg | (addr & 3), 2); 96 val = pci_data_read(s->bus, s->config_reg | (addr & 3), 2);
  97 + PCI_DPRINTF("readw addr " TARGET_FMT_plx " val %x\n",
  98 + (target_phys_addr_t)addr, val);
75 #ifdef TARGET_WORDS_BIGENDIAN 99 #ifdef TARGET_WORDS_BIGENDIAN
76 val = bswap16(val); 100 val = bswap16(val);
77 #endif 101 #endif
@@ -85,6 +109,8 @@ static uint32_t pci_host_data_readl(void* opaque, pci_addr_t addr) @@ -85,6 +109,8 @@ static uint32_t pci_host_data_readl(void* opaque, pci_addr_t addr)
85 if (!(s->config_reg & (1 << 31))) 109 if (!(s->config_reg & (1 << 31)))
86 return 0xffffffff; 110 return 0xffffffff;
87 val = pci_data_read(s->bus, s->config_reg | (addr & 3), 4); 111 val = pci_data_read(s->bus, s->config_reg | (addr & 3), 4);
  112 + PCI_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n",
  113 + (target_phys_addr_t)addr, val);
88 #ifdef TARGET_WORDS_BIGENDIAN 114 #ifdef TARGET_WORDS_BIGENDIAN
89 val = bswap32(val); 115 val = bswap32(val);
90 #endif 116 #endif